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QW030CL1 GE Critical Power QW030xx DUAL Series Power Modules: dc-dc Converters, 18 Vdc to 36 Vdc or 36 Vdc to 75 Vdc Inputs visit GE Critical Power
QW030AJ1 GE Critical Power QW030xx DUAL Series Power Modules: dc-dc Converters, 18 Vdc to 36 Vdc or 36 Vdc to 75 Vdc Inputs visit GE Critical Power
EP0300AC48TEZ GE Critical Power EP0300AC48TEZ, Compact, Ssingle Phase, Hotpluggable, Fan-cooled Rectifier and Battery Charger 300W Output at 48-58Vdc visit GE Critical Power
EBVW012A7B1Z<641-PHZ GE Critical Power EBVW012A7B Series DC-DC Converter Power Module, 34 - 75Vdc Input, 12.0 Vdc Output and 12.7A Output Current visit GE Critical Power
QW030BK1 GE Critical Power QW030xx DUAL Series Power Modules: dc-dc Converters, 18 Vdc to 36 Vdc or 36 Vdc to 75 Vdc Inputs visit GE Critical Power
CAR1812FPBXXZ01A GE Critical Power CAR1812FP series dc-dc converter, Input: 85Vac to 264Vac; Output: 12Vdc @ 1800W; 3.3Vdc or 5 Vdc @ 1A visit GE Critical Power

dtl ttl logic GUIDE

Catalog Datasheet MFG & Type PDF Document Tags

dtl logic gates

Abstract: 754528 rate control with external ca pacitor · Inputs compatile with DTL and TTL logic Piega. j SQ1489 , outputs T, R High speed Schottky logic Frequencies beyong 1MHz TTL input compatibility Rise and fall times , / 74 logic series · Inputs compatible with DTU TTL H LINEAR IN TEG R A TED CIRCU ITS 8Q6S325 , · Two NAND gates and two uncommited NPN transis tors · High speed switching · TTL or DTL compatible , switching · TTL or DTL compatible diode-clamped inputs · Two NAND gates with open collector outputs · High
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dtl logic gates 754528 SG506 relay ttl input 12v output dual pole 12V DC Relay PIN DIODE DRIVER CIRCUITS SG1488 RS-232C SQ1489/SG1489A SG1626/2826/3626 SG1644/2644/3644 SG1627/2627/3627

IH5009-24

Abstract: P-JFET « Channels No. Technology max(t) max max max Logic Level Type(2) mW IH5021 P-JFET 100 02 05 05 TTL High , lo IH5038 P-JFET 150 0.5 02 02 TTL High Level lo IH 5040 CMOS 75 1 0 0.5 025 DTL. TTL, RTL , RTL hi 68 DG134A N-JFET 80 10 03 08 OTl. TTL RTL hi 68 DG141A N-JFET 10 100 05 125 DTL TTL RTL hi 68 DG151A N-JFET 15 100 05 125 OTL TTL RTL hi 72 DG152A N-JFET 50 20 03 08 DTL TTL RTL hi 72 DG180 N-JFET 10 100 03 0.25 DTL. TTL. RTL lo 120 DG181 N-JFET 30 10 0.15 0 13 DTL. TTL. RTL lo 120
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DGM181-191 IH5022 IH5023 IH5024 IH5037 IH5140 IH5009-24 P-JFET rtl series cmos DG133A

uln series

Abstract: 2077B GUIDE Drivers Sustaining Interface Device Type Per Package Voltage Compatibility ULN-2061M 2 50 TTL, DTL ULN-2062M 2 80 TTL, DTL ULN-2064B 4 50 TTL, DTL ULN-2065B 4 80 TTL, DTL ULN-2066B 4 50 MOS ULN-2067B 4 80 MOS ULN-2068B 4 50 TTL, DTL (Hi Gain) ULN-2069B 4 80 TTL, DTL (Hi Gain) ULN-2070B 4 50 MOS (Hi Gain) ULN-2071B 4 80 MOS (Hi Gain) ULN-2074B 4 50 TTL, DTL ULN-2075B 4 80 TTL, DTL ULN , are designed for a broad area of interface applications between low level/low current logic systems
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uln series 2077B 2069B 2061M 2068B 2071b ULN-207IB ULN-2076B ULN-2077B 4-976SA

CD4053M

Abstract: cd 4053 M MM74HC4051 Function D PD T QUAD SPST DUAL DPST QUAD SPST Logic Input TTL, DTL TTL, DTL TTL, DTL TTL, C M O S TTL, C M O S CMOS CMOS TTL TTL TTL TTL TTL CMOS (T y p ) + 10/ - 22 + 10/ - 22 + 10 , Analog Switch/Multiplexer Selection Guide ZWA National áíá Semiconductor Analog Switch/Multiplexer Selection Guide T o n / T o ff na (Typ) 350/600 100/600 100/600 150/300 150/300 20/40 25/50 90 , -C H AN N EL TTL, C M O S CMOS CMOS TTL, C M O S TTL, C M O S CMOS CMOS TTL, C M O S CMOS CMOS CMOS
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D4053 4529B CD4053M cd 4053 M cd4016 CD4053 CD4016 quad analog switch AH0015 AH5011 CD4016 D4066 LF11201/LF13201 11202/LF13202

dtl logic gates

Abstract: CAG24 except the CAG6 operate directly from DTL or TTL logic without special biasing. Most will work with , 10V SIGNAL LEVELS WORK FROM DTL, TTL, HNIL AND MOS LOGIC 20 Vpp SIGNAL LEVELS AC OR DC WITH CAG42 PG , LOGIC DTL/TTL NORMAL DTL/TTL INVERTED MOS DTL/TTL DOUBLE THROW 15 10 VSIG PEAK 10 -15 VSIG , for normal operation. The following pages may help you in your final selection. The guide shown below , numerical order. SELECTION GUIDE - FET ANALOG GATES 2 > TELEDYNE 147 Sherman Street, Cambridge, Mass
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CAG30 CAG13 CAG24 CAG27-10 TELEDYNE HNIL CAG13C CAG27 SPDT FETs CRYSTALONI03

analog devices AD2021 digital panel meter

Abstract: AD2021 , character serial format. . Digit Strobe Outputs: (CMOS, DTL, TTL compatible, one TTL load). Logic "1" on any of these lines indicates the output data is valid for that digit. . Polarity Output: (CMOS, TTL, DTL compatible, one TTL load). Logic "I" indicates positive polarity input, logic "0" indicates negative polarity. . Status: (CMOS or LP TTL compatible). When this signal is at Logic" 1", the output data is valid. . , CONTROL INPUTS . Display Blankin2: (TTL, DTL compatible, 2 TTL loads). Logic "0" or grounding blanks the
Analog Devices
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AD2021 analog devices AD2021 digital panel meter AD2010 bcd seven segment display AD2021/S AD2021/V

analog devices AD2021 digital panel meter

Abstract: TTL 7475 signal. » Hold: (CMOS, DTL, TTL compatibly 1LP TTL load). Logic "0" or grounding causes the EPM to , . â'¢ Polarity Output: (CMOS, TTL, DTL compatible, one TTL load). Logic "1" indicates positive , signal is at Logic "1", the output data is valid. â'¢ Clock: (CMOS, DTL, TTL compatible, one TTL load). , conversions per second â'¢ Hold and read on command CONTROL INPUTS â'¢ Display Blanking: (TTL, DTL compitible, 2 TTL loads). Logic "0" or grounding blanks the three data digits only, not the decimal points
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AC1501 TTL 7475 seven segment quad digit display red input mos-lsi AD20* PANEL METER J2021 2VK15D/1-2

SDC601

Abstract: SDC-60 CODING. Natural binary angle * â'¢ DIGITAL OUTPUT: Parallel, positive logic, DTL/TTL " levels, 14 angle data, 1 Inhibit, 1 Converter Busy Line I LP Shottky available). FAN OUT: 5 Standard TTL/DTL Loads â'¢ CONVERTER BUSY: Positive pulse 3 microseconds * duration during output update. Drives 2 standard TTL/DTL loads. INHIBIT: DTL/TTL Compatible Fan In: 2 TTL loads SYNCHRO INPUT (2) RESOLVER INPUT IR DC 40 , the "C" terminal. The converter busy comes from TTL logic and must be connected to TTL/DTL compatable
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SDC601 SDC-60 SDC610 SDC60 pulse transformer circuit SDC40 000G4 SDC40ST SDC60ST

SDC40-L-1

Abstract: SDC40 logic, DTL/TTL " " levels, 14 angle data, 1 Inhibit, 1 Converter Busy Line (LPShottky available). FAN OUT: 5 Standard TTL/DTL Loads â'¢ â'¢ CONVERTER BUSY: Positive pulse 3 microseconds * # duration during output update. Drives 2 standard TTL/DTL loads. INHIBIT: DTL/TTL Compatible Fan In: 2 TTL loads , . The converter busy comes from TTL logic and must be connected to TTL/DTL compatable inputs. It has a fan out of 2 TTL/DTL loads. DIGITAL OUTPUTS The data outputs Bit 1 (MSB) thru Bit 14 (LSB) can drive
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SDC40-L-1 RDC40 SDcd SDC60-HI 115v 400Hz with 12V DC SDC410

TELEDYNE HNIL

Abstract: CAG27 except the CAG6 operate directly from DTL or TTL logic without special biasing. Most will work with , 10V SIGNAL LEVELS WORK FROM DTL, TTL, HNIL AND MOS LOGIC 20 Vpp SIGNAL LEVELS AC OR DC WITH CAG42 PG , for normal operation. The following pages may help you in your final selection. The guide shown below , numerical order. SELECTION GUIDE - FET ANALOG GATES 2 > TELEDYNE 147 Sherman Street, Cambridge, Mass , * Power Drain Pt/Ckt. Vin = + 3V â'" 65 90 _ 5 6 mW * Logic "1" Current llN (1 ) VlNâ'"+ 2.4V _ 320 400
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CAG13A TELEDYNE TELEDYNE CRYSTALONICS CAG27-1G 140KH CAG13D

LS145

Abstract: texas 74 series TTL logic gates and outputs are entirely compatible for use with TTL or DTL logic circuits, and the outputs are , entirely compatible for use with TTL or DTL logic circuits, and the outputs are compatible for interfacing , Logic Reference Guide (SCYB004, 1032 KB - Updated: 10/23/2001) Logic Selection Guide Second Half 2002 , Back to Top View Related Documentation for Digital Logic q q q Logic Reference Guide (SCYB004, 1032 KB - Updated: 10/23/2001) Logic Selection Guide Second Half 2002 (Rev. R) (SDYU001R, 4274 KB -
Texas Instruments
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LS145 texas 74 series TTL logic gates dtl ttl logic series guide designing with ttl integrated circuits SDYA010 SDYA012 SGYC003B SN74145N SN74145N3 SN74145NSR

Diode S4 55a

Abstract: AD7501 identical to the AD7501 except its "enable" logic is inverted. All digital inputs are TTL/DTL and CMOS logic , ⡠ANALOG CMOS DEVICES 4/8 Channel Analog Multiplexers AD7501/AD7502/AD7503 FEATURES DTL/TTL/CMOS Direct Interface Power Dissipation: 30|iW Ron- 170il Standard 16-Pin DIPs and 20-Terminal Surface Mount Packages FUNCTIONAL BLOCK DIAGRAMS AD7501/AD7503 EN A2 Al AO 31 'oJ "I >0-1 TTL/DTL TO , «+15V1â"¢ GND&â'"1 r,-l-f-i-r: I DTL/TTL TO CMOS LEVEL TRANSLATOR^ DECODER/OR IVER Tn
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AD7502 AD7503 Diode S4 55a 15V1 AD7S02 AD7501/ D7502/AD7503-SPECIFICATIONS AD750

SCHS046A

Abstract: CD4050BE ic 16 pin diagram logic-level conversions. These devices are intended for use as CMOS to DTL/TTL converters and can drive directly two DTL/TTL loads. (VCC = 5V, VOL 0.4V, and IOL 3.3mA.) The CD4049UB and CD4050B are designated , Driving 2 TTL Loads · High-To-Low Level Logic Conversion · 100% Tested for Quiescent Current at 20V · , ) /Autho r () /Keywords (Harris Semiconductor, CD400 0, metal gate, CMOS Applications · CMOS to DTL/TTL , DTL/TTL 5V LEVEL VCC = 5V VCC INPUTS VCC I VSS VSS 10V = VIH 0 = VIL VSS OUTPUTS COS/MOS IN CD4049
Texas Instruments
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SCHS046A CD4050BE ic 16 pin diagram CD4049 pin configuration not gate dtl ttl logic GUIDE CD4009UB CD4010B CD4069UB SCEA004 SZZU001B

VHC 123A

Abstract: CMOS 4017 series October 1995 Logic Availability Guide Cross Reference FASTr TM FAST ALS AS LS S TTL ABT LCX , Other TTL Families DTL 9300 9600 93L 96L 54L 93S Other CMOS Families CD4K 70 80C 78 88C FAST is a , of National Semiconductor Corporation 1 Logic Availability Guide Here's a quick and easy way to review National's Logic products Cross-referencing is sequential by standard generic numbers so , C D D CGS100P2530 CGS100P2531 D D CGS product Other TTL Logic Families 93L 96L
National Semiconductor
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VHC 123A CMOS 4017 series 74 ls 4066 4001 4011 cmos 4526B 4584b F100K

LC125A

Abstract: driver motor stepper ULN (suffix B) and 20-lead surface-mountable wide-body SOICs (suffix LB). FEATURES â  TTL, DTL, MOS, CMOS , cex Min. V ce(sus) Max. v,n Application ULN2061M 50 V 35 V 30 V TTL, DTL, Schottky TTL, and 5 V CMOS ULN2062M 80 V 50 V 60 V ULN2064B ULN2064LB 50 V 35 V 15 V TTL, DTL, Schottky TTL, and 5 V CMOS ULN2065B 80 V 50 V 15 V ULN2068B ULN2068LB 50 V 35 V 15 V TTL, DTL, Schottky TTL, and 5 V CMOS ULN2069B 80 , One Driver (unless otherwise noted) Output Voltage, VCEX.See Guide Output Sustaining
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LN2064 LC125A driver motor stepper ULN PD 2061 A 10.400C D42M N2064/65B ULN2068B/LB ULN2061/62M ULN2074B 2074B
Abstract: 30 V 60 V TTL, DTL, SchottKy TTL, and 5 V CMOS ULN2064B ULN2064LB ULN2065Bf 50 V 35 V 15 V TTL, DTL, Schottky TTL, and 5 V CMOS 80 V 50 V 15 V ULN2068Bt ULN2068LB ULN2069B 50 V 35 V 15 V 80 V 50 V 15 V V ,N Application TTL, DTL, Schottky TTL , designed for interface between low-level logic and a variety of peripheral loads such as relays, solenoids , ) Output Voltage, VCEX.See Guide Output Sustaining Voltage, Quad drivers ULN2064B -
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D50433B ULN2064/65B ULN2064B/LB G5G433 D50433 D504336

BASIC COMPARATOR CIRCUITS

Abstract: , DTL, ECL and CMOS logic system Basic comparator Pulse comparator MOS clock driver KA710/I 14 DIP , LINEAR ICs 8. VOLTAGE COMPARATOR Function Device Package Features FUNCTION GUIDE , drift Compatible with practically all types of integrated logic High precision comparators Reduced V0s , form of logic Power drain suitable for battery operation Low input biasing current: 25nA Low output , voltage 250mV at 4mA M ultivibrator output is compatible with DTL and as well as MOS circuits voltage
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BASIC COMPARATOR CIRCUITS KA311 KA393/A KA2903 KA293/A KA319 KA219

CAG30

Abstract: TELEDYNE except the CAG6 operate directly from DTL or TTL logic without special biasing. Most will work with , switching up to ±10V signals directly from DTL or TTL while providing high logic noise immunity (typically , for normal operation. The following pages may help you in your final selection. The guide shown below , numerical order. SELECTION GUIDE - FET ANALOG GATES 2 > TELEDYNE 147 Sherman Street, Cambridge, Mass , 'lQQ VcC 0 r' â'¢ 60 OHM MAX. Ron â'¢ WORKS DIRECTLY FROM LOGIC â'¢ HIGH LOGIC NOISE IMMUNITY â
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uln2065bt

Abstract: ULN2065 \ FEATURES TTL, DTL, MOS, CMOS Compatible Inputs Transient-Protected Outputs Loads to 480 Watts , V 50 V 80 V 50 V 80 V Min. V CE(SUS) Max. V ,N Application TTL, DTL, Schottky TTL, and 5 V CMOS TTL, DTL, Schottky TTL, and 5 V CMOS TTL, DTL, Schottky TTL, and 5 V CMOS DISSIPATION , Darlington arrays ULN2061M through ULN2069B are designed for interface between low-level logic and a variety , /LB, ULN2065B, ULN2068B/LB, and ULN2069B are intended for use with TTL, low-speed TTL, and 5 V MOS
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uln2065bt ULN2065 2064/65B 2068LB ULN2066B/LB

GP027 diode

Abstract: GP027 with TTL, low-speed TTL, and 5 V MOS logic. The ULN2065B and ULN2069B are selected for the 80 V , SOICs (suffix LB). FEATURES â  TTL, DTL, MOS, CMOS Compatible Inputs â  Transient-Protected , Min. Max. t CE(SUS) V ,N 50 V 80 V 35 V 50 V 30 V 60 V TTL, DTL, Schottky TTL, and 5 V CMOS 50 V 35 V 15 V TTL, DTL, Schottky TTL, and 5 V CMOS 80 V 50 V 15 V , V Application TTL, DTL, Schottky TTL, and 5 V CMOS * Suffixes â'˜LBâ'™ are SOICs, â'˜Bâ
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GP027 diode GP027 2064L
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