MB91F465XA REL20070807 DS91F465XA001 DS91F465XA002 DS91F465XA003 DS91F465XA004 - Datasheet Archive

 

MB91F465XA ds91460x-ds07-16611-1e-corr-x1-00.doc © Fujitsu Microelectronics Europe GmbH Addendum, MB91F465XA Datasheet

 

Corrections of Datasheet MB91F465XA MB91F465XA ds91460x-ds07-16611-1e-corr-x1-00.doc © Fujitsu Microelectronics Europe GmbH Addendum, MB91F465XA MB91F465XA Datasheet (ds91460x-ds07-16611-1e) This is the Addendum for the Datasheet ds91460x-ds07-16611-1e of the MB91F465XA MB91F465XA microcontroller. It describes all known discrepancies of the MB91F465XA MB91F465XA microcontroller Datasheet. The FlexRay IP-Module integrated to MB91F465XA MB91F465XA supports the FlexRay Revision 1.0.0. All described FlexRay related discrepancies are based on errata-sheet "E-RAY, FlexRAY IP-Module", REL20070807 REL20070807 by Robert Bosch GmbH, released 07.08.2007. Ref. Number Date Versi on No. Chapter/ Page Description/Correction (Text Link) dd.mm.yy DS91F465XA001 DS91F465XA001 11.09.07 V1.00 Page 3 *) DS91F465XA002 DS91F465XA002 11.09.07 V1.00 Page 4 *) DS91F465XA003 DS91F465XA003 11.09.07 V1.00 Page 5 *) DS91F465XA004 DS91F465XA004 11.09.07 V1.00 Page 6 *) DS91F465XA005 DS91F465XA005 11.09.07 V1.00 Page 6 *) DS91F465XA006 DS91F465XA006 11.09.07 V1.00 Page 7 *) DS91F465XA007 DS91F465XA007 11.09.07 V1.00 Page 8 *) Missing cycle start interrupt in startup phase. Update of status registers CCEV and CCSV. Clearing of interrupt flags EIR.PEMC, SIR.WST, SIR.WUPA, SIR.WUPB, SIR.CAS,SIR.SUCS not accepted. Content error detected in sync frame at slot boundary. Loop back mode operates only at 10 MBit/s. False clock correction value possible in case action point coincides with end of received sync frame. Noise following a dynamic frame that delays idle detection may fail to stop slot counting for the remainder of the dynamic (Internal ref. number) ds91460x-ds07-16611-1e-corr-x1-00.doc 1 / 19 DS91F465XA008 DS91F465XA008 11.09.07 V1.00 Page 9 *) DS91F465XA009 DS91F465XA009 11.09.07 V1.00 Page 10 *) DS91F465XA010 DS91F465XA010 11.09.07 V1.00 Page 10 *) DS91F465XA011 DS91F465XA011 11.09.07 V1.00 Page 11 *) DS91F465XA012 DS91F465XA012 11.09.07 V1.00 Page 11 *) DS91F465XA013 DS91F465XA013 11.09.07 V1.00 Page 12 *) DS91F465XA014 DS91F465XA014 11.09.07 V1.00 Page 13 *) DS91F465XA015 DS91F465XA015 11.09.07 V1.00 Page 13 *) DS91F465XA016 DS91F465XA016 11.09.07 V1.00 Page 14 *) DS91F465XA017 DS91F465XA017 11.09.07 V1.00 Page 14 *) DS91F465XA018 DS91F465XA018 11.09.07 V1.00 Page 15 *) DS91F465XA019 DS91F465XA019 11.09.07 V1.00 Page 16 *) DS91F465XA020 DS91F465XA020 11.09.07 V1.00 Page 18 *) DS91F465XA021 DS91F465XA021 11.09.07 DS91F465XA022 DS91F465XA022 11.09.07 V1.00 V1.00 Page 18 *) Page 19 *) ds91460x-ds07-16611-1e-corr-x1-00.doc 2 / 19 segment. Mismatch between macrotick value and cycle counter value at cycle boundary. Wrong payload data transmitted due to disturbed channel-idle sequence. Status of Network Management Vector NMVn after the CC has left NORMAL_ACTIVE or NORMAL_PASSIVE state by application of commands READY, HALT, or FREEZE. Reception of wakeup pattern ignaled for channel disconnected by SUCC1.CCHA/B = '0'. Clock correction value calculated with wrong deviation value. Wrong payload data written to receive buffer. In case of a faulty configuration of pLatestTx and transmission across dynamic segment boundary error flags EIR.LTVA/B may not be set when a latest transmit violation occurs. In case eray_bclk is below eray_sclk/2, TEST1.CERA/B may fail to report a detected coding error. Generating EIR.SFO considers number of sync frames in the last cycle only, double cycle not evaluated. CAS collision in case of macrotick length > CAS. Reception of more than gSyncNodeMax different sync frames per double cycle may lead to incorrect offset correction value. Time stamp of the wrong channel may be used for offset correction term calculation if reception time stamps of a sync frame are different for channel A and B. Sync frame reception after noise or aborted frame before action point. Additional SIR.WST events. Update of Aggregated Channel Status ACS in dynamic segment in minislots following slot ID 2047. DS91F465XA023 DS91F465XA023 11.09.07 1.00 Page 20 *) DS91F465XA024 DS91F465XA024 11.09.07 V1.00 Page 20 *) DS91F465XA025 DS91F465XA025 11.09.07 V1.00 Page 22 *) DS91F465XA026 DS91F465XA026 11.09.07 V1.00 Page 23 *) DS91F465XA027 DS91F465XA027 11.09.07 V1.00 Page 23 *) DS91F465XA028 DS91F465XA028 11.09.07 V1.00 Page 24 *) DS91F465XA029 DS91F465XA029 11.09.07 V1.00 Page 25 *) DS91F465XA030 DS91F465XA030 11.09.07 V1.00 Page 26 *) DS91F465XA031 DS91F465XA031 15.04.08 V1.00 Chapter "Embedded Program/Data Memory" Faulty update of LDTS.LDTA,B[10:0] due to parity error. Improper resolution of startup collision. 'integration successful on X' and 'integration abort on Y' at the same point in time leads to inconsistent states of SUC and GTU. Detection of parity errors outside immediate scope. CCSV.SLM [1:0] delayed to CCSV.POCS[5:0] on transitions between states WAKEUP and READY. Wakeup listen counter started one bit time early. Payload corruption after reception of valid frame followed by slot boundary crossing frame. CCSV.RCA[4:0] and CCSV.PSL[5:0] inconsistent after FREEZE command. Note regarding the selection of MCU operations modes. *) These marked descriptions are FleyRay IP-Module related. The side indication describes where to find the described discrepancy in the errata sheet "E-RAY, FlexRAY IP-Module", REL20070807 REL20070807 by Robert Bosch GmbH, released 07.08.2007. ds91460x-ds07-16611-1e-corr-x1-00.doc 3 / 19 DS91F465XA001 DS91F465XA001 TOP Title: Missing cycle start interrupt in startup phase. Description: When communication is restarted by CHI command RUN after the CC left STARTUP, NORMAL_ACTIVE, or NORMAL_PASSIVE state by application of CHI command READY it may happen, that the cycle start interrupt flag SIR.CYCS is not set in · cycle 0 in case of a leading coldstarter · cycles 0-2 in case of an integrating node of the following startup phase (see FlexRay Protocol Spec v2.1, fig. 7-10). Scope: The erratum is limited to applications where READY command is used to leave STARTUP, NORMAL_ACTIVE, or NORMAL_PASSIVE state. Effects: Leading coldstarter: In cycle 0 of the startup phase no cycle start interrupt is generated Integrating node: In cycles 0-2 of the startup phase no cycle start interrupt is generated. Workaround: Don't leave STARTUP, NORMAL_ACTIVE, or NORMAL_PASSIVE state by application of CHI command READY. Severity: (low, medium, high) Low, cycle start interrupt is generated correctly for all following cycles. Classification: Non Critical Error DS91F465XA002 DS91F465XA002 TOP Title: Update of status registers CCEV and CCSV delayed with respect to interrupt flags EIR.PEMC, SIR.WST, SIR.SUCS, SIR.WUPA, SIR.WUPB. Description: A change of Error Mode, Protocol Operation Control Status, and Wakeup Status sets the interrupt flags EIR.PEMC, SIR.WST, SIR.SUCS, SIR.WUPA, and SIR.WUPB. The status registers are copied into the Host clock domain (CCEV, CCSV) to allow read access. This clock domain crossing delays the update of the respective status fields CCEV.ERRM[1:0], CCSV.POCS[5:0], and CCSV.WSV[2:0] by up to 5 cycles of the slower of the two clocks eray_bclk and eray_sclk in relation to the change of the interrupt flags. Scope: The erratum is limited to applications where evaluation of the status fields CCEV.ERRM[1:0], CCSV.POCS[5:0], and CCSV.WSV[2:0] is triggered by a change of one of the interrupt flags EIR.PEMC, SIR.WST, SIR.SUCS, SIR.WUPA, or SIR.WUPB. Effects: In case the Host reads the Error Mode CCEV.ERRM[1:0], the Protocol Operation Control Status CCSV.POCS[5:0], or the Wakeup Status CCSV.WSV[2:0] directly after the respective interrupt flag was set, it may happen that registers CCEV respectively CCSV are not yet updated. Workaround: Delay reading of status fields CCEV.ERRM[1:0], CCSV.POCS[5:0], or CCSV.WSV[2:0] for at least 6 cycles of the slower of the two clocks eray_bclk and eray_sclk after the respective interrupt flag was set. ds91460x-ds07-16611-1e-corr-x1-00.doc 4 / 19 Severity: (low, medium, high) Low, due to interrupt response time the problem is not relevant for most applications. Classification: Non Critical Error DS91F465XA003 DS91F465XA003 TOP Title: Clearing of interrupt flags EIR.PEMC, SIR.WST, SIR.WUPA, SIR.WUPB, SIR.CAS, SIR.SUCS not accepted. Description: A change of POC Error Mode, Wakeup Status, reception of a Collision Avoidance Symbol, or a successfully completed startup sets some of the interrupt flags EIR.PEMC, SIR.WST, SIR.WUPA, SIR.WUPB, SIR.CAS, and SIR.SUCS. Because the set condition for the respective interrupt flag may be active for up to 4 eray_bclk + 4 eray_sclk cycles, it can happen that the flag is not reset to '0' if the Host clears the flag directly after it has been set. Scope: The erratum is limited to applications where the interrupt flags EIR.PEMC, SIR.WST, SIR.WUPA, SIR.WUPB, SIR.CAS, SIR.SUCS are used for interrupt generation. Effects: In case the Host clears one of the affected flags, it may happen that the interrupt stays active. A following read access will return '1' for the respective flag. Workaround: After clearing of one of the affected interrupt flags, the Host has to re-read the flag. If the flag is still set, the Host has to repeat the sequence until it reads a '0'. Severity: (low, medium, high) Low, due to interrupt response time the problem is not relevant for most applications. Classification: Non Critical Error DS91F465XA004 DS91F465XA004 TOP Title: Content error detected in sync frame at slot boundary. Description: In case a slot is configured for sync frame reception and a valid sync frame was received on one channel while a content error is detected exactly at the last eray_sclk of that slot on the other channel, the valid sync frame is used for clock synchronization. For this case the FlexRay protocol specification requires that the valid frame is not used for clock synchronization. See FlexRay protocol specification v2.1, Fig. 6-8 on page 135. If the content error on the other channel is detected at least one eray_sclk earlier, the valid sync frame is not used for clock synchronisation (correct behaviour). If the frame on the other channel is decoded one eray_sclk later, this results in a boundary violation, not a content error; the valid sync frame is used for clock synchronisation (also correct behaviour). Scope: ds91460x-ds07-16611-1e-corr-x1-00.doc 5 / 19 The erratum is limited to cases where a valid sync frame is received on one channel while a frame with content error is decoded at the last eray_sclk of the slot on the other channel. Effects: In the described case the valid sync frame is used for clock synchronization. Workaround: Not necessary. Severity: (low, medium, high) Low, probability for content error detection at last eray_sclk of slot is low. The used sync frame is probably valid, otherwise it is filtered by the fault tolerant midpoint algorithm (see FlexRay protocol specification v2.1, section 8.6.1). Classification: Non Critical Error DS91F465XA005 DS91F465XA005 TOP Title: Loop back mode operates only at 10 MBit/s. Description: The looped back data is falsified at the two lower baud rates of 5 and 2.5 MBit/s. Scope: The erratum is limited to test cases where loop back is used with the baud rate prescaler (PRTC1.BRP[1:0]) configured to 5 or 2.5 MBit/s. Effects: The loop back self test is only possible at the highest baud rate. Workaround: Run loop back tests with 10 MBit/s (PRTC1.BRP[1:0] = "00"). Severity: (low, medium, high) Low, loop back test at 10 MBit/s functional and recommended. Classification: Non Critical Error DS91F465XA006 DS91F465XA006 TOP Title: False clock correction value possible in case action point coincides with end of received sync frame. Description: In case the action point coincides with the end of a received sync frame, the relative deviation value (= time between secondary time reference point and action point) of this particular sync frame is seen as zero. Critical Case: When a valid sync frame is received in a specific time relation to the node's internal action point (internal signal prt_frame_decoded is high one eray_sclk period after high pulse of gtu_action_point). Not critical when the frame is decoded one eray_sclk before or one eray_sclk after this critical case. Scope: The erratum is limited to cases where the frame length is configured to a smaller value than the action point offset, and the complete frame is received between start of the slot and the slot's action point. Effects: In the described case a relative deviation value of zero is calculated from the received valid sync frame. This may result in a lower absolute value for the next offset and/or rate correction. ds91460x-ds07-16611-1e-corr-x1-00.doc 6 / 19 Workaround: Avoid configurations with frame length smaller than action point offset. Severity: (low, medium, high) Low, in practical applications the action point offset is smaller than the sync frame length. Classification: Non Critical Error DS91F465XA007 DS91F465XA007 TOP Title: Noise following a dynamic frame that delays idle detection may fail to stop slot counting for the remainder of the dynamic segment. Description: If (in case of noise) the time between 'potential idle start on X' and 'CHIRP on X' (see Protocol Spec. v2.1, Figure 5-21) is greater than gdDynamicSlotIdlePhase, the E-Ray will not remain for the remainder of the current dynamic segment in the state 'wait for the end of dynamic slot rx'. Instead, the E-Ray continues slot counting. This may enable the node to further transmissions in the current dynamic segment. Scope: The erratum is limited to noise that is seen only locally and that is detected in the time window between the end of a dynamic frame's DTS and idle detection ('CHIRP on X'). Effects: In the described case the faulty node may not stop slot counting and may continue to transmit dynamic frames. This may lead to a frame collision in the current dynamic segment. Workaround: None. Severity: (low, medium, high) Low, problem only occurs at local bus errors in a specific short time window. Even without this erratum no communication is possible for the remainder of the dynamic segment if noise is seen by all nodes. Classification: Non Critical Error DS91F465XA008 DS91F465XA008 TOP Title: Mismatch between macrotick value and cycle counter value at cycle boundary. Description: The macrotick value MTCCV.MTV[13:0] is updated one eray_bclk period before the cycle counter value MTCCV.CCV[5:0] is updated. If a stop watch event occurs in the last macrotick of a cycle (in the last 4 eray_bclk periods before cycle counter increment), the captured macrotick value STPW1.SMTV[13:0] and the captured cycle counter value STPW1.SCCV[5:0] will have the same mismatch. If the Timer 0 Macrotick Offset T0C.T0MO[13:0] is configured to zero and the current cycle count is matching the configured Timer 0 Cycle Code T0C.T0CC[6:0] while timer 0 is in mode 'running', a timer 0 interrupt is generated erroneously at the end of the matching cycle. Scope: The erratum is limited to cases where register MTCCV is read one eray_bclk period before the cycle counter is incremented. For the stop watch feature the ds91460x-ds07-16611-1e-corr-x1-00.doc 7 / 19 erratum is limited to the case where the stop watch event occurs in the last macrotick of a cycle (latest 4 eray_bclk periods before cycle counter increment). With respect to timer 0 the erratum is limited to a Timer 0 Macrotick Offset of zero. Effects: In the described cases the values of macrotick and cycle counter in register MTCCV and the captured values of macrotick and cycle counter in register STPW1 may not be consistent. In addition a timer 0 interrupt may be generated erroneously at the end of the cycle matching the configured Timer 0 Cycle Code. Workaround: Re-read register MTCCV if it was read at the end of a cycle. Consider the reduced time resolution if the stop watch was triggered at the end of a cycle. Don't configure a Timer 0 Macrotick Offset of zero. Severity: (low, medium, high) Low, can be avoided by workaround. Classification: Non Critical Error DS91F465XA009 DS91F465XA009 TOP Title: Wrong payload data transmitted due to disturbed channel-idle sequence. Description: If the E-Ray does not detect channel-idle (11 consecutive bit HIGH) between the end of a transmission and the beginning of the next transmission in the following transmit slot due to disturbances on the FlexRay bus, a frame with wrong payload data may be transmitted in the following transmit slot. Note: Disturbances on the FlexRay bus in the extent needed to reproduce the described behaviour are beyond the scope of the FlexRay Conformance Test. Scope: The erratum is limited to the case where no channel-idle sequence is detected between two frames transmitted by the same node in two consecutive static transmit slots. Effects: The frame transmitted in a slot following a transmit slot with completely destroyed channel- idle sequence holds wrong payload data. Workaround: None. Severity: (low, medium, high) Low, problem only occurs due to severe disturbances on the FlexRay bus. In case of such disturbances it is very likely that the transmitted frames are also disturbed and will not be accepted by the receivers. The probability for occurrence of that problem decreases when the gap between slot boundaries and start of frame resp. end of frame is increased. Classification: Non Critical Error DS91F465XA010 DS91F465XA010 TOP Title: Status of Network Management Vector NMVn after the CC has left NORMAL_ACTIVE or NORMAL_PASSIVE state by application of commands READY, HALT, or FREEZE. Description: When communication is restarted after the CC has left NORMAL_ACTIVE or NORMAL_PASSIVE state by application of commands READY, HALT, or FREEZE, it may happen that NMVn holds invalid data before re-entering NORMAL_ACTIVE state. ds91460x-ds07-16611-1e-corr-x1-00.doc 8 / 19 Scope: The erratum is limited to cases where NMVn is read by the Host when the CC is outside NORMAL_ACTIVE or NORMAL_PASSIVE state. Effects: In the described case the Host may read data from NMVn which originates from previous communication cycles. Workaround: Don't evaluate the Network Management Vector NMVn outside NORMAL_ACTIVE or NORMAL_PASSIVE state. Severity: (low, medium, high) Low, problem only appears outside NORMAL_ACTIVE or NORMAL_PASSIVE state. Classification: Non Critical Error DS91F465XA011 DS91F465XA011 TOP Title: Reception of wakeup pattern signalled for channel disconnected by SUCC1.CCHA/B = '0'. Description: In case the CC is physically connected to a two channel network while one of the two channels is disabled by the Host by programming SUCC1.CCHA/B = '0', the CC will signal the reception of a wakeup pattern on that channel by SIR.WST = '1' and CCSV.WSV = "010" (RECEIVED_WUP). Scope: The erratum is limited to cases where the CC is physically connected to both channels of a two channel network and one of the two channels is configured to be disconnected by the Host by programming SUCC1.CCHA/B = '0'. Effects: Despite SUCC1.CCHA/B = '0' the CC signals the reception of wakeup pattern on the virtually disconnected channel. Workaround: None. Severity: (low, medium, high) Low, the affected configuration is not a realistic application. No problem in single channel applications. Classification: Non Critical Error DS91F465XA012 DS91F465XA012 TOP Title: Clock correction value calculated with wrong deviation value. Description: In case of receiving a valid frame after detecting an invalid frame before the action point, the clock correction value is calculated with a wrong deviation value. Scope: The erratum is limited to the case where an invalid frame (at least valid TSS, FSS, and BSS) is detected before the action point and a valid frame, starting after the action point, is received in the same slot. Effects: The relative deviation (= time between secondary time reference point and action point) of the invalid frame is stored for the following rate and offset correction value calculation. This wrong deviation value may be used by the FTM algorithm to calculate the midpoint. Only in this case a wrong offset and/or rate correction value is calculated. Workaround: ds91460x-ds07-16611-1e-corr-x1-00.doc 9 / 19 None. Severity: (low, medium, high) Low, the probability of noise leading to detect a frame start or an invalid frame before the action point followed by a valid frame is very low. Due to the FTM algorithm the impact of a single faulty deviation value is low. Classification: Non Critical Error DS91F465XA013 DS91F465XA013 TOP Title: Wrong payload data written to receive buffer. Description: When a receive slot is directly followed by a transmit slot and when the eray_bclk frequency is below the minimum frequency required for the configured (minislot) action point offset as listed in the table below, it may happen, that a word of the received payload is stored twice into the respective receive buffer in the Message RAM while all following words are shifted by one address, and the last word is lost. With the maximum payload of 254 byte and both channels used (SUCC1.CCHA/B = '1') the problem may appear, depending on the configured (M)APO and TSST, if the eray_bclk is below the minimum value listed in the table below. In case only one channel is used (SUCC1.CCHA or B = '0') the values above can be multiplied by 0.66. With lower payload values the minimum eray_bclk also decreases. Scope: The erratum is limited to the case where eray_bclk is below a minimum frequency. This frequency depends on the configuration of GTUC9.APO, GTUC9.MAPO, and PRTC1.TSST as well as on the configured payload. Effects: The payload of the affected receive buffer is falsified. Workaround: Configure (M)APO and TSST according to table above depending on the used eray_bclk frequency. ds91460x-ds07-16611-1e-corr-x1-00.doc 10 / 19 Severity: (low, medium, high) Low, problem does not appear with (M)APO configurations used in actual applications and the eray_bclk frequencies implemented in the available designs. Classification: Non Critical Error DS91F465XA014 DS91F465XA014 TOP Title: In case of a faulty configuration of pLatestTx and transmission across dynamic segment boundary error flags EIR.LTVA/B may not be set when a latest transmit violation occurs. Description: Prerequisites: 1. Faulty configuration of pLatestTx (MHDC.SLT[12:0]) does not prevent transmission of frame X in cycle n and frame Y in cycle n+1. 2. The last dynamic frame X transmitted in cycle n ends in minislot m. Fault Case: In case frame Y is the only frame transmitted in the dynamic segment of cycle n+1 and frame Y is transmitted across the end of dynamic segment and the last minislot of dynamic segment has the value m, error flags EIR.LTVA/B (Latest Transmit Violation Channel A,B) are not set while EIR.TABA/B (Transmission Across Boundary Channel A,B) are set as specified. Scope: The erratum is limited to the case where a transmission across dynamic segment boundary is not prevented because of a faulty configuration of pLatestTx (MHDC.SLT[12:0]). Effects: In case of transmission across dynamic segment boundary the CC enters POC state HALT and the error flags EIR.TABA or EIR.TABB are set. In case of a faulty configuration of pLatestTx, the flags EIR.LTVA or EIR.LTVB are not set. Workaround: Configure pLatestTx as required by the FlexRay protocol specification v2.1. Severity: (low, medium, high) Low, problem appears only with faulty configuration of pLatestTx. Classification: Non Critical Error DS91F465XA015 DS91F465XA015 TOP Title: In case eray_bclk is below eray_sclk/2, TEST1.CERA/B may fail to report a detected coding error. Description: All detected coding errors should be reported in the Test Register 1, at TEST1.CERA/B. If eray_bclk is below eray_sclk/2, it may happen, depending on phase difference of eray_bclk and eray_sclk, that TEST1.CERA/B are not updated in case of a detected coding error and remain in the state "0000" = "No coding error detected". Scope: The erratum is limited to the case where eray_bclk is below eray_sclk/2. Effects: Coding errors not reported via TEST1.CERA/B. The frame decoding is not affected. Workaround: None. Severity: (low, medium, high) ds91460x-ds07-16611-1e-corr-x1-00.doc 11 / 19 Low, only hardware test function affected. Classification: Non Critical Error DS91F465XA016 DS91F465XA016 TOP Title: Generating EIR.SFO considers number of sync frames in the last cycle only, double cycle not evaluated. Description: In case that there are different sync IDs received for the two cycles of a double cycle, and the total number of sync frames with different IDs received in the double cycle exceeds the maximum number of sync frames as configured by GTUC2.SNM[3:0] while the number of sync frames within each cycle of the double cycle is below GTUC2.SNM[3:0], the sync frame overflow indication EIR.SFO is not set. Scope: The erratum is limited to the case where sync frames with different IDs are received in even and odd cycles and where the total number of sync frames is greater than GTUC2.SNM[3:0]. Effects: No sync frame overflow signalled if number of received sync frames in each of the two cycles of a double cycle is below the maximum number of sync frames as configured by GTUC2.SNM[3:0]. Workaround: None. Severity: (low, medium, high) Low, problem only appears in case of GTUC2.SNM[3:0] lower than the number of sync nodes configured in a cluster. Classification: Non Critical Error DS91F465XA017 DS91F465XA017 TOP Title: CAS collision in case of macrotick length > CAS. Description: A leading coldstarter that has switched from state COLDSTART_LISTEN to COLDSTART_COLLISION_RESOLUTION and that receives a CAS symbol transmitted by another coldstarter in the time window of cCASActionPointOffset (1 MT) after the state change will transmit a CAS symbol at the CAS action point. This CAS symbol should have been suppressed. Scope: The erratum is limited to the case where the macrotick is configured to be longer than the CAS symbol. Effects: A CAS collision will disturb the first cycle of the startup, delaying the startup success by one cycle. Workaround: None. Severity: (low, medium, high) Low, in actual applications the macrotick length is configured to be shorter than CAS. Low probability for two coldstarters to transmit a CAS almost simultaneously. Classification: ds91460x-ds07-16611-1e-corr-x1-00.doc 12 / 19 Non Critical Error DS91F465XA018 DS91F465XA018 TOP Title: Reception of more than gSyncNodeMax different sync frames per double cycle may lead to incorrect offset correction value. Description: In case of receiving gSyncNodeMax or more sync frames in an even cycle, only frames with the same sync frame IDs, as received in the even cycle, may be used for offset correction term calculation in the following odd cycle. The E-Ray erroneously uses the first gSyncNodeMax sync frames for offset correction term calculation in the odd cycle, regardless whether they have been also received in the previous even cycle. Scope: The erratum is limited to the case where more than gSyncNodeMax nodes are configured to transmit sync frames and where different sets of sync frames are transmitted in even and odd cycle. Effects: In the described case the offset correction term may base on a different set of sync frames than the rate correction term. In this case registers ESIDn / OSIDn hold the IDs of the first received sync frames up to gSyncNodeMax used for offset correction term calculation. Workaround: Avoid faulty configurations with more than gSyncNodeMax nodes configured to be transmitter of sync frames. Severity: (low, medium, high) Low, problem only appears in case of faulty configurations where the number of sync nodes configured in a cluster is greater than gSyncNodeMax (GTUC2.SNM[3:0]). Classification: Non Critical Error DS91F465XA019 DS91F465XA019 TOP Title: Time stamp of the wrong channel may be used for offset correction term calculation if reception time stamps of a sync frame are different for channel A and B. Description: In case the temporal deviation (= time between primary time reference point and action point offset) is different for channel A and B and the values have the following combination · greater than or equal zero on one channel and negative on the other channel the channel with a relative deviation value greater than or equal zero is chosen for offset correction term calculation instead of the negative value. Scope: The erratum is limited to the case where both channels are used and if there is a large difference in the propagation delays on channel A and B. Effects: In case of the described relation between measured deviation values on channel A and B, the calculated offset correction term may have an error of maximum the difference between the two deviation values. Thus, the error of the local time of the node is limited to the difference of the temporal deviation values of both channels. ds91460x-ds07-16611-1e-corr-x1-00.doc 13 / 19 Workaround: For dual channel FlexRay systems sync frames have to be transmitted on both channels. In practice, the propagation delay between two nodes is expected to be nearly the same on both channels. If this is not the case, the channel depending parameter pDelayCompensation[ A/B] (GTUC5.DCA,B) has to be used to compensate the different propagation delays. With a correct adjustment of the parameter the difference of the deviation values on both channels is expected to be very low. Therefore, the error of the local time caused by the implementation error is also minimized. Severity: (low, medium, high) Low, problem only appears with dual-channel topologies. Workaround helps to minimize the impact of the faulty behaviour. Classification: Non Critical Error DS91F465XA020 DS91F465XA020 TOP Title: Sync frame reception after noise or aborted frame before action point. Description: In case noise or an aborted frame leads to the detection of a secondary time reference point (STRP), and after this, a valid sync frame is detected in the same slot and the STRP of the valid sync frame occurs simultaneously with the action point, the temporal deviation value of the first detected STRP is stored instead of the value of the correct STRP. Scope: The erratum is limited to the case of noise before reception of a valid sync frame or a frame reception starting before action point is aborted and then a valid sync frame is received in the same slot. Effects: In the described case a wrong deviation value is used for correction term calculation. Depending on number of sync frames and other measured temporal deviation values it may lead to an incorrect rate or offset correction value. Workaround: None. Severity: (low, medium, high) Low, the problem occurs only in case of noise or frame abortion between slot boundary and action point. The resulting incorrect rate and offset corrections will be corrected in following cycles. Very low probability for combination of both conditions. Classification: Non Critical Error DS91F465XA021 DS91F465XA021 TOP Title: Additional SIR.WST events. Description: The Status Interrupt flag SIR.WST is set not only at the conditions described in the E-Ray Specification at chapter 4.4.2, but also when the wakeup process is aborted by CHI-Commands FREEZE or READY. Scope: ds91460x-ds07-16611-1e-corr-x1-00.doc 14 / 19 The erratum is limited to cases where a wakeup process is intentionally aborted by the Host. Effects: SIR.WST is set even if the conditions described in the E-Ray Specification are not met. Workaround: Ignore SIR.WST after the Host intentionally aborted a wakeup process. Severity: (low, medium, high) Low, low-effort workaround available. Classification: Non Critical Error DS91F465XA022 DS91F465XA022 TOP Title: Update of Aggregated Channel Status ACS in dynamic segment in minislots following slot ID 2047. Description: In case the slot counter has reached ID 2047 and the end of dynamic segment is not reached, the slot counter wraps around to 0 and stays there until the end of the dynamic segment. In this state (slot counter = 0) the E-Ray erroneously updates register ACS every minislot. The correct behaviour is that the slot status is only updated at the end of the dynamic segment. Scope: The erratum is limited to the following case: gNumberOfStaticSlots + gNumberOfMinislots > cSlotIDMax = 2047 Effects: In the described case register ACS is updated every minislot until the end of the dynamic segment. This update may also lead to an update of error interrupt flags EIR.EDA, B. Workaround: Avoid configurations with gNumberOfStaticSlots + gNumberOfMinislots > cSlotIDMax. Severity: (low, medium, high) Low, effect of incorrect update of register ACS and error interrupt flags EIR.EDA, B is uncritical. Classification: Non Critical Error DS91F465XA023 DS91F465XA023 TOP Title: Faulty update of LDTS.LDTA,B[10:0] due to parity error. Description: In case a parity error occurs when the message handler transfers data from the Message RAM to the Transient Buffer it may happen, that the transmission is not started. Scope: The erratum is limited to cancelled transmissions of dynamic frames when a parity error occurs during data transfer from Message RAM to the Transient Buffer. Effects: When the described condition occurs, the slot counter value is captured and LDTS.LDTA,B[10:0] is updated with this value at the end of the dynamic segment. Workaround: ds91460x-ds07-16611-1e-corr-x1-00.doc 15 / 19 None. Severity: (low, medium, high) Low, applies only in case of a cancelled dynamic frame transmission due to a parity error. Classification: Non Critical Error DS91F465XA024 DS91F465XA024 TOP Title: Improper resolution of startup collision. Description: In case a CAS symbol is received during startup exactly at the beginning of cycle 0, the detection of following startup frames is not possible. Scope: The erratum is limited to the case where a CAS symbol is received during startup exactly at the beginning of cycle 0. Effects: In the described case the CC is not able to transit from STARTUP to NORMAL_ACTIVE state. Workaround: Leave and re-enter STARTUP state by Host commands READY and RUN. Severity: (low, medium, high) Low, probability for occurrence of problem very low, workaround available. Classification: Non Critical Error DS91F465XA025 DS91F465XA025 TOP Title: 'integration successful on X' and 'integration abort on Y' at the same point in time leads to inconsistent states of SUC and GTU. Description: In case of 'integration successful on X' and 'integration abort on Y' at the same point in time, the SUC prioritizes the input event of successful integration, leaves the state POC:initialize schedule and enters, depending of its startup role, either POC:integration coldstart check or POC:integration consistency check. The reaction of the GTU depends on the related channels and the actual state of clock synchronisation startup process. Assumed is that the GTU is in state CSP:A active. For the combination of 'integration successful on A' and 'integration abort on B' the GTU stops the macrotick generation process and terminates both clock synchronisation startup processes. In this case the CC is stuck in POC:integration coldstart check or POC:integration consistency check. For the other combination of 'integration successful on B' and 'integration abort on A' the GTU stops the macrotick generation process but keeps the clock synchronisation startup process of channel A running. This leads to a delayed (best case two cycles) successful startup of the E-Ray. If the GTU is in state CSP:B active, the same is true with the swapped channels. The combination of 'integration successful on B' and 'integration abort on A' leads to the stuck condition and the combination of 'integration successful on A' and 'integration abort on B' leads to a delayed startup. Scope: ds91460x-ds07-16611-1e-corr-x1-00.doc 16 / 19 The erratum is limited to the case of simultaneous generation of internal signals 'integration successful on X' on one channel and 'integration abort Y' on the other channel. Effects: In the described cases the E-Ray either is stuck in startup states or extends the startup by at least two cycles. Workaround: Use a timer to measure how long the E-Ray stays in state POC:integration coldstart check or POC:integration consistency. If the timeout is reached, reenter the startup state by using the CHI commands READY and RUN. Severity: (low, medium, high) Low, problem only appears with dual-channel topologies, workaround available. Classification: Non Critical Error DS91F465XA026 DS91F465XA026 TOP Title: Detection of parity errors outside immediate scope. Description: The protocol engine reads at least the first two words of its Transient Buffer and one word more than required by the payload count for each transmitted message, even if no data is needed (null frame or payload count is zero). If a parity error is detected when the protocol engine reads from the Transient Buffer, the transmitted message is invalidated by setting its CRC code to zero, as described in chapter 5.12.3 of the User's Manual. Scope: The erratum is limited to the case where a parity error occurs in one of the words in the Transient Buffer that are read but not needed for a particular message. Effects: The transmitted message is invalidated. Workaround: None, to be treated as if the parity error is in any other word of the Transient Buffer. Severity: (low, medium, high) Low, parity error needs to be solved regardless of position in Transient Buffer. Classification: Non Critical Error DS91F465XA027 DS91F465XA027 TOP Title: CCSV.SLM [1:0] delayed to CCSV.POCS[5:0] on transitions between states WAKEUP and READY. Description: When the POC state changes between WAKEUP and READY the content of register CCSV may show a slight discontinuity, i.e. CCSV.SLM [1:0] may be updated late. Scope: The erratum is limited to configurations with SUCC1.TSM = '0' (ALL Slot Mode). Effects: None, CCSV.SLM [1:0] only relevant in POC states NORMAL_ACTIVE and NORMAL_PASSIVE. Workaround: Ignore CCSV.SLM [1:0] in states READY and WAKEUP. Severity: (low, medium, high) ds91460x-ds07-16611-1e-corr-x1-00.doc 17 / 19 Low, workaround available. Classification: Non Critical Error DS91F465XA028 DS91F465XA028 TOP Title: Wakeup listen counter started one bit time early. Description: If the protocol engine is in the state WAKEUP_LISTEN and if the parameter gdWakeup- SymbolRxLow is programmed to a value 11-n, then the channel idle recognition CHIRP comes n bit times early. Scope: The erratum is limited to configurations with gdWakeupSymbolRxLow < 11. For bit rates of 10/5/2.5 MBit/s, Protocol Version 2.1 Rev A requires a minimum gdWakeupSymbolRx- Low of 46/23/11 gdBit. Effects: The wakeup pattern is transmitted n bit times early. Workaround: Set gdWakeupSymbolRxLow to value >= 11. Severity: (low, medium, high) Low, does not occur in practical applications. Classification: Non Critical Error DS91F465XA029 DS91F465XA029 TOP Title: Payload corruption after reception of valid frame followed by slot boundary crossing frame. Description: If after reception of a valid frame in slot N the reception of a second frame (transmitted by a mis-synchronized node) starts in the same slot and the second frame's payload is stored into the TBF shortly after the slot boundary, the first 32 bit payload data of the first received frame in the TBF is overwritten by the payload data from the second frame. Scope: The erratum is limited to cases where the complete header and a part of the payload of another frame is received in slot N. The transfer of a received valid frame from TBF to MBF is initiated by the end of the actual slot. Execution is started not later than 40 bclk periods after the slot change. 40 bclk periods equate 10 bit times, when bclk=40MHz. ds91460x-ds07-16611-1e-corr-x1-00.doc 18 / 19 Corruption of payload occurs when a transfer from PRT to TBF happens in the red marked time window between start of new slot and start of transfer from TBF to MBF. Effects: The first two words (4 byte) of the received valid frame's payload are corrupted. Workaround: 1. Ensure that the static slot length is configured suited to the static payload length. 2. Check Message Buffer Status for boundary violation. Severity: (low, medium, high) Low, in practical applications it is not possible that a frame is transmitted sufficiently out of phase to cause this payload corruption. Classification: Non Critical Error DS91F465XA030 DS91F465XA030 TOP Title: CCSV.RCA[4:0] and CCSV.PSL[5:0] inconsistent after FREEZE command. Description: 1.0.1 When the FREEZE command is applied during STARTUP it may happen, that after the command CCSV.RCA and CCSV.PSL are inconsistent. Scope: The erratum is limited to cases where the FREEZE command coincides with a protocoltriggered state change where CCSV.RCA[4:0] is decremented. Effects: CCSV.RCA [4:0] is decremented but CCSV.PSL[5:0] does not show state COLDSTART_COLLISION_RESOLUTION. Workaround: Ignore CCSV.RCA[4:0] after CHI command FREEZE. Severity: (low, medium, high) Low, workaround available. Classification: Non Critical Error DS91F465XA031 DS91F465XA031 TOP Chapter: Embedded Program / Data Memory (Flash) Paragraph 2: Operations modes NOTE: The operation mode of the MCU can be selected using a Boot-ROM function. The function start address is 0xBF60. The parameter description is given in the Hardware Manual in chapter 54.6 "Flash Access Mode Switching". (PHu, MBo, MHz) ds91460x-ds07-16611-1e-corr-x1-00.doc 19 / 19