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HI1-5051-5 Intersil Corporation DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP16 ri Buy
HI3-5051-5 Intersil Corporation DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDIP16 ri Buy
DG403DY Intersil Corporation DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO16 ri Buy

double match transistor

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: (dB) f=2GHz 1.5 1.3 1.3 IP3, using bypassing to improve it Figure 1: transistor Double , wideband technology. Philips' fifth generation die technology uses a double polysilicon process with a , double poly silicon wideband technology (see figure 1) uses a steep emitter doped profile resulting in , carriers with a small offset in frequency. Due to transistor nonlinearities, these two carriers generate , product C Out BFG4xx the base-emitter and collector-emitter voltages of a transistor used in an ... Philips Semiconductors
Original
datasheet

8 pages,
118.58 Kb

BFG403W 0805CS smd capacitor philips 0805 TRANSISTOR SMD nf c4 BFG520 smd transistor W1 Philips 0805 capacitors BFG410W BFG425 BFG425W APPLICATION 2 GHz LNA BFG425W smd transistor w2 schematic diagram induction heating TRANSISTOR SMD w2 2F2 SMD Transistor w2 smd transistor 2F1 SMD Transistor TEXT
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Abstract: . Transistor Output Model Freescale Semiconductor, Inc. Figure 9. Double Section Input Matching The , its advantages over a conventionally matched 800 MHz transistor. Also described will be the , power of current 800 MHz transistors does present a number of problems: larger transistor die would , in a RF transistor. This is to some degree offset by a larger die size but doubling the output power, assuming similar efficiency, will double the heat dissipation in the package. Making the ... Motorola
Original
datasheet

9 pages,
300.7 Kb

uhf amplifier design Transistor TRANSISTOR D 1978 Nippon capacitors MRF898 Inside the RF Power Transistor AN1530 transistor j326 AN1530/D TEXT
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Abstract: features of a function. 3.2 Single Match, Double Transition The SingleMatchDoubleTransition , ] TBSA[1] Microengine TBSB[0] TBSB[1] Capture A Match B ucode ERWA Comparator TBSA , MRLE Set Microengine Capture B Match A ERA Bus TBSB[2] ucode MRLE PDCM Rst , ODIS ucode TBSA[2:0] Trans.B IPACB to branch PSTI Rst ucode MTD Match Recognition Match Recognition IPACA Match A Channel Flags TDLB to branch TDLB ucode IPACA ... Freescale Semiconductor
Original
datasheet

40 pages,
724.09 Kb

TBS-B MLRB AN2933 TEXT
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Abstract: example of a Low Noise Amplifier with the new BFG403W BFG403W Double Poly RF-transistor. The LNA is designed for , . Introduction: With the new Philips silicon bipolar double poly BFG400W BFG400W series, it is possible to design low , performance: transistor: BFG403W BFG403W Vce~0.9V, Ic ~1mA, VSUP~1.5V freq=900MHz Gain~16dB NF , pF Input match (input to base) C2 27 pF 900 MHz short (L1 to ground) C3 27 pF 900 MHz short (L2 to ground) C4 100 nF RF decoupling collector bias C5 1.2 pF Output match (collector to ... Philips Semiconductors
Original
datasheet

6 pages,
23.29 Kb

amplifier 900mhz 0805CS 0805CS Series BFG403W TEXT
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Abstract: Philips double polysilicon wideband transistor BFG480W BFG480W, it is possible to design Low Noise Amplifiers , product The BFG480W BFG480W is one of the Philips double polysilicon wideband transistors of the BFG400 BFG400 series , , COMMENT SOT343R Philips 0603 Philips k RF transistor collector to base bias R2 39 , match (base coupling) C2 3.3 pF 0603 Philips output match (collector coupling) C3 , PCB FR4 r 4.6, d = 0.5 mm Table 2 output match Dimensions of the micro striplines uS1 ... Philips Semiconductors
Original
datasheet

5 pages,
23.71 Kb

TRANSISTOR noise figure measurements philips circuit diagram BFG400 0805CS transistor amplifier 3 ghz MGS629 BFG480W TEXT
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Abstract: 35ns • High performance, low power, CMOS double metal process • Single +5V (±10%) power supply , €¢ Fast match time: 15ns OPTIONS • Timing 12ns access 15ns access 20ns access 25ns access 30ns access , ] Vcc A6[ 2 23 ] A4 A7[ 3 22 ] A3 A8[ 4 21 ] A2 A9[ 5 20 ] Al A10[ 6 19 ] AO Al 1 [ 7 16 ] MATCH , 17 9 16 IO 15 11 12 14 13 A4 A3 A2 Al AO MATCH ] DQ4 ] DQ3 ] DQ2 ] DQ1 DJB § GENERAL DESCRIPTION The Micron SRAM family employs high speed, low power CMOS designs using a 4-transistor memory ... OCR Scan
datasheet

8 pages,
206.03 Kb

MT5C6405 micron sram MT5C6405T TEXT
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Abstract: performance, low power, CMOS double metal process · Single +5V (±10%) power supply · Easy memory expansion with CE and OE options · All inputs and outputs are TTL compatible · Fast match time: 15ns 16K X 4 , [ A13 [ CE[ A 2 A1 A0 MATCH -15 -20 -25 -30 -35 16 ] MATCH 17 ] DQ4 16 ] DQ3 15 ] DQ2 14 ] DQ , employs high speed, low power CMOS designs using a 4-transistor memory cell. They are fabricated using double layer metal, double layer polysilicon technology. For flexibility in high speed memory ... OCR Scan
datasheet

8 pages,
372.85 Kb

MT5C6405T TEXT
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Abstract: Description of product BGA2003 BGA2003: RF transistor with internal bias circuit. Benefit is lower component count , supply. 1/20/00 1 Philips Semiconductors B.V. Abstract Philips' double poly fifth , high frequency transistor with integrated bias and control input. The application described here is , FR4 Comment Supply decoupling Current setting RF-short to ground Input match, DC-decoupling Output match Output match see figure below R ~ 4.6, H = 0.5 mm Stripline and via dimensions 1 ... Philips Components
Original
datasheet

4 pages,
24.65 Kb

sot343r2 MLG1608 BGA2003 RNR-T45-98-B-0709 TEXT
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Abstract: v v v Double superhet architecture for high degree of image rejection Easily extended to , preferred superheterodyne configuration is double conversion where MIX1 and MIX2 are driven by the internal , by the VCO2, which is mainly a bipolar transistor that can be configured as a varactor-tuned VCO , LC filter at IF1 and/or by low-crosstalk design). By configuring the TH7110 TH7110 for double conversion and , input, approx. 1k single-ended VCO2 output, emitter of bipolar transistor VCO2 input, base of bipolar ... Melexis
Original
datasheet

14 pages,
375.75 Kb

TH7110 LQFP44 TEXT
datasheet frame
Abstract: v v v Double superhet architecture for high degree of image rejection Easily extended to , RSSI-based demodulation The preferred superheterodyne configuration is double conversion where MIX1 and , be generated by the VCO2, which is mainly a bipolar transistor that can be configured as a , LC filter at IF1 and/or by low-crosstalk design). By configuring the TH7111 TH7111 for double conversion and , bipolar transistor VCO2 input, base of bipolar transistor positive supply of general bias system and OA OA ... Melexis
Original
datasheet

14 pages,
362.87 Kb

TH7010 TH7111 LQFP44 TEXT
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Archived Files

Abstract Saved from Date Saved File Size Type Download
Binary to BCD converter Double speed synchronous communication Divide by 3,5,7 Increased timer resolution Quick Start Training Double Speed Synchronous Serial 16 bit data System Clock Double Rate Data factors: Gate Oxide thickness Transistor scale CoolRunner-II CPLDs use 70... oxide thickness and 0.35u Watch your trace length / impedance! Resistor should be chosen to match with diode, driving source, and reflection Match impedance when possible Edges slower than 5ns, ringing not generally a problem Use low
/datasheets/files/xilinx/files/cpld _modules/adv_features1.pps
Xilinx 30/01/2004 594.5 Kb PPS adv_features1.pps
CEO =70 V. Field-Effect Stable by TRansparent IOn Shield (TRIOS). Double Molded Package Offers Double Molded Package, 5300 VAC RMS . High Input Sensitivity I FT =2 mA, PF=1.0 I FT =5 mA, PF Voltage.BV CEO =50 V. Field-Effect Stable by TRansparent IOn Shield (TRIOS). Double Molded Package Offers Feature: - Reduced Board Space - Lower Pin and Parts Count - Better Channel to Channel CTR Match - Voltage from Double Molded Package, 5300 VAC RMS . UL Approval #E52744 E52744. VDE #0884 Available with Option 1
/datasheets/files/siemens/products/37/375.htm
Siemens 28/02/1998 42.56 Kb HTM 375.htm
replaceable. A variety of pH electrodes are available including double junction and Separate temperature sensors embedded in each electrode match the response to 9 VOLT BATTERY The DspH operates on a standard 9 V transistor battery. The easily PHE-8200D PHE-8200D DSPH-1/3 replacement stick pH double junction
/datasheets/files/omega/newport/products/envnmntl/pocktpal.htm
Omega 31/03/2000 26.39 Kb HTM pocktpal.htm
CEO =70 V. Field-Effect Stable by TRansparent IOn Shield (TRIOS). Double Molded Package Offers Double Molded Package, 5300 VAC RMS . High Input Sensitivity I FT =2 mA, PF=1.0 I FT =5 mA, PF Voltage.BV CEO =50 V. Field-Effect Stable by TRansparent IOn Shield (TRIOS). Double Molded Package Offers Feature: - Reduced Board Space - Lower Pin and Parts Count - Better Channel to Channel CTR Match - Voltage from Double Molded Package, 5300 VAC RMS . UL Approval #E52744 E52744. VDE #0884 Available with Option 1
/datasheets/files/infineon/products/37/375.htm
Infineon 26/11/1998 42.87 Kb HTM 375.htm
50 ohm pulldown transistor in output driver DVss Dirty Vss 15 ohm pulldown transistor in output driver IVss Isolated Vss Isolated pre-driver and input buffer VssL output impedance, should match the line impedance. If this condition is met the voltage going into the double Vin or the original driving voltage. In a real 'digital' world a little overshoot (not undershoot
/datasheets/files/texas-instruments/sc/docs/dsps/hotline/4xcom_13.htm
Texas Instruments 20/12/1996 12 Kb HTM 4xcom_13.htm
stacked via1, via2 with or without silicon contacts. The transistor width utilized by the DOUBLE BUFF- ER optimized transistor with 5 V I/O interface capability 2 - input NAND delay of 0.210 ns (typ) with fanout = pairs of transistor have common polysilicon gates, while the outer two pairs have separate gates for the capability and the symmetry of the rise and fall of macro outputs hence the DOUBLE BUFFER name. Each cell has with turned off transistors. A further feature of the Double Buffer cell that helps allow it to obtain
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/2626.htm
STMicroelectronics 20/10/2000 34.19 Kb HTM 2626.htm
transistor width utilized by the DOUBLE BUFF- ER cell is very small as compared to previous technologies. , polysilicide gates and thin metal oxide. 3.3 V optimized transistor with 5 V I/O interface capability 2 - input vertically arranged. The centre two pairs of transistor have common polysilicon gates, while the outer two outputs hence the DOUBLE BUFFER name. Each cell has twelve horizontal wiring channels on first metal, four the Double Buffer cell that helps allow it to obtain very high density usage is the proprietary
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/2626-v1.htm
STMicroelectronics 02/04/1999 31.36 Kb HTM 2626-v1.htm
transistor width utilized by the DOUBLE BUFF- ER cell is very small as compared to previous technologies. , polysilicide gates and thin metal oxide. 3.3 V optimized transistor with 5 V I/O interface capability 2 - input vertically arranged. The centre two pairs of transistor have common polysilicon gates, while the outer two outputs hence the DOUBLE BUFFER name. Each cell has twelve horizontal wiring channels on first metal, four the Double Buffer cell that helps allow it to obtain very high density usage is the proprietary
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/2626-v2.htm
STMicroelectronics 14/06/1999 31.32 Kb HTM 2626-v2.htm
No abstract text available
/download/98015403-653717ZC/technical arm-training_nh.ppt
Philips 25/05/2004 1512.5 Kb PPT technical arm-training_nh.ppt
the market will more than double in 2000 to exceed $10b and that Average Selling Prices (ASPs) will other memory technology can match today. The amount of Flash memory used in applications is rising; for Flash can match DRAM in terms of design rules, density and cost. Flash memory size will surge to 1Gbit cell consists of a single MOS transistor (MOSFET) with two gates: a control gate that is connected to the transistor. By applying appropriate signals to the control gate and measuring the change in the
/datasheets/files/stmicroelectronics/stonline/press/news/back2000/b979m.htm
STMicroelectronics 20/12/2000 18.76 Kb HTM b979m.htm