NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: capturing images of fingerprints LCD - liquid crystal display ROM - read only memory, may be EEPROM, ROM, Flash ROM or other L - Left parallel DMA port of A236 Chip, often used for video input R - Right parallel DMA port of A236 Chip, often used for video output H - Host parallel DMA port of A236 Chip, often used to connect A236 Chip to other devices M - Memory port of A236 Chip, connects only to Synchronous , modified simply by replacing, or updating the contents of, embedded ROM, EEPROM or Flash ROM ... | Original |
3 pages, |
magnetic stripe credit card reader diagram of rom chip fingerprint image sensor A236 fingerprints fingerprint sensor specification fingerprint patent fingerprint image-sensor fingerprint sensor diagram of fingerprint sensor circuit diagram for fingerprint sensor datasheet abstract |
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| Abstract: BL7431A BL7431A 256-Bit EEPROM Logical Encrypted Chip Description Pin Diagram BL7431A BL7431A is the memory card chip developed by Shanghai Belling Co.,Ltd. The chip uses Shanghai Belling's 1.2um CMOS & , ://www.belling.com.cn -1Total 4 Pages 8/16/2006 BL7431A BL7431A 256-Bit EEPROM Logical Encrypted Chip Partition of , ROM can not be read -2Total 4 Pages EEPROM EEPROM EEPROM Chip Manufacture Code Card , ) Read and write by bit, erase by byte Logical encryption ensure the security of data and password ... | Original |
4 pages, |
Shanghai Belling D103 c5 rom EEPROM BL7431A BL7431A abstract |
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| Abstract: MPC106 MPC106, one easy technique is to use the ROM data bus. The MPC106 MPC106 provides two ROM chip selects, RCS0* and RCS1*. In may cases, the first ROM is the boot ROM, and the second is unused. As this decoder is for a 64bit ROM only, up to eight 8-bit devices or four 16-bit devices (or some mixture thereof) may be attached using the same RCS1* signal, as shown in the following diagram. MDH(0:7) MDH(8:15 , ROM and the other devices as well. The disadvantage of using the ROM space for I/O is that there is ... | Original |
1 pages, |
MPC106 F139 MPC106 abstract |
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| Abstract: Vs, C •1 16 â-¡ C2 C3 c 2 15 C1 NC d 3 14 â-¡ SER IN ROM CLOCK c 4 13 D NC NC q 5 12 â-¡ NC NC c 6 11 Vdo CS1 c 7 10 â-¡ SER OUT CS2 c 8 9 â-¡ ROM ENABLE 2-70 SPR032 SPR032 in: PIN ASSIGNMENTS (PRELIMINARY) Pin Number Name Function 9 ROM ENABLE Active low chip select used in system to eliminate bus , LRQ SE SER IN SER OUT ROM CLOCK ROM ENABLE Fig. 1 INTERFACE OF SPR032 SPR032 ROM TO SP0256 SP0256 SPEECH PROCESSOR , contents of DSR to the serial out pin, synchronous to the ROM clock. Loads the return register (RET) with ... | OCR Scan |
3 pages, |
timing DIAGRAM OF RET speech processor SP0256 SP02 diagram of rom chip pin DIAGRAM OF ROM SPR032 SPR032 abstract |
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| Abstract: 11 14 3 SER OUT CS2 n 12 13 3 ROM ÉNABLÉ 2-73 â- NS&« _ PIN ASSIGNMENTS SPR128 SPR128 Pin Number Name Function ROM ENABLE SERIAL IN SERIAL OUT CS1 CS2 ROM CLOCK Vss C3 02 C1 Vdd Active low chip , D6 D7 DLD LRQ SE SER IN SER OUT ROM CLOCK ROM ENABLE Fig. 1 INTERFACE OF SPR128 SPR128 ROM TO SP0256 SP0256 , PC is incremented. Shifts out the contents of DSR to the serial out pin, synchronous to the ROM , Vss c • 1 24 3 C2 C3 c 2 23 C1 N.C. c 3 22 3 SER IN ROM CLOCK c 4 21 3 N.C. N.C. c 5 20 : N.C ... | OCR Scan |
3 pages, |
SP0256 pin DIAGRAM OF ROM SPR128 SPR128 abstract |
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| Abstract: (high-impedance) state when not active • Active logic level of CSi and CS2 can be programmed at the time of ROM , select one of the 4096 words, and the contents of that address are read out to data outputs Do~D7. Chip , ) ADDRESS INPUTS >â- DATA OUTPUTS Outline 24P1 XXXP ROMs. The contents of the ROM can be read only when , the ROM mask. BLOCK DIAGRAM ADDRESS INPUTS 'An J8) â- A10 Is)-» A9 li)-» As 3)-" A 7 Ae A5 , MASK-PROGRAMMABLE ROM Y ' DECODER OUTPUT BUFFER CHIP SELECT INPUT BUFFER CHIP SELECT LOGIC -(20)- csi/ersi ... | OCR Scan |
2 pages, |
diagram of rom chip 24P1 M58333- 768-BIT 4096-W0RD M58333-XXXP M58333- abstract |
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| Abstract: fabricated using Gould's NMOS ROM technology. This permits the mask programmable ROMs. Block Diagram , ns S68I364 S68I364 S68M364 S68M364 250 300 ns ns See AC Timing Diagram and Test Load lACE Chip Enable Access , Guaranteed by design. ROM Code Data Gould's preferred method of receiving ROM CODE DATA is in EPROM. Two , The Gould programmed EPROM is returned to the customer for verification of the ROM program. Unless , another supplier, these ROMs can be submitted for ROM pattern data instead of EPROMs. Obviously, these ... | OCR Scan |
4 pages, |
S68M364 S68I364 S68C364 S688364 S68364 68A76 Gould S68B364 S68364 abstract |
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| Abstract: logic arrays on a single chip. Structured Arrays provide a high density of logic functionality while maintaining the flexibility of design and fast turn-around of metal mask programmable logic-arrays. The use of dual layer metal interconnect technology provides high speed, high packing density, ease of layout and , Description The LSA201G LSA201G is a member of the 2-micron drawn, (1.4-micron effective) HCMOS family of Structured , array • 65,536-bit Read Only Memory (ROM) -Metal mask programmable -Metal mask configurable as either ... | OCR Scan |
2 pages, |
LSA2010 2k x 4 RAM 1kx8 static ram 1K x 8 static ram General Purpose Mask Programmable ROM 512x 8 ROM S1985 LSA201G LL7000 LSA2010 abstract |
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| Abstract: range of WaveTM chip's architecture, which combines efficient frequencies. A 900-MHz transceiver , Applications communications protocol. Equipped with embedded One WaveTM chip can be used in an array of ROM and RAM memory and a large number of I/O applications including: interfaces and mixed-signal , Z iLO G ® The WaveTM Chip Z87L02/L03 Z87L02/L03 Frequency-Hopping Spread-Spectrum Digital Voice/Data Controllers with Flash Capabilities Power and flexibility offers quick prototyping of the user interface ... | Original |
2 pages, |
Z87L02 Z8700000ZAC 5.8 ghz Transceiver IC one chip radio Z87L02/L03 Z87L02/L03 abstract |
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| Abstract: and debugging of this device: · Z8 GPTM ZGP323 ZGP323 In-Circuit Emulator provides chip emulation with a , Environment, ZDS II-Crimzon+GP PB015209-0108 PB015209-0108 Page 2 of 8 ZGR163L ZGR163L ROM MCU Family Ordering , Description 20-pin SOIC 16K ROM Page 3 of 8 ZGR163L ZGR163L ROM MCU Family 8 KB Standard Temperature: 0 , 20-pin PDIP 8K ROM ZGR163LAS2008G ZGR163LAS2008G PB015209-0108 PB015209-0108 Description 20-pin SOIC 8K ROM Page 4 of 8 , Description 20-pin SOIC 4K ROM Page 5 of 8 ZGR163L ZGR163L ROM MCU Family 2 KB Standard Temperature: 0 °C ... | Original |
8 pages, |
ZGR323L General Purpose Mask Programmable ROM ZGP323 ZGP323L ZGR163L ZGR163LSH2016G ZGR163LSH2816G ZGR163LSP2816G ZGR163LSS2816G 8k x 16bit rom mask rom pin DIAGRAM OF ROM PB015209-0108 ZGR163L abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| Diagram The following diagram is a high-level simplified block diagram of a representative design of the Efficiency The Mediamatics next-generation DVD-on-a-chip product family provides the highest level of /V style DVD optical disc control chip sets and the available processing power of the on-chip RISC execution directly from 8, 16, or 32-bit wide FLASH/ROM or allows for extraction of compressed code from a minimum FLASH/ROM arrangement with decompression via the RISC and execution directly out of SDRAM. Two www.datasheetarchive.com/files/national/hardware.htm |
National | 27/02/2004 | 5.11 Kb | HTM | hardware.htm |
| DVD-on-a-chip Block Diagram Please enable Javascript in your browser following diagram is a high-level simplified block diagram of a representative design of the Mediamatics Efficiency The Mediamatics next-generation DVD-on-a-chip product family provides the highest level of /V style DVD optical disc control chip sets and the available processing power of the on-chip RISC execution directly from 8, 16, or 32-bit wide FLASH/ROM or allows for extraction of compressed code from a www.datasheetarchive.com/files/national/htm/nsc01548-v3.htm |
National | 16/08/2002 | 11.69 Kb | HTM | nsc01548-v3.htm |
| - Discusses modules and peripherals of the specified family of devices. Block Diagrams - View sample block diagrams Selection and Solution Guides - Product Brochures and system solution guides More : Core Chip Set - processor which consists of a central single integrated circuit with peripheral MSP430x1xx - Flash/ROM No LCD MSP430x3xx - ROM/OTP LCD www.datasheetarchive.com/files/texas-instruments/0003/mcubl000.htm |
Texas Instruments | 17/07/2009 | 98.99 Kb | HTM | mcubl000.htm |
| independent internal oscillator RAM and ROM • 23032 bytes of on-chip user ROM, plus eight bytes reserved for vectors • 384 bytes of on-chip RAM Peripherals • Random number generator • One bidirectional I/O line (1 member of Atmel's MSC04 MSC04 MSC04 MSC04 family of single chip MCUs, designed specifically for embedded conditional . Memory on-board the MSC0402 MSC0402 MSC0402 MSC0402 consists of 23K ROM, 384 bytes of RAM and 8K EEPROM, which features 2ms capability under software control (mask option) EEPROM • 8160 bytes of on-chip user EEPROM, plus 32 bytes www.datasheetarchive.com/download/74365848-33845ZC/new_web.zip (pp0402.pdf) |
Atmel | 19/05/1999 | 399.52 Kb | ZIP | new_web.zip |
| oscillator RAM and ROM • 9208 bytes of on-chip user ROM, plus eight bytes reserved for vectors • 240 bytes of of single chip MCUs, designed specifically for embedded conditional access systems and other MSC0406 MSC0406 MSC0406 MSC0406 consists of 9K ROM, 240 bytes of RAM and 1.3K EEPROM, which features 2ms programming under software control (mask option) EEPROM • 1280 bytes of on-chip user EEPROM, plus 32 bytes that are on clock • Access control logic, including read inhibit facility on selected areas of ROM or EEPROM www.datasheetarchive.com/download/74365848-33845ZC/new_web.zip (pp0406.pdf) |
Atmel | 19/05/1999 | 399.52 Kb | ZIP | new_web.zip |
| independent internal oscillator RAM and ROM • 23032 bytes of on-chip user ROM, plus eight bytes reserved for vectors • 384 bytes of on-chip RAM Peripherals • Random number generator • One bidirectional I/O line (1 ) is a member of Atmel's MSC04 MSC04 MSC04 MSC04 family of single chip MCUs, designed specifically for embedded devices. Memory on-board the MSC0407 MSC0407 MSC0407 MSC0407 consists of 23K ROM, 384 bytes of RAM and 4K EEPROM, which features • Watchdog capability under software control (mask option) EEPROM • 4064 bytes of on-chip user EEPROM, plus www.datasheetarchive.com/download/74365848-33845ZC/new_web.zip (pp0407.pdf) |
Atmel | 19/05/1999 | 399.52 Kb | ZIP | new_web.zip |
| XpressROM BIOS, an 8 MB M-Systems™ DiskOnChip™, and 64 MB of PC-133 PC-133 PC-133 PC-133 system memory. Product developers 's XpressROM firmware, while the National PC97317 PC97317 PC97317 PC97317 SuperI/O chip delivers a variety of PC-standard interfaces only the standard suite of peripherals (floppy, hard disk, CD-ROM drive, power supply, monitor, mouse making independent power measurements of key components. Geode SP4GX10 SP4GX10 SP4GX10 SP4GX10 Block Diagram Return to Gateway IA Home Page PRODUCTS Geode Processors Geode Companion Devices Geode IA-On-A-Chip www.datasheetarchive.com/files/national/htm/nsc01764-v3.htm |
National | 16/08/2002 | 14.86 Kb | HTM | nsc01764-v3.htm |
| included on-chip. It is ideally suited to a wide range of embedded controller applications because of its advantages of a traditional Complex Instruction Set Computer (CISC): compact code, on-chip memory and I , and on-chip peripheral). On-chip power on reset 48K Bytes On-Chip Flash or ROM program RISC Reprogrammable/ROM Microcontrollers CR16MUS5 CR16MUS5 CR16MUS5 CR16MUS5 16-Bit CompactRISC Reprogrammable/ROM Microcontrollers Generic P/N 16MUS5 16MUS5 16MUS5 16MUS5 www.datasheetarchive.com/files/national/htm/nsc03581.htm |
National | 28/06/2001 | 15.24 Kb | HTM | nsc03581.htm |
| included on-chip. It is ideally suited to a wide range of embedded controller applications because of its advantages of a traditional Complex Instruction Set Computer (CISC): compact code, on-chip memory and I , and on-chip peripheral). On-chip power on reset 48K Bytes On-Chip Flash or ROM program [Information as of 28-Jun-2001] Quick Search Parametric Search System Diagrams RISC Reprogrammable/ROM Microcontrollers www.datasheetarchive.com/files/national/htm/nsc03582.htm |
National | 28/06/2001 | 15.56 Kb | HTM | nsc03582.htm |
| - Discusses modules and peripherals of the specified family of devices. Block Diagrams - View sample block diagrams Selection and Solution Guides - Product Brochures and system solution guides More MSP430x1xx - Flash/ROM No LCD MSP430x3xx - ROM/OTP LCD MSP430x4xx - Flash/ROM LCD www.datasheetarchive.com/files/texas-instruments/0003/mcute000.htm |
Texas Instruments | 17/07/2009 | 87.47 Kb | HTM | mcute000.htm |