NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: General Specification ADI-H-1000 ADI-H-1000: package outline: DH-28. 1.3 Absolute Maximum Ratings. (TA= +25°C unless , function. Table 1. 3.2.1 Functional Block Diagram and Terminal Assignments. Top View DH-28 Package REV. , Load DAC 4 second rank from first rank 0 0 0 0 0 0 All latches transparent Digital Input Code Analog ... | OCR Scan |
4 pages, |
AD390TD/883B AD390 AD390 abstract |
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| Abstract: (Case) �癈 to +85癈 (Case) 28-Pin 600 mil Hermetic Ceramic DIP (DH-28) 28-Pin 600 mil Hermetic Ceramic DIP (DH-28) Unpackaged Die Evaluation Board with AD9026BD AD9026BD �癈 to +85癈 (Case) �癈 to +85癈 (Case) AD9026BD AD9026BD 28-Pin 600 mil Hermetic Ceramic DIP (DH-28) 28-Pin 600 mil Hermetic Ceramic DIP (DH-28) Unpackaged Die Evaluation Board with AD9027BD AD9027BD AD9026CHIPS AD9026CHIPS AD9026/PCB-T AD9026/PCB-T AD9027AD AD9027AD AD9027BD AD9027BD , spectral components, including harmonics but excluding dc. The deviation of any code from an ideal 1 LSB ... | Original |
16 pages, |
AD9026 AD9026AD AD9026BD AD9026CHIPS AD9027 AD9027BD C37DRPF AD9027AD RZ102 TRANSISTOR c104 RZ205 transisTOR C124 U204 equivalent AD9026/AD9027 AD9026/AD9027 AD9026/AD9027 abstract |
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| Abstract: mil Hermetic Ceramic DIP (DH-28) 28-Pin 600 mil Hermetic Ceramic DIP (DH-28) Unpackaged Die Evaluation , (Case) 28-Pin 600 mil Hermetic Ceramic DIP (DH-28) 28-Pin 600 mil Hermetic Ceramic DIP (DH-28 , code from an ideal 1 LSB step. Harmonic Distortion The ratio of the rms signal amplitude to the rms , (Figure 22). The correct code appears most of the time, but adjacent codes also appear with reduced ... | OCR Scan |
16 pages, |
AD9027AD AD9027 AD9026BD AD9026AD AD9026 RZ2G6 rz2g AD9026/AD9027 AD9026/AD9027 abstract |
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| Abstract: EXPLANATION OF TEST LEVELS Test Level I � 100% production tested. Code Twos Complement OR , Option* �癈 to +85癈 �癈 to +125癈 +25癈 �癈 to +125癈 R-28 DH-28 Evaluation Board DH-28 *DH = , (0.40) 28-Pin Hermetic Ceramic DIP (DH-28) 28 15 0.595 � 0.010 (15.11 � 0.25) 1 PIN 1 ... | Original |
16 pages, |
C2996 AD9070TD AD9070BR AD9070 AD820 5962-9756301HXC 10h116 datasheet 10h116 AD9070 abstract |
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| Abstract: MPC8260 MPC8260 does not support a full error-correcting code (ECC) memory system. Therefore, it is necessary to , initialization code and required header files is provided in Section 4, "Initialization Software." This code , DH13 DH14 DH15 DH16 DH17 DH18 DH19 DH20 DH21 DH22 DH23 DH24 DH25 DH26 DH27 DH28 DH29 , DH12 DH13 DH14 DH15 DH16 DH17 DH18 DH19 DH20 DH21 DH22 DH23 DH24 DH25 DH26 DH27 DH28 , DH24 DH25 DH26 DH27 DH28 DH29 DH30 DH31 16 L2 A31 K2 A30 K3 A29 J6 A28 J2 A27 H3 A26 ... | Original |
44 pages, |
l2a12 L2A1 l2a0 dh28 code dh28 CA91L750 l2a4 AN2347 L2D39 RN10A MPC8260 MPC755 MPC7410 MDL16 L2D58 AN2347 abstract |
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| Abstract: Test Level I � 100% production tested. Code Two's Complement OR 1024 1023 1022 � , functionality. � DH-28 WARNING! ESD SENSITIVE DEVICE REV. C AD9070 AD9070 PIN FUNCTION DESCRIPTIONS , (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23) 28-Lead Hermetic Ceramic DIP (DH-28) 28 15 0.595 � ... | Original |
16 pages, |
C37DRPF 10h116 datasheet 401MHz 5962-9756301HXC ad780n AD820 AD9070 AD9070BR AD9070DIP C37D 10H11 10h116 AD9070 abstract |
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| Abstract: DH14 DP2/REQ4_N DP5/GNT3_N GND DH26 DH28 DL31 DL24 DL27 GND A22 A26 A30 DL02 UNUSED DH09 , DH27 DH28 DH29 DH30 DH31 DI1_N DI2_N DL00 DL01 DL02 DL03 DL04 DL05 DL06 DL07 DL08 DL09 , Revision PCI Rev Reg Code Level A dd 1.0 0000 0000 B dd 1.1 0000 0001 C dd 1.2 ... | Original |
20 pages, |
t04 68 3 pin controller IBM25CPC700BB3B83 IBM25CPC700BB3B66 IBM REV 2.8 DH07 CPC700 IBM25CPC700CB3B66 DH06 AA07 CPC700 abstract |
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| Abstract: EXPLANATION OF TEST LEVELS Test Level I � 100% production tested. Code Twos Complement OR , military devices. R-28 Evaluation Board DH-28 *DH = Ceramic DIP; R = Small Outline IC (SOIC). , ) 0.0157 (0.40) 28-Lead Hermetic Ceramic DIP (DH-28) 28 15 0.595 � 0.010 (15.11 � 0.25) 1 ... | Original |
16 pages, |
AD9070DIP AD9070BR AD9070 AD820 5962-9756301HXC 10h116 datasheet C2996 ad780n 10H116 AD9070 abstract |
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| Abstract: parameters from bytemark code. 3. Typical power is an estimate of the average value measured in a system , dh15 dh16 dh19 dh20 dh23 dh24 dh26 dh28 dh30 g a4 g g B g , DH28 A15 DL28 Y3 TDO N3 A29 U15 DH29 C14 DL29 V1 TEA M2 A30 ... | Original |
42 pages, |
dh28 code datasheet abstract |
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| Abstract: IBM25PPC750 dh9 dh11 dh13 dh15 dh16 dh19 dh20 dh23 dh24 dh26 dh28 dh30 g a4 , U6 TCK T3 A27 Y18 DH27 B14 DL27 W4 TDI P3 A28 W17 DH28 A15 ... | Original |
43 pages, |
PBGA 256 reflow profile dh28 code DH10 PowerPC-750CX IBM25PPC750CX 750CX 750CX abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| 800BV-T 800BV-T 800BV-T 800BV-T, 28F800CV-T 28F800CV-T 28F800CV-T 28F800CV-T, 28F800CE-T 28F800CE-T 28F800CE-T 28F800CE-T 889CH 889CH 889CH 889CH ; 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F8008CE-B 28F8008CE-B 28F8008CE-B 28F8008CE-B 889DH ; 28F400 edited ; Revision 0.2: Added code for erase suspend & resume and clear status register ; Corrected existing code errors ; Used DX register for Status Check ; ; Assumptions ; DS:[SI] points to the data Read Array Mode by writing FFH to the flash ; Code continues from this point INTEL_ID_ERROR: ; Insert code to service incorrect manufacturer ID here ; Is RP# valid? Is Vcc valid? DEVICE www.datasheetarchive.com/download/61063093-260349ZC/b3.zip (IDREAD.TXT) |
Intel | 08/12/1997 | 2630.08 Kb | ZIP | b3.zip |
| 800BV-T 800BV-T 800BV-T 800BV-T, 28F800CV-T 28F800CV-T 28F800CV-T 28F800CV-T, 28F800CE-T 28F800CE-T 28F800CE-T 28F800CE-T 889CH 889CH 889CH 889CH ; 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F8008CE-B 28F8008CE-B 28F8008CE-B 28F8008CE-B 889DH ; 28F400 edited ; Revision 0.2: Added code for erase suspend & resume and clear status register ; Corrected existing code errors ; Used DX register for Status Check ; ; Assumptions ; DS:[SI] points to the data Read Array Mode by writing FFH to the flash ; Code continues from this point INTEL_ID_ERROR: ; Insert code to service incorrect manufacturer ID here ; Is RP# valid? Is Vcc valid? DEVICE www.datasheetarchive.com/download/61063093-260349ZC/b3.zip (IDREAD.TXT) |
Intel | 08/12/1997 | 2630.08 Kb | ZIP | b3.zip |
| 800BV-T 800BV-T 800BV-T 800BV-T, 28F800CV-T 28F800CV-T 28F800CV-T 28F800CV-T, 28F800CE-T 28F800CE-T 28F800CE-T 28F800CE-T 889CH 889CH 889CH 889CH ; 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F8008CE-B 28F8008CE-B 28F8008CE-B 28F8008CE-B 889DH ; 28F400 edited ; Revision 0.2: Added code for erase suspend & resume and clear status register ; Corrected existing code errors ; Used DX register for Status Check ; ; Assumptions ; DS:[SI] points to the data Read Array Mode by writing FFH to the flash ; Code continues from this point INTEL_ID_ERROR: ; Insert code to service incorrect manufacturer ID here ; Is RP# valid? Is Vcc valid? DEVICE www.datasheetarchive.com/download/2597845-174510ZC/b3.zip (IDREAD.TXT) |
Intel | 08/12/1997 | 2630.08 Kb | ZIP | b3.zip |
| 800BV-T 800BV-T 800BV-T 800BV-T, 28F800CV-T 28F800CV-T 28F800CV-T 28F800CV-T, 28F800CE-T 28F800CE-T 28F800CE-T 28F800CE-T 889CH 889CH 889CH 889CH ; 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F8008CE-B 28F8008CE-B 28F8008CE-B 28F8008CE-B 889DH ; 28F400 edited ; Revision 0.2: Added code for erase suspend & resume and clear status register ; Corrected existing code errors ; Used DX register for Status Check ; ; Assumptions ; DS:[SI] points to the data Read Array Mode by writing FFH to the flash ; Code continues from this point INTEL_ID_ERROR: ; Insert code to service incorrect manufacturer ID here ; Is RP# valid? Is Vcc valid? DEVICE www.datasheetarchive.com/download/2597845-174510ZC/b3.zip (IDREAD.TXT) |
Intel | 08/12/1997 | 2630.08 Kb | ZIP | b3.zip |
| 800BV-T 800BV-T 800BV-T 800BV-T, 28F800CV-T 28F800CV-T 28F800CV-T 28F800CV-T, 28F800CE-T 28F800CE-T 28F800CE-T 28F800CE-T 889CH 889CH 889CH 889CH ; 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F8008CE-B 28F8008CE-B 28F8008CE-B 28F8008CE-B 889DH ; 28F400 edited ; Revision 0.2: Added code for erase suspend & resume and clear status register ; Corrected existing code errors ; Used DX register for Status Check ; ; Assumptions ; DS:[SI] points to the data Read Array Mode by writing FFH to the flash ; Code continues from this point INTEL_ID_ERROR: ; Insert code to service incorrect manufacturer ID here ; Is RP# valid? Is Vcc valid? DEVICE www.datasheetarchive.com/download/26089978-174612ZC/algo_asm.zip (IDREAD.TXT) |
Intel | 18/12/1997 | 15.74 Kb | ZIP | algo_asm.zip |
| 800BV-T 800BV-T 800BV-T 800BV-T, 28F800CV-T 28F800CV-T 28F800CV-T 28F800CV-T, 28F800CE-T 28F800CE-T 28F800CE-T 28F800CE-T 889CH 889CH 889CH 889CH ; 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F8008CE-B 28F8008CE-B 28F8008CE-B 28F8008CE-B 889DH ; 28F400 edited ; Revision 0.2: Added code for erase suspend & resume and clear status register ; Corrected existing code errors ; Used DX register for Status Check ; ; Assumptions ; DS:[SI] points to the data Read Array Mode by writing FFH to the flash ; Code continues from this point INTEL_ID_ERROR: ; Insert code to service incorrect manufacturer ID here ; Is RP# valid? Is Vcc valid? DEVICE www.datasheetarchive.com/download/96673524-260382ZC/algo_asm.zip (IDREAD.TXT) |
Intel | 01/02/1999 | 15.74 Kb | ZIP | algo_asm.zip |
| -T, 28F800CE-T 28F800CE-T 28F800CE-T 28F800CE-T 889CH 889CH 889CH 889CH ; 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F800CE-B 28F800CE-B 28F800CE-B 28F800CE-B 889DH ; 28F400BV-T, 28F400CV 28F400CV 28F400CV 28F400CV 800CV-B 800CV-B 800CV-B 800CV-B, 28F800CE-B 28F800CE-B 28F800CE-B 28F800CE-B 889DH ; 28F400BV-T, 28F400CV-T 28F400CV-T 28F400CV-T 28F400CV-T, 28F400CE-T 28F400CE-T 28F400CE-T 28F400CE-T, 28F400BX-T 28F400BX-T 28F400BX-T 28F400BX-T, 28F400BL-T 28F400BL-T 28F400BL-T 28F400BL-T 4470H 4470H 4470H 4470H and features. Format also cleaned up. ; The following code is divided into four sections ) ; 4. Block erase during x16 operation (28Fx00) ; Section 1: The following code controls byte write code here to ramp Vpp and disable component RP# input. ; If a string of bytes is to be written in www.datasheetarchive.com/download/8028043-173514ZC/248bootd-v1.zip (248MASM.ASM) |
Intel | 15/07/1996 | 14.74 Kb | ZIP | 248bootd-v1.zip |
| -T, 28F800CE-T 28F800CE-T 28F800CE-T 28F800CE-T 889CH 889CH 889CH 889CH ; 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F800CE-B 28F800CE-B 28F800CE-B 28F800CE-B 889DH ; 28F400BV-T, 28F400CV 28F400CV 28F400CV 28F400CV 800CV-B 800CV-B 800CV-B 800CV-B, 28F800CE-B 28F800CE-B 28F800CE-B 28F800CE-B 889DH ; 28F400BV-T, 28F400CV-T 28F400CV-T 28F400CV-T 28F400CV-T, 28F400CE-T 28F400CE-T 28F400CE-T 28F400CE-T, 28F400BX-T 28F400BX-T 28F400BX-T 28F400BX-T, 28F400BL-T 28F400BL-T 28F400BL-T 28F400BL-T 4470H 4470H 4470H 4470H and features. Format also cleaned up. ; The following code is divided into four sections ) ; 4. Block erase during x16 operation (28Fx00) ; Section 1: The following code controls byte write code here to ramp Vpp and disable component RP# input. ; If a string of bytes is to be written in www.datasheetarchive.com/download/38686127-267621ZC/248bootd.zip (248MASM.ASM) |
Intel | 15/07/1996 | 14.74 Kb | ZIP | 248bootd.zip |
| 800B5-B 800B5-B 800B5-B 800B5-B, 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F800CE-B 28F800CE-B 28F800CE-B 28F800CE-B 889DH ; 28F400B5-T, 28F400BV-T 28F400BV-T 28F400BV-T 28F400BV-T, 28F400CV-T 28F400CV-T 28F400CV-T 28F400CV-T, 28F400CE 28F400CE 28F400CE 28F400CE -B, 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F800CE-B 28F800CE-B 28F800CE-B 28F800CE-B 889DH ; 28F400B5-T, 28F400BV-T 28F400BV-T 28F400BV-T 28F400BV-T, 28F400CV-T 28F400CV-T 28F400CV-T 28F400CV-T, 28F400CE 28F400CE 28F400CE 28F400CE . Subrata Mukherjee, Intel ; The following code is divided into four sections. ; 1. Byte Program during x16 operation (28Fx00) ; Section 1: The following code controls byte write of data to a -B 7DH READY EQU 80H W_ERR_FLAG EQU 10H VPP_FLAG EQU 08H ; Insert code here to ramp Vpp and www.datasheetarchive.com/download/98631542-173513ZC/248bootd.zip (248MASM.ASM) |
Intel | 03/02/1998 | 20.57 Kb | ZIP | 248bootd.zip |
| */ /* 28F800BV-B 28F800BV-B 28F800BV-B 28F800BV-B, 28F800CV-B 28F800CV-B 28F800CV-B 28F800CV-B, 28F800CE-B 28F800CE-B 28F800CE-B 28F800CE-B 889DH */ /* 28F400BV-T, 28F400CV-T 28F400CV-T 28F400CV-T 28F400CV-T, 28F400CE-T 28F400CE-T 28F400CE-T 28F400CE-T, 28F400BX 28F400BX 28F400BX 28F400BX array read algorithms. This code can be easily modified to access the 28Fx00 products */ /* in x8 mode ; /*/ /* Function: Main */ /* Description: The following code (commented out) shows examples of word write following code gives an example of a possible word write algorithm. */ /* Note that Vpp does not need to " */ /* rpdis(); */ /* "INSERT CODE TO SET RP# TO 12V or WP# to logic high IF BOOT BLOCK WRITES ARE www.datasheetarchive.com/download/8028043-173514ZC/248bootd-v1.zip (X16CDRV.C) |
Intel | 15/07/1996 | 14.74 Kb | ZIP | 248bootd-v1.zip |