NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: alias in the decoder. This application note offers a simple software-time integration to avoid this , APPLICATION NOTE MX828 MX828 Elimination of False Digitally Coded Squelch (DCS) Decodes in the MX828 MX828 Elimination of False Digitally Coded Squelch (DCS) Decodes in the MX828 MX828 The MX828 MX828's DCS decode algorithm is very fast in its response to received DCS codes. This advantage, however, can manifest itself as false DCS decodes when receiving signals from a transmitter that is not using sub-audio ... | Original |
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false audio squelch selcall MX828 dcs response time MX828 abstract |
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| Abstract: TONE DECODE FILTER TONE IN FILTER REFERENCE VOLTAGE + - - TONE IN + f TONE CLKS LOAD/LATCH SERIAL ENABLE/D5 CLKS/XTAL SERIAL ENABLE/D4 SERIAL DATA/D3 SERIAL CLOCK/D2 D1 D0 RX/TX Rx TONE DECODE OUT TONE DECODE LOGIC TONE OUT FILTER DIGITAL INTERFACE AND CLOCK GENERATION Tx TONE OUT CLKS/XTAL A0 - A5 PTL XTAL/CLOCK D0 - D10 XTAL , AUDIO OUT AUDIO FILTER DECODE COMPARATOR REF + DECODE COMPARATOR IN - Rx TONE DETECT OUT ... | Original |
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tone filter filter datasheets digital comparator decode "Audio Filter" filter XTAL datasheet abstract |
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| Abstract: provides the ability to compress (encode) and decompress (decode) speech for more efficient storage and , : Vocoder · Requirements: Program memory (in words): `C25 encode: 6000 decode: 1750 `C30 encode: 647567501 decode: 585058751 `C50 encode: 400043001 decode: 1300 Data memory (in words): `C25 encode: 2000 decode: 1250 `C30 encode: 147516001 decode: 92510501 `C50 encode: 200021501 decode: 115013001 Processor loading: `C25 encode: 14 decode: 2.5 `C30 encode: 9.0121 decode: 1.5 `C50 ... | Original |
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TMS320C50 TMS320C30 TMS320C25 datasheet abstract |
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| Abstract: Mod 1 O/P Transmit Functions Tx GMSK AIS HDLC encode Buffer NRZI encode Mod 2 O/P GMSK encode Receive functions RX1 in GMSK decode NRZI decode Buffer Rx1 GMSK AIS Buffer FSK- DSC Buffer HDLC decode Rx2 GMSK AIS Input 1 VBIAS FSK decode RX2 in mux GMSK decode VBIAS NRZI decode HDLC decode Input 2 Spare IN VBIAS TxENA Auxiliary Functions General Purpose I/O DAC1 Aux DAC 3 DAC4 SYS CLK 2 Aux ... | Original |
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hdlc CMX7032 nrzi GMSK GMSK AIS datasheet abstract |
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| Abstract: Squelch (DCS) Decodes in the FX828 FX828 The FX828 FX828's DCS decode algorithm is very fast in its response to received DCS codes. This advantage however, can manifest itself as false decodes from a transmitter that , frequencies in the sub-audio band which alias in the decoder. This application note offers a simple software-time integration to avoid this this occurring. FX828 FX828 set to DCS Decode Wait for IRQ Service Interrupt Correctly No IRQ: DCS Decode Valid? Yes DCS Decode Invalid; Abort Operation Start ... | Original |
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false dcs response time FX828 FX828 abstract |
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| Abstract: DECODE COMPARATOR REF. V SS LOGIC LOGIC DECODE COMPARATOR INPUT TONE GENERATOR + - FX365C FX365C Block Diagram DECODE COMPARATOR Rx TONE DECODE OUTPUT ... | Original |
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Sub-Audio FX365C Digital Logic circuit in digital clock notes tone control digital datasheet abstract |
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| Abstract: memory Runs out of the box a. Capture/Preview b. Simultaneous Video Encode/Decode H.264 (Baseline Profile) Video Encode/Decode, G.711 Speech Encode/Decode (CIF) 2. PC-based High-level demos , Encode (D1) b. Decode demo modes H.264 (Baseline Profile) Video Decode (D1), G.711 Speech Decode MPEG4 (Standard Profile) Video Decode (CIF), G.711 Speech Decode MPEG2 Video Decode (D1), AAC LC Decode MPEG2 Video Decode (D1), MPEG1 Layer1 Decode c. Host PC Application for data transfer and storage ... | Original |
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TMS320DM6437 dm6437 EVM TMDSVDP6437 DM6437 DM6437 abstract |
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| Abstract: Specifies the least number of bars that must be present in a symbol for the decoder to perform a decode. Valid values range from 3 to 12. Decode Direction (Scanner A or B) Sets the direction the decoder uses to decode a scanned label. Direction values are either Forward or Reverse. The decoder assigns , Decoders with Pharma-Code Option Pharma-Code Configuration Screen The decoder validates each , the symbol. The decoder uses the decode direction to determine the least significant bar of a ... | Original |
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DS1P 2755-DS1P 2755-DS1P abstract |
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| Abstract: i.MX Family Roadmap Next Gen.* i.MX31 Starting at 532 MHz 90 nm process MPEG-4 VGA encode/decode H.264 HVGA decode HS USBOTG/USB IPU i.MX1 Starting at 150 MHz 180 nm process MPEG-4 encode/decode Embedded BluetoothTM ARM11TM ARM11TM* i.MX21 i.MX31L MX31L Starting at 266 MHz 130 nm process MPEG-4 CIF encode/decode Color LCD Controller 16-channel DMA USB OTG i.MX31 without the 2-D/3-D Graphics Processing Unit ARM920TM ARM920TM ARM926TM ARM926TM ARM9TM* 90 nm process ARM1136TM ARM1136TM ARM11 ARM11 i.MXL ... | Original |
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Freescale process ARM926 ARM11TM ARM1136 ARM11 ARM920 datasheet abstract |
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| Abstract: MPEG-II Audio Decode Reference Design for Real-Time Multi-Channel Audio Decoding HIGHLIGHTS · , ISA Bus on PC-AT Multi-Channel Decoder Block Diagram Product Description The MPEG-II real-time Audio Decode Software solution is implemented on a single Analog Devices ADSP- 2181 Digital Signal Processor. The solution fully implements the standard ISO / IEC 13818 - 3 Audio. The decoder supports , Specifications Standard supported ISO / IEC 13818 -3 Processor Decode MIPS Program memory Data memory User ... | Original |
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ADSP-2181 analog devices AD DAB ADSP2181 DTH block diagram BIT 3713 datasheet abstract |
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| do not have complete DECODE attributes attached to WAND1s under the DECODExx symbol. When EDIF2 Xilinx Answer #2639 : Mentor Graphics Library for XACTstep 5.2.1: DECODE16, DECODE8, and DECODE4 library macros are missing DECODE attribute .2.1: DECODE16, DECODE8, and DECODE4 library macros are missing DECODE attribute Mentor Libraries Problem Title: Mentor Graphics Library for XACTstep 5.2.1: DECODE16, DECODE8 www.datasheetarchive.com/files/xilinx/docs/rp00012/rp0126a.htm |
Xilinx | 29/02/2000 | 4.85 Kb | HTM | rp0126a.htm |
| not have complete DECODE attributes attached to WAND1s under the DECODExx symbol. When EDIF2XNF Xilinx Answer #2639 : Mentor Graphics Library for XACTstep 5.2.1: DECODE16, DECODE8, and DECODE4 library macros are missing DECODE attribute Answers Database Mentor Graphics Library for XACTstep 5.2.1: DECODE16, DECODE8, and DECODE4 library macros are missing DECODE attribute www.datasheetarchive.com/files/xilinx/docs/wcd00008/wcd008ee-v1.htm |
Xilinx | 16/02/1999 | 4.17 Kb | HTM | wcd008ee-v1.htm |
| not have complete DECODE attributes attached to WAND1s under the DECODExx symbol. When EDIF2XNF Xilinx Answer #2639 : Mentor Graphics Library for XACTstep 5.2.1: DECODE16, DECODE8, and DECODE4 library macros are missing DECODE attribute Answers Database Mentor Graphics Library for XACTstep 5.2.1: DECODE16, DECODE8, and DECODE4 library macros are missing DECODE attribute www.datasheetarchive.com/files/xilinx/docs/wcd00008/wcd00898.htm |
Xilinx | 17/07/1998 | 4.08 Kb | HTM | wcd00898.htm |
| ZPSD211R ZPSD211R ZPSD211R ZPSD211R 256Kb (x8) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44, PQFP44 PQFP44 PQFP44 PQFP44 ZPSD301 ZPSD301 ZPSD301 ZPSD301 256Kb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44, PQFP44 PQFP44 PQFP44 PQFP44, TQFP44 TQFP44 TQFP44 TQFP44 ZPSD301R ZPSD301R ZPSD301R ZPSD301R 256Kb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44 ZPSD302 ZPSD302 ZPSD302 ZPSD302 512Kb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44, PQFP44 PQFP44 PQFP44 PQFP44, TQFP44 TQFP44 TQFP44 TQFP44 ZPSD302R ZPSD302R ZPSD302R ZPSD302R 512Kb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44 ZPSD303 ZPSD303 ZPSD303 ZPSD303 1Mb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44, PQFP44 PQFP44 PQFP44 PQFP44, TQFP44 TQFP44 TQFP44 TQFP44 ZPSD303R ZPSD303R ZPSD303R ZPSD303R 1Mb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44 ZPSD311 ZPSD311 ZPSD311 ZPSD311 256Kb (x8 www.datasheetarchive.com/files/stmicroelectronics/stonline/db/158-v4.txt |
STMicroelectronics | 13/12/2000 | 0.97 Kb | TXT | 158-v4.txt |
| 211R 256Kb (x8) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44, PQFP44 PQFP44 PQFP44 PQFP44 PSD301 PSD301 PSD301 PSD301 256Kb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44, PQFP44 PQFP44 PQFP44 PQFP44, TQFP44 TQFP44 TQFP44 TQFP44 PSD301R PSD301R PSD301R PSD301R 256Kb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44 PSD302 PSD302 PSD302 PSD302 512Kb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44, PQFP44 PQFP44 PQFP44 PQFP44, TQFP44 TQFP44 TQFP44 TQFP44 PSD302R PSD302R PSD302R PSD302R 512Kb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44 PSD303 PSD303 PSD303 PSD303 1Mb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44, PQFP44 PQFP44 PQFP44 PQFP44, TQFP44 TQFP44 TQFP44 TQFP44 PSD303R PSD303R PSD303R PSD303R 1Mb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PLCC44 PLCC44 PSD311 PSD311 PSD311 PSD311 256Kb (x8) EPROM, 16Kb www.datasheetarchive.com/files/stmicroelectronics/stonline/db/153-v4.txt |
STMicroelectronics | 13/12/2000 | 0.96 Kb | TXT | 153-v4.txt |
| ; architecture Xilinx of io_decoder is COMPONENT DECODE1_IO PORT ( I: IN std_logic; O: OUT std Edge Decoder: Output "DECODE(0)" - A0: DECODE4 port map (ADR(3), ADR(2), ADR(1), ADR ); A6: PULLUP port map (DECODE(0); - Instantiation of Edge Decoder: Output "DECODE(1 ); - Instantiation of Edge Decoder: Output "DECODE(2)" - C0: DECODE4 port map (ADR(3), ADR_INV(2 ); C6: PULLUP port map (DECODE(2); - Instantiation of Edge Decoder: Output "DECODE(3 www.datasheetarchive.com/files/xilinx/bbs/swhlp/synopsys/vhdl/io_decod/io_decod.vhd |
Xilinx | 30/05/1995 | 4.49 Kb | VHD | io_decod.vhd |
| ; architecture Xilinx of io_decoder is COMPONENT DECODE1_IO PORT ( I: IN std_logic; O: OUT std Edge Decoder: Output "DECODE(0)" - A0: DECODE4 port map (ADR(3), ADR(2), ADR(1), ADR ); A6: PULLUP port map (DECODE(0); - Instantiation of Edge Decoder: Output "DECODE(1 ); - Instantiation of Edge Decoder: Output "DECODE(2)" - C0: DECODE4 port map (ADR(3), ADR_INV(2 ); C6: PULLUP port map (DECODE(2); - Instantiation of Edge Decoder: Output "DECODE(3 www.datasheetarchive.com/download/61635476-996530ZC/xsi_vhdl.tar |
Xilinx | 09/04/1997 | 12384 Kb | TAR | xsi_vhdl.tar |
| ; architecture Xilinx of io_decoder is COMPONENT DECODE1_IO PORT ( I: IN std_logic; O: OUT std Edge Decoder: Output "DECODE(0)" - A0: DECODE4 port map (ADR(3), ADR(2), ADR(1), ADR ); A6: PULLUP port map (DECODE(0); - Instantiation of Edge Decoder: Output "DECODE(1 ); - Instantiation of Edge Decoder: Output "DECODE(2)" - C0: DECODE4 port map (ADR(3), ADR_INV(2 ); C6: PULLUP port map (DECODE(2); - Instantiation of Edge Decoder: Output "DECODE(3 www.datasheetarchive.com/download/78754389-996537ZC/xsivnowk.tar |
Xilinx | 20/01/1997 | 9960 Kb | TAR | xsivnowk.tar |
| _INV = ~ADR[3:0]; assign CLB_INV = ~CLB_INT; /* instantiation of Edge Decoder: Output "DECODE[0 Edge Decoder: Output "DECODE[1]" */ DECODE4 B0 (.A3(ADR[3]), .A2(ADR[2]), .A1(ADR_INV[1 ]); PULLUP B6 (.O(DECODE[1]); /* instantiation of Edge Decoder: Output "DECODE[2]" */ DECODE4 C0 of Edge Decoder: Output "DECODE[3]" */ DECODE4 D0 (.A3(ADR_INV[3]), .A2(ADR[2]), .A1(ADR[1 /* Edge Encoder * A XC4000 XC4000 XC4000 XC4000 LCA has special decoder circuits * at each edge. These decoders and www.datasheetarchive.com/files/xilinx/bbs/swhlp/synopsys/verilog/io_decod/io_decod.v |
Xilinx | 30/05/1995 | 3.5 Kb | V | io_decod.v |
| _INV = ~ADR[3:0]; assign CLB_INV = ~CLB_INT; /* instantiation of Edge Decoder: Output "DECODE[0 Edge Decoder: Output "DECODE[1]" */ DECODE4 B0 (.A3(ADR[3]), .A2(ADR[2]), .A1(ADR_INV[1 ]); PULLUP B6 (.O(DECODE[1]); /* instantiation of Edge Decoder: Output "DECODE[2]" */ DECODE4 C0 of Edge Decoder: Output "DECODE[3]" */ DECODE4 D0 (.A3(ADR_INV[3]), .A2(ADR[2]), .A1(ADR[1 /* Edge Encoder * A XC4000 XC4000 XC4000 XC4000 LCA has special decoder circuits * at each edge. These decoders and www.datasheetarchive.com/download/98542422-996536ZC/xsiverlg.tar |
Xilinx | 20/01/1997 | 8960 Kb | TAR | xsiverlg.tar |