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Part Manufacturer Description PDF Samples Ordering
TP3070V-G/63 Texas Instruments IC PROGRAMMABLE CODEC, Codec ri Buy
NC7SP19P6X_NL Fairchild Semiconductor Corporation TinyLogic ULP 1-of-2 Decoder/Demultiplexer ri Buy
NC7SP19L6X_NL Fairchild Semiconductor Corporation TinyLogic ULP 1-of-2 Decoder/Demultiplexer ri Buy

decode

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: encoding protocol decoder for a proprietary bus schemes from 10 b/s to 10 Gb/s. or decode , that only #7; transitions of interest are decoded. 2 for word size D 7. #7; efine CRC or footer , ) # of Decode Waveforms Up to 4 buses may be decoded at  one time. In addition, zooms can be , Manchester and NRZ Configurable Protocol Decode Quickly decode serial buses that use Manchester , industry standards and rely on proprietary encoding or buses not supported by oscilloscope decode tools ... Teledyne LeCroy
Original
datasheet

4 pages,
857.8 Kb

TEXT
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Abstract: Decoded 1 ^ 1 /V' >> lof3 Decode As3-9 1 of 123 Decode X MITSUBISHI ELECTRIC — (REV 4.0) March , . Addresses As0-As2 must be set low. Ad3-7 1of32 Decode II DRAM 256KX16 256KX16 DRAM Row Decoder .8X16 , / SRAM 1KX16 1KX16 I SRAM Row Decode! f 16 bits bits V/t/'"' AsO-2 1of8 Decode Buffer Write Transfer , Write Transfer cycle). Ad3-7 1of32 Decode m DRAM 256KX16 256KX16 te- y/ '//. DRAM Row Decoder , I SRAM Row Decodei -^- As3-9 10(128 Decode J^ MITSUBISHI ELECTRIC _(REV 4.0) March. 1995 ... OCR Scan
datasheet

10 pages,
460.99 Kb

M5M4V4169TP20 M5M4V4169TP15 M5M4V4169TP-15 AS3A m5m4v4169 1kx16 M5M4V4169TP 256K-WORD 16-BIT 1024-WQRD TEXT
datasheet frame
Abstract: for a serial data trigger and decode. Convenient Table Display Summarizes Results Turn your , I2C, SPI, UART, RS-232 RS-232 Serial Data Trigger and Decode Key Features • #7;I2C, SPI, UART and RS-232 RS-232 Trigger and Decode • #7;Color-coded decode overlaid on the waveform is intuitive and , , , in range, out of range). • #7;Hex, Binary or ASCII decoding • #7;Decode information expands as , , Don’t Care) in all frame trigger setups (I2C) • #7;Decode does not require clock trace to be ... LeCroy
Original
datasheet

4 pages,
503.34 Kb

RS-232 TEXT
datasheet frame
Abstract: overlay the decoded data on the waveform. Decode information condenses or expands depending on the , data trigger and decode. Convenient Table Display Summarizes Results Turn your oscilloscope into , Order or Polarity setup). Any analog Channel, Memory, or Math trace. Decode Input # of Decoded , Serial Data Trigger and Decode Leading Features · I2C, SPI, UART and RS-232 RS-232 Trigger and Decode · Color-coded decode overlaid on the waveform is intuitive and easy to read · Powerful and ... LeCroy
Original
datasheet

4 pages,
1273.79 Kb

RS-232 TEXT
datasheet frame
Abstract: probes) input(s) for decoder. Detects auto negotiation (option for 100BASE-TX 100BASE-TX). Decode Capability , ENET Data Layer Decode Key Features • E #7; thernet Data Layer Decode for Ethernet , not C #7; olor-coded decode highlights Decode Annotation Complements Physical Layer Views , analyzer. information decoded and displayed on the physical 10BASE-T 10BASE-T and 100BASE-TX 100BASE-TX • â , color-coded to make it easy to D #7; ecode information expands understand. Decode annotation as the ... Teledyne LeCroy
Original
datasheet

2 pages,
657.7 Kb

TEXT
datasheet frame
Abstract: thresholds to properly condition the signal for triggering and decode. Differential probing may be required , thresholds to properly condition the signal for triggering and decode. Differential probing may be required , /measurement thresholds to properly condition the signal for triggering and decode. Differential probing may , CAN, LIN and FlexRay Protocol Triggering and Decode for Infiniium 90000 Series Oscilloscopes , Agilent’s CAN, LIN and FlexRay triggering and decode application. This application makes it easy to ... Agilent Technologies
Original
datasheet

8 pages,
701.62 Kb

TEXT
datasheet frame
Abstract: RX TONE DECODE The MX165C MX165C CTCSS Encoder/Decoder is a low voltage, CMOS device that meets TIA/EIA , this output will go to logic 1 during a successful decode. It must be externally integrated to control , TIA/EIA-603 TIA/EIA-603 that the MX165C MX165C will encode and decode. They are : 159.8Hz, 183.5Hz, 189.9Hz, 196.6Hz , mVRMS 30 mVRMS 3.5 dB 140 ms Decoder Pure tone decode threshold 19 Composite , DATA BULLETIN Low Voltage CTCSS Encoder/Decoder MX165C MX165C with TX/RX Filters Features ... MX-COM
Original
datasheet

16 pages,
216.49 Kb

RX 3E MX465 MX165CTN MX165CLH MX165C D0-D10 1035H MX165CDW MX165CP TEXT
datasheet frame
Abstract: memory ­ Runs out of the box a. Capture/Preview b. Simultaneous Video Encode/Decode H.264 (Baseline Profile) Video Encode/Decode, G.711 Speech Encode/Decode (CIF) 2. PC-based High-level demos , Encode (D1) b. Decode demo modes H.264 (Baseline Profile) Video Decode (D1), G.711 Speech Decode MPEG4 (Standard Profile) Video Decode (CIF), G.711 Speech Decode MPEG2 Video Decode (D1), AAC LC Decode MPEG2 Video Decode (D1), MPEG1 Layer1 Decode c. Host PC Application for data transfer and storage ... Original
datasheet

2 pages,
19.73 Kb

TMS320DM6437 TMDSVDP6437 dm6437 EVM DM6437 TEXT
datasheet frame
Abstract: Plc DECODED TONE GROUP No decode. 2nd tone group decoded. 1st tone group decoded. Either tone , DECODE (Bit 2) CMX823 CMX823 This bit indicates the status of the tone decoder. A "1" indicates a tone , decoder that can operate on low S/N signals. Each decoded tone frequency is user-defined to provide the , and indicate the decoder status, the target tone decoded and its tone group. The CMX823 CMX823 operates over , and matched with those of the received signal to find a tone decode. If a match is found, the CMX823 CMX823 ... CML Microcircuits
Original
datasheet

22 pages,
319.46 Kb

CMX823P3 CMX823E4 CMX823 TEXT
datasheet frame
Abstract: decodes. Decode Status Change: Any change in the decoder operation Unlisted Tone: Whenever a , correct amplitude for the decoder process. Control and Data Decode frequency stability is ensured , signal to find a tone decode. Tone decode status changes are flagged in the Status Register. Tone , INNOVATIONS INV/TwoWay/823/1 August 2003 CMX823 CMX823 Programmable Paging-Tone Decoder An Ultra-Low-Power Audio Tone Decoder for Paging Operations in Low Signal-to-Noise Environments www.cmlmicro.com ... CML Microcircuits
Original
datasheet

4 pages,
612.65 Kb

PMR446 CMX823E4 CMX823P3 CMX881 CMX882 CMX883 CMX981 32 pin ic tone control EV8810 CMX649 CMX823 TEXT
datasheet frame

Archived Files

Abstract Saved from Date Saved File Size Type Download
/xprim_4000/decode4.xnf, 0 HIERG, 8, decode1_int, C5, / >, 0 HIERG, 9, decode1_int, C2, /products/testarea/sparc/520/ds401/data/synopsys /xprim_4000/decode4.xnf, 0 HIERG, 11, decode1_int, C3, / >, 0 HIERG, 12, decode1_io, B1, / >, 0 HIERG, 13, decode1_int, A5, /products/testarea/sparc/520/ds401/data/synopsys
/datasheets/files/xilinx/bbs/swhlp/synopsys/vhdl/io_decod/io_decod.xtf
Xilinx 31/05/1995 12.11 Kb XTF io_decod.xtf
, OLDLCANET, 5 SYM, A0/$1I1, WAND, HIERG=30, DECODE, LIBVER=2.0.0 PIN, I, I, N305, , INV PIN, O, O, DECODE END SYM, A0/$1I2, WAND, HIERG=30, DECODE, LIBVER=2.0.0 PIN, I, I, N304 PIN, O, O, DECODE END SYM, A0/$1I3, WAND, HIERG=30, DECODE, LIBVER=2.0.0 PIN, I, I, N303 PIN, O, O, DECODE END SYM, A0/$1I4, WAND, HIERG=30, DECODE, LIBVER=2.0.0 PIN, I, I, N302 PIN, O, O, DECODE END SYM, A1/$1I5, WAND, HIERG=27, DECODE, LIBVER=2.0.0 PIN, I, I, N301 PIN, O, O, DECODE END SYM, A2/$1I5, WAND, HIERG=19
/datasheets/files/xilinx/bbs/swhlp/synopsys/verilog/io_decod/io_decod.map
Xilinx 02/06/1995 8.61 Kb MAP io_decod.map
Decoder: Output "DECODE[0]" */ DECODE4 A0 (.A3(ADR[3]), .A2(ADR[2]), .A1(ADR[1]), .A0(ADR_INV[0]), .O(DECODE[0]); DECODE1_IO A1 (.I(ADR[4]), .O(DECODE[0]); DECODE1_INT A2 (.I(CLB_INV[0]), .O(DECODE[0]); DECODE1_INT A3 (.I(CLB_INT[1]), .O(DECODE[0]); DECODE1_INT A4 (.I ]), .A0(ADR[0]), .O(DECODE[0]); DECODE1_IO C1 (.I(ADR[4]), .O(DECODE[2]); DECODE1_INT C2 (.I ]); DECODE1_IO D1 (.I(ADR[4]), .O(DECODE[3]); DECODE1_INT D2 (.I(CLB_INT[0]), .O(DECODE[3
/datasheets/files/xilinx/bbs/swhlp/synopsys/verilog/io_decod/io_decod.v
Xilinx 30/05/1995 3.5 Kb V io_decod.v
l l 0 1 2 3 0 1 1 1 PSD211R PSD211R 256Kb (x8) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44, PQFP44 PQFP44 PSD301 PSD301 256Kb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44, PQFP44 PQFP44, TQFP44 TQFP44 PSD301R PSD301R 256Kb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PSD302 PSD302 512Kb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44, PQFP44 PQFP44, TQFP44 TQFP44 PSD302R PSD302R 512Kb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44 PSD303 PSD303 1Mb (x16) EPROM, 16Kb SRAM, Decode PLD, 19 I/O PLCC44 PLCC44, PQFP44 PQFP44, TQFP44 TQFP44 PSD303R PSD303R 1Mb (x16) EPROM, Decode PLD, 19 I/O PLCC44 PLCC44
/datasheets/files/stmicroelectronics/stonline/db/153-v4.txt
STMicroelectronics 13/12/2000 0.96 Kb TXT 153-v4.txt
/decode1_int.xnf, 0 HIERG, 10, decode4, B0, / > /decode1_int.xnf, 0 HIERG, 25, decode4, C0, / > /decode1_int.xnf, 0 HIERG, 30, decode4, A0, / > HIERG, 8, decode1_int, C5, / > /decode1_int.xnf, 0 HIERG, 12, decode1_io, B1, /
/datasheets/files/xilinx/bbs/swhlp/synopsys/vhdl/io_decod/io_decod.xtg
Xilinx 31/05/1995 13.05 Kb XTG io_decod.xtg
/xprim_4000/decode4.xnf, 0 HIERG, 8, decode1_int, C5, / >, 0 HIERG, 9, decode1_int, C2, /products/testarea/sparc/520/ds401/data/synopsys /xprim_4000/decode4.xnf, 0 HIERG, 11, decode1_int, C3, / >, 0 HIERG, 12, decode1_io, B1, / >, 0 HIERG, 13, decode1_int, A5, /products/testarea/sparc/520/ds401/data/synopsys
/datasheets/files/xilinx/bbs/swhlp/synopsys/verilog/io_decod/io_decod.xtg
Xilinx 02/06/1995 12.68 Kb XTG io_decod.xtg
/decode1_int.xnf, 0 HIERG, 25, decode4, C0, / > /decode1_int.xnf, 0 HIERG, 30, decode4, A0, / > , 8, decode1_int, C5, / >, 0 HIERG, 9, decode1_int, C2, / > HIERG, 11, decode1_int, C3, / >
/datasheets/files/xilinx/bbs/swhlp/synopsys/verilog/io_decod/io_decod.xff
Xilinx 02/06/1995 13.57 Kb XFF io_decod.xff
/ >, 0 HIERG, 8, decode1_int, C5, / >, 0 HIERG, 9, decode1_int, C2, /products / >, 0 HIERG, 11, decode1_int, C3, / >, 0 HIERG, 12, decode1_io, B1, / >, 0 HIERG, 13, decode1_int, A5, /products
/datasheets/files/xilinx/bbs/swhlp/synopsys/vhdl/io_decod/io_decod.xg
Xilinx 31/05/1995 17.16 Kb XG io_decod.xg
, 4010PG191-5 4010PG191-5 USER, OLDLCANET, 5 SYM, A0/$1I1, WAND, HIERG=30, DECODE, LIBVER=2.0.0 PIN, I, I, N317, , INV PIN, O, O, DECODE END SYM, A0/$1I2, WAND, HIERG=30, DECODE, LIBVER=2.0.0 PIN, I, I, N316 PIN, O, O, DECODE END SYM, A0/$1I3, WAND, HIERG=30, DECODE, LIBVER=2.0.0 PIN, I, I, N315 PIN, O, O, DECODE END SYM, A0/$1I4, WAND, HIERG=30, DECODE, LIBVER=2.0.0 PIN, I, I, N314 PIN, O, O, DECODE END SYM, A1/$1I5, WAND, HIERG=27, DECODE, LIBVER=2.0.0 PIN, I, I, N313 PIN, O, O, DECODE END SYM, A2/$1I5, WAND
/datasheets/files/xilinx/bbs/swhlp/synopsys/vhdl/io_decod/io_decod.map
Xilinx 31/05/1995 9.47 Kb MAP io_decod.map
/decode1_int.xnf, 0 HIERG, 25, decode4, C0, / > /decode1_int.xnf, 0 HIERG, 30, decode4, A0, / > , 8, decode1_int, C5, / >, 0 HIERG, 9, decode1_int, C2, / > HIERG, 11, decode1_int, C3, / >
/datasheets/files/xilinx/bbs/swhlp/synopsys/verilog/io_decod/io_decod.xnf
Xilinx 02/06/1995 13.57 Kb XNF io_decod.xnf