Top Results
| Part | Manufacturer | Description | Datasheet | BUY |
|---|---|---|---|---|
| CLTEQ-81-TSTR-TIMER | TE Connectivity Ltd | CLTEQ-81-TSTR-TIMER |  |
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| ICM7242CBA | Intersil Corporation | PULSE; RECTANGULAR, TIMER, PDSO8 |  |
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| SE556CJ | Texas Instruments | DUAL RECTANGULAR, TIMER, CDIP14 |  |
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| HS9-82C54RH-Q | Intersil Corporation | 3 TIMER(S), PROGRAMMABLE TIMER, CDFP24 | |
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| ICM7555IBAT | Intersil Corporation | PULSE; RECTANGULAR, 0.1MHz, TIMER, PDSO8 | |
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| CS82C54-1096 | Intersil Corporation | 3 TIMER(S), PROGRAMMABLE TIMER, PQCC28 | |
daz-0 TIMER
| Catalog Datasheet | MFG & Type | Document Tags | |
|---|---|---|---|
AP-485Abstract: architecture of 80487 . 16 3.6 Pentium® 4 Processor, Model 0 Output Example , value to "0" and then execute the CPUID instruction as follows MOV CPUID EAX, 00H After the , as well. If the EAX register contains an input value of 0, the CPUID instruction also returns the , returned by the CPUID instruction. 7 AP-485 Output of CPUID if EAX = 0 31 Highest Value EAX Highest Integer Value 31 EBX EDX ECX Vendor ID 0 23 15 7 0 u (75) n (6E) e (65) G |
Intel Original |
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architecture of 80487 BIOS Writers Guide 80486 Opcodes 80487 RapidCAD architecture of intel 80487 |
MELPS 740Abstract: Bl P6o .15 events â'¢ Master CPU bus interface.1 byte â'¢ 16-bit timer (Serial I/O use).1 â'¢ Serial I/O (UART or , Timing output 0 port P6 I Read/Write status output Synchronous signal output -E -E -E *E -E â'¢E â'¢E , Ats Do ¡3-D, ⺠0* - os Outline 64P4B $ > > < < â'¢ 2-ÃSgjj zmiiii>> , Output 2-bitX1 Serial I/O UART or clock synchronous Timers 16-bit timerX3, 8-bit timer(serial I/O |
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M37450S1SP MELPS 740 Bl P6o BL p6d 80P6 M37450S1SP/FP M37450S2SP/FP M37450S1 M37450S4SP/FP M37450M2-XXXSP/FP |
MELPS 740Abstract: "MELPS 740" .15 events â'¢ Master CPU bus interface.1 byte â'¢ 16-bit timer (Serial I/O use) .1 â'¢ Serial I/O (UART or , instructions+2) Instruction execution time 0. 8^s(minimum instructions, at 10MHz of frequency) Clock , -bitX1 Serial I/O UART or clock synchronous Timers 16-bit timerX3. 8-bit timer(serial I/O baud rate generator , port, timer, etc., are assigned to this area. Addresses 0000,6 to 007F,e are the RAM address area |
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M37450S1FP m37450m4 MELPS MELPS-740 circuit diagram for simple IR robots M37450M4-XXXSP/FP 16VCC |
gpsp material propertyAbstract: Creative Soundblaster respective holders. REV. 0 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617 , interface with built-in timer, a DSP serial port and two I2S Serial ports. The MODIOâ"¢ drivers utilize CPU , ISA Bus Registers .38 -2- REV. 0 SPECIFICATIONS AD1821 STANDARD TEST CONDITIONS UNLESS , Audio Output Passband Vih Vil 25 5.0 5.0 48 1008 °C V V kHz Hz 20 Hz to 20 kHz 5.0 V 0 V DAC Test Conditions 0 dB Attenuation Input Full Scale 16-Bit Linear Mode 100 kà Output Load Mute Off Measured at Line |
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ADI821 gpsp material property Creative Soundblaster AD1821JS soundblaster programming POM CRY MONITOR AD1821JS-M 100-L S-100 |
pja 0923Abstract: Sound Blaster Z Series Yamaha Corporation. JDirectSound is a trademark of Microsoft Corp. REV. 0 Inform ation furnished by , patent o r patent rights o f A nalog Devices. , . 40 -2 - REV. 0 AD1815 SPECIFICATIONS STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED , kHz 5.0 V VlH 0 V v IL ANALOG INPUT Parameter Full-Scale Input Voltage (RMS Values Assume Sine Wave Input) M ONOJN, LINE, SYNTH, CD, VID M D M JN MIC with +20 dB Gain (MGE = 1) MIC with 0 dB Gain (MGE = 0 |
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pja 0923 Sound Blaster Z Series daz-0 TIMER ca 2295 pir 345 AdLib Multimedia MPU-401 100-P C2175-5-9/96 |
AD1816JSAbstract: stereo to 5.1 converter circuit diagram A A PC_D (7:0) PC_A (15:0) AEN DACK (X) IOR IOW BCLK (1) LRCLK (1) SDATA (1 , MASTER VOLUME BCLK (0) LRCLK (0) SDATA (0) DIGITAL PLL PCLKO SCLK SDFFS PS SERIAL PORT (0) PS SERIAL PORT (1) 2 SDO M SDI PHAT STEREO MV , trademark of Creative Labs. AdLib/OPL3 is a trademark of AdLib Multimedia. REV. 0 Information furnished , analog stereo output, an MPU-401 UART, joystick interface with a built-in timer, a DSP serial port, and |
Analog Devices Original |
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AD1816 AD1816JS stereo to 5.1 converter circuit diagram Digital ECHO microphone mixing circuit ci 555 16 pin FM Stereo Decoder Integrated Circuit 5 in 1 audio system circuit ST-100 |
Yamaha amplifierAbstract: sound card Creative 5.1 FORMAT 16-BIT D/A CONVERTER M A M PC_D (7:0) PC_A (11:0) AEN DACK (X) IOR IOW I2S SERIAL PORT (0) BCLK (0) LRCLK (0) DATA (0) BCLK (1) LRCLK (1) DATA (1) A DIGITAL PLL , REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no , 28 31 32 39 39 40 40 2 REV. 0 AD1815 SPECIFICATIONS STANDARD TEST CONDITIONS , V V 48 kHz 12.8 kHz 1008 Hz 20 Hz to 20 kHz 400 Hz to 4.2 kHz 5.0 V 0 V DAC Test |
Analog Devices Original |
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Yamaha amplifier sound card Creative 5.1 FM Stereo Decoder Integrated Circuit 16 pin computer motherboard circuit diagram 486 Transistor Substitution Data Book 1993 wavetable synthesizer C2175 |
pc motherboard intel 945 block diagramAbstract: gpsp material property of their respective holders. REV. 0 Information furnished by Analog Devices is believed to be , interface with built-in timer, a DSP serial port and two I2S Serial ports. The MODIOâ"¢ drivers utilize CPU , ISA Bus Registers .38 REV. 0 Powered by ICminer.com Electronic-Library Service , 25 5.0 5.0 48 1008 °C V V kHz Hz 20 Hz to 20 kHz 5.0 V 0 V DAC Test Conditions 0 dB , Test Conditions 0 dB Gain Input -4 dB Relative to Full Scale Line Input Selected 16-Bit Linear Mode |
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pc motherboard intel 945 block diagram pc motherboard intel 945 block diagram ic find PNPB02F ADS7180 ADS7181 ADS7182 |
ibm T22Abstract: IBM0316169C (Mx) Burst Length Burst Type Mode M3 Type 0 0 0 0 0 Normal 0 Sequential X X 1 0 0 Multiple Burst with Single Write 1 Interleave CAS Latency M6 M5 M4 Burst Length Length Latency M2 M1 M0 Sequential Interleave 0 0 Reserve 0 0 1 1 0 0 0 1 1 0 1 0 2 0 0 1 2 2 0 1 1 3 0 1 0 4 4 1 0 0 Reserve 0 1 1 8 8 1 0 |
IBM Original |
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IBM0316169C IBM0316809C ibm T22 SDRAM 1996 22TCK IBM0316409C 100MH 07H3997 SA14-4711-02 |
pir 815Abstract: Yamaha AX 496 trademark of Yamaha Corporation. $DirectSound is a trademark of Microsoft Corp. REV. 0 Information , REV. 0 SPECI Fl GAIIONS AD1815 STANDARD TEST CONDITIONS UNLESS DAC Test Conditions OTHERWISE NOTED C alibrated Temperature 25 °C 0 dB Attenuation Digital Supply (VDD) 5.0 V Input Full Scale , kHz ADC Test Conditions Modem Output Passband 400 Hz to 4.2 kHz C alibrated vIH 5.0 V 0 dB Gain VlL 0 V Input -1.0 dB Relative to Full Scale Line Input Selected 16-Bit Linear Mode ANALOG INPUT |
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pir 815 Yamaha AX 496 54PDR ez 948 sound card Creative sound blaster 4 channel 15PIN D-SUB used in joystick |
ibm t20Abstract: IBM0316169C Mode Register (Mx) Burst Length Burst Type Mode M3 Type 0 0 0 0 0 Normal 0 Sequential X X 1 0 0 Multiple Burst with Single Write 1 Interleave , 0 0 Reserve 0 0 1 1 0 0 0 1 1 0 1 0 2 0 0 1 2 2 0 1 1 3 0 1 0 4 4 1 0 0 Reserve 0 1 1 8 8 1 0 1 Reserve 1 0 0 Reserve Reserve 1 1 0 Reserve 1 0 |
IBM Original |
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ibm t20 SA14-4711-03 |
pc motherboard intel 945 block diagram ic findAbstract: gpsp material property . (Sticky, Write "0" to Clear). 0 No interrupt 1 Interrupt is pending from the timer count register , PC_D (7:0) PC_A (15:0) AEN (X) G = GAIN A = ATTENUATE M = MUTE MV = MASTER VOLUME XTALI , Devices, Inc. All trademarks are the property of their respective holders. REV. 0 Information , compatible music synthesizer, an MPU-401 UART and a joystick interface with a built-in timer. The AD1817A , 33 33 34 39 REV. 0 AD1817A SPECIFICATIONS STANDARD TEST CONDITIONS UNLESS OTHERWISE |
Analog Devices Original |
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pir chip creative sound blaster 5.1 circuit diagram roland e 20 resistor MPC 71 0.47 hn plug MPU401 C3071 |
IBM0316809CAbstract: ibm T22 (Ax) A0 Mode Register (Mx) Burst Length Burst Type M3 0 0 0 0 Normal X X 1 0 0 Sequential 1 0 Type 0 Mode Interleave Multiple Burst with Single Write CAS Latency Burst Length M6 M5 M4 Latency 0 0 0 Reserve Length 0 0 1 1 0 0 0 1 1 0 1 0 2 0 0 1 2 2 0 1 1 3 0 1 0 4 4 1 0 0 Reserve 0 1 1 8 8 1 0 |
IBM Original |
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cmos dram T20 96 diode SA14-4711-06 |
gpsp material propertyAbstract: pcr150 PC_D (7:0) PC_A (15:0) AEN DACK (X) IOR IOW 2 16-BIT D/A CONVERTER A IRQ (X , MASTER VOLUME I2S SERIAL PORT (0) BCLK (0) LRCLK (0) SDATA (0) I2S SERIAL PORT (1) BCLK , timer, a DSP serial port and two I2S serial ports. The AD1816A on-chip Plug and Play routine provides , Hz to 20 kHz 5.0 0 °C V V kHz Hz DAC Test Conditions 0 dB Attenuation Input Full Scale 16-Bit Linear Mode 100 k Output Load Mute Off Measured at Line Output ADC Test Conditions 0 dB |
Analog Devices Original |
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pcr150 MPC2 motherboard 945 pin detail AD1816AJS AD1816AJST JST LLM C2969 |
AD1816AJSAbstract: MPC2 PLAY ISA BUS PARALLEL INTERFACE SELECTOR DSP SERIAL PORT IRQ (X) PC_D (7:0) PC_A (15:0) AEN , M A 16-BIT D/A CONVERTER 2 M A I2S SERIAL PORT (0) BCLK (0) LRCLK (0) SDATA (0) BCLK (1) LRCLK (1) SDATA (1) PCLKO PHAT STEREO M A , timer, a DSP serial port and two I2S serial ports. The AD1816A on-chip Plug and Play routine provides , 5.0 0 °C V V kHz Hz V V DAC Test Conditions 0 dB Attenuation Input Full Scale 16-Bit Linear Mode |
Analog Devices Original |
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IS1R ibm joystick |
gpsp material propertyAbstract: Creative Soundblaster G A M G A M G A M A G A M 2 PHATTM STEREO A A FIFO PC_A (15:0) AEN DACK (X) IOR IOW BCLK (0) LRCLK (0) SDATA (0) BCLK (1) LRCLK (1) SDATA (1) DIGITAL PLL PCLKO SCLK SDFS SERIAL PORT INTERFACE OSCILLATORS XTALO PC_D (7:0) I2S SERIAL PORT (0) 2 G = GAIN A = ATTENUATE M = MUTE MV = MASTER VOLUME IRQ (X) I2S SERIAL , the property of their respective holders. REV. 0 Information furnished by Analog Devices is |
Analog Devices Original |
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intel chipset 945 motherboard diagram MIDI/AUDIO soundblaster C3057 |
gpsp material propertyAbstract: mip* 552 A_1 B_1 A_2 B_Y DRQ (X) IRQ (X) PC_D (7:0) PC_A (15:0) AEN DACK (X) IOR IOW 2 M A , 16-BIT D/A CONVERTER 2 M A I2S SERIAL PORT (0) BCLK (0) LRCLK (0) SDATA (0) BCLK (1) LRCLK (1 , expanding the analog stereo output, an MPU-401 UART, joystick interface with a built-in timer, a DSP serial , 5.0 5.0 48 1008 20 Hz to 20 kHz 5.0 0 °C V V kHz Hz V V DAC Test Conditions 0 dB Attenuation , Conditions 0 dB Gain Input 4 dB Relative to Full Scale Line Input Selected 16-Bit Linear Mode OBS ANALOG |
Analog Devices Original |
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mip* 552 PNPB006 |
adg smdAbstract: not required to end this operation. 7 0 WD1, WD0: Watchdog Timer Bits The bits WD1 and WD0 control the period of the watchdog timer. The options are shown below. WD1 0 0 1 1 WD0 0 1 0 1 , EEPROM FEATURES · Selectable watchdog timer · Low VCC detection and reset assertion -Five standard , protection circuitry -Protect 0, 1/4, 1/2, all or 16, 32, 64 or 128 bytes of EEPROM array with Block LockTM , four popular functions, Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block |
Intersil Original |
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adg smd X4043 X4045 FN8118 X4043/45 X4003 X4005 |
gpsp material propertyAbstract: Creative Soundblaster SERIAL PORT IRQ (X) PC_D (7:0) PC_A (15:0) AEN DACK (X) IOR IOW 2 M A M G A M G A M G A M G A M G A , 2 FORMAT PHATTM STEREO 16-BIT D/A CONVERTER 2 M A I2S SERIAL PORT (0) BCLK (0) LRCLK (0) SDATA (0) BCLK (1) LRCLK (1) SDATA (1) 2 M G = GAIN A = ATTENUATE M = MUTE MV = MASTER , Devices, Inc. All other trademarks are the property of their respective holders. REV. 0 Information , with built-in timer, a DSP serial port and two I2S Serial ports. The MODIOTM drivers utilize CPU |
Analog Devices Original |
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intel network controller |
DBS04Abstract: QSMR © Features MITEL CMOS ST-BUSTM FAMILY M T 8 9 1 0 -1 Digital Subscriber Line Interface , line attenuation diagnostics Frame and superframe synchronization On-chip 15 second timer Insertion , information MT8910-1AC 28 Pin Ceramic DIP MT8910-1AP 44 Pin PLCC 0°C to +70°C Description The MT8910 , of the device to allow for daisy-chaining of other ST-BUS devices. Active after channel 0 in Dual , unconnected for normal operation. Mode Select 0. CMOS input. Refer to Table 1. Mode Select 1. CMOS input |
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DBS04 QSMR detecting DSSS signal MT8910-1 |
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