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PRELI INARY MATRIX 80-OUT SEGMENT DRIVER NJU6415 serial input, 80
Top Searches for this datasheetPRELI INARY MATRIX 80-OUT SEGMENT DRIVER NJU6415 serial input, 80-out segment driver matrix LCDs, especially useful extension driver controller drivers like NJU6426. consists bidirectional shift register, 80-bit latch, 80-out high voltage drivers. bidirectional shift register performs efficient extension driver allocation according nuntier characters easy wiring with panel. 80-driver level voltage input drive LCD, adjustable driving voltage according panel supplied from external power source. PACKAGE OUTLINE NJU6415F FEATURES Segment Drivers 80-bit Shift Register Bidirectional Shift Register) Shift Direction Select Terminal Fast Data Transmission Shift Clock min.) External Power Supply Driving Voltage Driving Voltage 3.0V 13.5V Operating Voltage Package Outline QFPIOO/Chip C-MOS Technology BLOCK DIAGRAM SBGl SEG4D SEG80 5-676 Nvugapan. Radio CoJicL CONFIGURATION ODOtiOO utiluciltilliluet] ulwwcilwwww wwwwwujblw mnmnnnran raroracoromMW nnnnnnnnnnnnnnnnmnnnnnnnnnnnn wwwwwwwwwwwwwwww wwwwwwww wwwwww wwMWOTwromMMOiOTCQrarara toco coco TERMINAL DESCRIPTION SYMBOL FUNCTION 1-30 51-100 SEGeo' SEG31 segment driving terminal. Each terminal corresponds each shift register Data input terminal. terminal fixed input terminal regardless shift direction. Display data input synchronized with clock signal. Data output terminal. terminal fixed output terminal regardless shift direction. data output synchronized with clock signal. Shift register clock pulse input terminal. data shifted shift register falling edge clock pulse. data setip time hold time required between data input SCL. Clock pulse rising time falling time should less than 50ns (MAX) respectively. Shift direction select terminal. Shift direction from 80th bit. Shift direction from 80th bit. terminals fixed input output terminal respectively regardless this terminal input level. Latch pulse input terminal. data shift register lajcjjed Latch ^his signal. Data writing, Data latch Alternate signal input driving. Power supply terminal (connect controller's terminal) Power supply terminal (connect controller's terminal) 33,35,34,32 Vo,V2,V3,V5 driving power source terminals. Vdd^Vo^V^Vs^Vs^Vssh 38,43,45 47-50 connection.(Normally open) gapcui Radio 5-677 FUNCTIONAL DESCRIPTION Shift register control 80-bit shift register bidirectional register. shift direction 80-bit bidirectional shift register shown below: Control Terminal Input Shift Direction (Note) terminals fixed input output terminal respectively regardless input level. driver output truth table Input Data 1ect on/Norr 1ect Driver Output (SEGi SEGbo) Selection (Vdd) selection ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATINGS UNIT Supply Voltage Supply Voltage Note Vo,V2,V3,V5,V8sh Vdd-13.5 Vdd+0.3 Input Voltage Vdd+O.3 Operating Tenperature Topr Storage Temperature Tstg Note relation Vdd^Vo^V2^V3^V5^Vssh must maintained. 5-678 fapan. Radio Co.,Hd. ELECTRICAL CHARACTERISTICS Characteristics Ta=-20 PARAMETER SYMBOL CONDITIONS UNIT Input Voltage Notel) 0.8Vdd 0.2Vdd Input Current Notel) Output Voltage Note2) -40uA Voi. 0.4mA Driver On-resistance Note3) 0.05mA Operating Current Logic Part LM,LP=130ys cycle, SCL=1.5MHz. Every Inverted Data. Load. Operating Current Driver Part SSHO cycle, SCL=1.5MHz. Every Inverted Data. Load. Driving Voltage Vssh Terminal, Vdd=5V Vdd-3.0 Vdd-13.5 Note Apply SCL, terminals. Note Apply terminal. Note Apply SEGi SEGso terminals. Characteristics PARAMETER SYMBOL CONDITIONS UNIT Propagation Delay Time Tplh(hl) Maximum Operating Frequency Duty Pulse Width Pulse Width Time Tset Time Time Data Hold Time Thold Rise, Fall Time Trs, Rise, Fal1 Time Trl, faon Radio Co., lid. 5-679 CHARACTERISTICS TIMING CHART 5-680 Nrnt/fapan Radio Co^IJd. TIMING CHART Bias, 1/16 Duty Ratio Frue Simal Llne[| LlnepLlne[] Line pLInejjLlnepLlne^Llne^Llne^ enlarge -n-n_n_rLTLn :xzxzxz)aa rLTLrLTLTLXI _n_n_11 LATCH-DATA ,.M_rij~i_n_ru_.^n_n_rLrm Vlco Vssi SEGMENT SIGNAL OUTPUT TIMING Ilpsd tLMSD PARAMETER SYMBOL CONDITIONS UNIT Output Delay Time Tlpsd lOOpF Output Delay Time Tlmsd lOOpF Nwfapan Radio CoMd 5-681 DRIVING WAVEFORM EXAMPLE Bias, 1/16 Duty Ratio Couon COM, COM, rnM,, 7-W-t COM,s Setaent Couon CONi-Senent SEG, (Selection lavefori) Conon CONi* Segient SEGi (Non-selection lavefori) Note case terminal connected Vdd. 5-682 fapcui Radio Co^Iid APPLICATION CIRCUIT 24-character 4-line Display Example (NJU6426 NJU6415) Radio 5-683 Other recent searchesSPP77N05 - SPP77N05 SPP77N05 Datasheet SiZ720DT - SiZ720DT SiZ720DT Datasheet Si4884DY - Si4884DY Si4884DY Datasheet PLL502-22 - PLL502-22 PLL502-22 Datasheet MAX4475 - MAX4475 MAX4475 Datasheet MAX4478 - MAX4478 MAX4478 Datasheet MAX4488 - MAX4488 MAX4488 Datasheet MAX4489 - MAX4489 MAX4489 Datasheet MAX4475 - MAX4475 MAX4475 Datasheet MAX4488 - MAX4488 MAX4488 Datasheet MAX4488 - MAX4488 MAX4488 Datasheet 4489 - 4489 4489 Datasheet MAX4475 - MAX4475 MAX4475 Datasheet MAX4476 - MAX4476 MAX4476 Datasheet LT1777 - LT1777 LT1777 Datasheet LR15284-5 - LR15284-5 LR15284-5 Datasheet FCP11N60N - FCP11N60N FCP11N60N Datasheet ADAU1761 - ADAU1761 ADAU1761 Datasheet ADAU1361 - ADAU1361 ADAU1361 Datasheet
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