SGS-THOMSON S-TH0MS0N IRF540 CHIP CHANNEL ENHANCEMENT M

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SGS-THOMSON S-TH0MS0N IRF540 CHIP CHANNEL ENHANCEMENT M

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7^237 0030132 l-^-J^
SGS-THOMSON
S-TH0MS0N
IRF540 CHIP
CHANNEL ENHANCEMENT MODE POWER TRANSISTOR FORM
SIZE: 170x170 mils METALLIZATION:
Back Au/Cr/Ni/Au
BACKSIDE THICKNESS: 6100
THICKNESS: mils
PASSIVATION: P-Vapox BONDING SIZE:
Source 47x51 mils
Gate 15x18 mils RECOMMENDED WIRE BONDING:
Source mils
Gate mils
SCHEMATIC DIAGRAM
Voss (on)
0.077
N-channel enhancement mode POWER field effect transistor. Easy drive very fast switching times make this POWER ideal high speed switching applications.
geometry
SOURCE GATE Drain backside
With R(hj-c max-
June 1988
IRF540 CHIP 7^5^537^00 30133J
S-TH0MS0N
GUARANTEED PROBED ELECTRICAL CHARACTERISTICS (Tj= Note
Parameters Test Conditions Min. Typ. Max. Unit
v(br) Drain-source breakdown voltage VGS=
lDSS Zero gate voltage drain current VDS= Rating VDS= Rating 1000
less Gate-body leakage current
(th) Gate threshold voltage
(on) Static drain-source resistance VQS=10V
NOTES: probe testing limitations parameters only tested. They measured using pulse techniques: pulse width <300 /ts, duty cycle detailed device characteristics please refer discrete device datasheet
SGS-THOMSON

SGS-THOMSON S-TH0MS0N IRF540 CHIP CHANNEL ENHANCEMENT M

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