74LVCU04 Wide supply voltage range accordance with JEDEC sta

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74LVCU04 Wide supply voltage range accordance with JEDEC sta

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inverter
74LVCU04
Wide supply voltage range
accordance with JEDEC standard
Inputs accept voltages upto
CMOS power consumption
Direct interface with levels
DESCRIPTION
74LVCU04 high-performance, low-power, low-voltage, Si-gate CMOS device superior most advanced CMOS compatible families.
74LVCU04 general purpose inverter. Each inverters single stage.
FUNCTION TABLE
INPUT OUTPUT
HIGH voltage level voltage level
QUICK REFERENCE DATA
Tamb
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tpHl/tpLH propagation delay
input capacitance
power dissipation capacitance gate notes 16.8
Notes quick reference data
used determine dynamic power dissipation jxW) Vcc2 Vcc2 where:
input frequency MHz; output load capacity output frequency MHz; supply voltage Vcc2 outputs.
condition
ORDERING PACKAGE INFORMATION
TYPE NUMBER PACKAGES
PINS PACKAGE MATERIAL CODE
74LVCU04N plastic SOT27-1
74LVCU04D plastic SOT108-1
74LVCU04DB SSOP plastic SOT337-1
74LVCU04PW TSSOP plastic SOT402-1
PINNING
SYMBOL NAME FUNCTION
data inputs
data outputs
ground
positive supply voltage
1996 711002b
This Material Copyrighted Respective Manufacturer
inverter
74LVCU04
IA1"T 14]VCC
[j2~ 1516A
2A[~3~
2Y|~4~ "TTI5A
SAPS"
~9~14A
gndIT" ~8~14Y
Fig.1 configuration.
Fig.2 Logic symbol.
Fig.3 Logic symbol.
Fig.4 Schematic diagram (one inverter).
1996 7110fl2h 0100471
This Material Copyrighted Respective Manufacturer
Philips Semiconductors inverter 74LVCU04
CHARACTERISTICS LVCU04
Over recommended operating conditions Voltages referenced (ground
SYMBOL PARAMETER Tamb UNIT TEST CONDITIONS
OTHER
MIN. TYP. MAX.
HIGH level input voltage VOL(max) -100
level input voltage VOH(min)
HIGH level output voltage Vcc-0.2 -100
Vcc-1.0
level output voltage 0.40 0.20 0.55
input leakage current pins
quiescent supply current
Note: typical values measured Tamb
QQfi
711002b
This Material Copyrighted Respective Manufacturer
inverter
CHARACTERISTICS 74LVCU04
74LVCU04
SYMBOL PARAMETER Tamb TEST CONDITIONS
UNIT WAVEFORMS
MIN. TYP. MAX.
tpHl/tpLH propagation delay 4.3* Fig.
Notes: typical values measured Tamb
Typical values measured
WAVEFORMS
INPUT VOH(2) OUTPUT
VOL<2>
Notes:
VM<1>
vM<1>
-4plh
Fig. Waveforms showing data input (nA) data output (nY) propagation delays
VatV,
typical output voltage drop that occur with output load.
1996
711062b oiocmai
This Material Copyrighted Respective Manufacturer
inverter
74LVCU04
Rbias
0.47
input
kHz)
output
Fig.9 Test set-up measuring forward transconductance diyd^ constant (see also graph Fig.10).
APPLICATION INFORMATION
Some applications 'LVCU04' are:
Linear amplifier (see Fig.11)
crystal oscillator designs (see Fig.12)
Astable multivibrator (see Fig.
(mA/V)
VCC(V)
Fig.10 Typical forward transconductance function supply voltage Tamb
-cx-
Fig.11 LVCU04 used linear amplifier. Note Fig.11
(typical)
~Vcc-1.5V centered
Typical unity gain bandwidth product Fig.14
open loop amplification voltage amplification
1996
This Material Copyrighted Respective Manufacturer
Philips Semiconductors inverter 74LVCU04
Fig. Crystal oscillator configuration.
Note Fig.12
(typ.)
(typ.)
(typ.)
optimum value depends
frequency required stability against
changes average minimum
Fig. LVCU04 used astable multivibrator.
Note Fig.13
1996 7110flSb
This Material Copyrighted Respective Manufacturer

74LVCU04 Wide supply voltage range accordance with JEDEC sta

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