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LF441 Power JFET Input Operational Amplifier LF441 power operatio


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National Semiconductor
LF441 Power JFET Input Operational Amplifier
LF441 power operational amplifier provides many same characteristics industry standard LM741 while greatly Improving characteristics LM741. amplifier same bandwidth, slew rate, gain load) LM741 only draws tenth supply current LM741. addition, well matched high voltage JFET Input devices LF441 reduce input bias offset currents factor 10,000 over LM741. combination careful layout design internal trimming guarantees very input offset voltage voltage drift. LF441 also very equivalent Input noise voltage power amplifier. LF441 compatible with LM741, allowing immediate times reduction power drain many applications. LF441 should used where power
dissipation good electrical characteristics major considerations.
1/10 supply current LM741 (max)
input bias current (max)
input offset voltage (max)
input offset voltage drift fiWC (max)
High gain bandwidth
High slew rate V/jas
noise voltage power nV/l/Hz
input noise current 0.01 pA/v'Hz
High input impedance 10i2n
High gain (min)
Typical Connection
Ordering Information
LF441XYZ
indicates electrical grade indicates temperature range military, commerciai indicates package type
Connection Diagrams
Metal Package
Dual-ln-Line Package
NON-INVERTING INPUT
View
Note: connected case.
Order Number LF441MH/883 Package Number H08A
TL/H/9297-2
TL/H/9297-4
View Order Number LF441ACN, LF441CM LF441CN Package Number MOSA N08E
b5Gl].E4 DCH4372
1-77
This Material Copyrighted Respective Manufacturer
Absolute Maximum Ratings
Military/Aerospace specified devices required, please contact National Semiconductor Sales Office/Distributors availability specifications.
LF441A LF441
Supply Voltage
Differential Input Voltage
Package
(Note
Power Dissipation (Notes
(Typical) Board Mount still Board Mount airflow
Operating Temp. Range Storage Temp. Range Lead Temperature (Soldering, seconds)
Soldering Information Dual-ln-Line Package Soldering sec.) Small Outline Package Vapor Phase sec.) Infrared sec.)
Input Voltage Range
(Note Output Short Circuit Duration
Package
130-C/W
(Note -65-C 150'C
LF441A
Continuous
Package
LF441
Continuous
LF441A
LF441
AN-450 "Surface Mounting Methods Their Effect Product Reliability" other methods soldering surface mount devices.
Tolerance (Note Rating Determined
Electrical Characteristics (Note
Symbol Parameter Conditions LF441A LF441 Units
Input Offset Voltage 10kn,TA
Over Temperature
AVos/AT Average input Offset Voltage (Note
Input Offset Current (Notes
Input Bias Current (Notes
Input Resistance 1012 1012
AVOL Large Signal Voltage Gain +15V, kn,TA V/mV
Over Temperature V/mV
Output Voltage Swing
Input Common-Mode Voltage Range
CMRR Common-Mode Rejection Ratio
bSOllSM 0QTM373
1-78
This Material Copyrighted Respective Manufacturer
Electrical Characteristics (Note (continued)
Symbol Parameter Conditions LF441A LF441 Units
PSRR Supply Voltage Rejection Ratio (Note
Supply Current
Electrical Characteristics (Note
Symbol Parameter Conditions LF441A LF441 Units
Slew Rate +15V,TA V/>s
Gain-Bandwidth Product
Equivalent Input Noise Voltage
Equivalent Input Noise Current 0.01 0.01
Note Unless otherwise specified absolute maximum negative input voltage equal negative power supply voltage. Note operating elevated temperature, these devices must derated based thermal resistance
Note temperature range designated position just before package type device number. indicates commercial temperature range indicates military temperature range. military temperature range available package only.
Note Unless otherwise specified specifications apply over full temperature range LF441A LF441.
Vqs- measured
Note LF441A 100% tested this specification.
Note input bias currents junction leakage currents which approximately double every increase junction temperature, limited production test time, input bias currents measured correlated junction temperature. normal operation junction temperature rises above ambient temperature result Internal power dissipation, where thermal resistance from junction ambient. heat sink recommended input bias current kept minimum.
Note Supply voltage rejection ratio measured both supply magnitudes increasing decreasing simultaneously accordance with common practice. From LF441 from LF441 Note Refer RETS441X LF441MH military specifications.
Note Max. Power Dissipation defined package characteristics. Operating part near Max. Power Dissipation cause part operate outside guaranteed limits.
Note Human body model, series with
Typical Performance Characteristics
Input Bias Current
Supply Current
COMMON-MODE VOLTAGE
Positive Common-Mode Input Voltage Limit
TEMPERATURE
Negative Common-Mode Input Voltage Limit
SUPPLY VOLTAGE 11V)
Positive Current Limit
POSITIVE SUPPLY VOLTAGE
NEGATIVE SUPPLY VOLTAGE
OUTPUT SOURCE CURRENT |mA)
tl/h/9297-5
b501124 DCH4374
1-79
This Material Copyrighted Respective Manufacturer
Typical Performance Characteristics (continued)
Negative Current Limit
OUTPUT SINK CURRENT (mA)
Gain Bandwidth
1.75
1.50
1.25
0.75
0.25
TEMPERATURE
Distortion Frequency
FREQUENCY(Hz)
Common-Mode Rejection Ratio
CMRR OPEN LOOP VOLTAGE GAIN
100k FREQUENCY (Hz)
Output Voltage Swing
-R|=10k
SUPPLY
Bode Plot
RL=10k
PHASE
FREQUENCY (MHz)
Undlstorted Output Voltage Swing
Rl=10k Ay=1 oisT
FREQUENCY (Hz)
Power Supply Rejection Ratio
[+SUP
UPPLY*
100k FREQUENCY (Hz)
Output Voltage Swing
Rl-0UTPUT LOAD (Ml)
Slew Rate
-100
-150
LING
TEMPERATURE
Open Loop Frequency Response
RL=10k
Tn-25"C
100k FREQUENCY (Hz)
Equivalent Input Noise Voltage
FREQUENCY (Hi)
100k
1-80
bSOllEM QDIMBTS
This Material Copyrighted Respective Manufacturer
Typical Performance Characteristics (continued)
Open Loop Voltage Gain
Output Impedance
100k
SUPPLY VOLTAGE
Simplified Schematic
VccO-
FRE0UENCY (Hz)
-Vee
Pulse Response iokn, iopF
Small Signal Inverting
TIME (0.5 ^s/DIV)
Inverter Settling Time
settun8 time cuj)
TL/H/9297-3
bS01124 D0R437t
1-81
This Material Copyrighted Respective Manufacturer
Pulse Response kil, (Continued)
Small Signal Non-Inverting
TIME (0.5 jiS/DIV)
TL/H/9297-9
Large Signal Inverting
TIME (10/iS/DIV)
TL/H/9297-10
Large Signal Non-Inverting
TIME fiS/OIV)
TL/H/9297-11
fc.-5011P4 00^4377
This Material Copyrighted Respective Manufacturer
Application Hints
This device power with internally trimmed input offset voltage JFET input devices (BI-FET II). These JFETs have large reverse breakdown voltages from gate source drain, eliminating need clamps across inputs. Therefore, large differential input voltages easily accommodated without large increase input current. maximum differential input voltage independent supply voltages. However, neither input voltages should allowed exceed negative supply this will cause large currents flow which result destroyed unit. Exceeding negative common-mode limit either input will force output high state, potentially causing reversal phase output. Exceeding negative common-mode limit both inputs will force amplifier output high state. neither case does latch occur since raising input back within common-mode range again puts input stage thus amplifier normal operating mode.
Exceeding positive common-mode limit single input will change phase output; however, both inputs exceed limit, output amplifier will forced high state.
amplifier will operate with common-mode input voltage equal positive supply; however, gain bandwidth slew rate decreased this condition. When negative common-mode voltage swings within negative supply, increase input offset voltage occur.
amplifier biased allow normal circuit operation with power supplies Supply voltages less than these degrade common-mode rejection restrict output voltage swing.
amplifier will drive load resistance over full temperature range.
Precautions should taken ensure that power supply integrated circuit never becomes reversed polarity that unit inadvertently installed backwards socket, unlimited current surge through resulting forward diode within could cause fusing internal conductors result destroyed unit. with most amplifiers, care should taken with lead dress, component placement supply decoupling order ensure stability. example, resistors from output input should placed with body close input minimize "pick-up" maximize frequency feedback pole minimizing capacitance from input ground.
feedback pole created when feedback around amplifier resistive. parallel resistance capacitance from input device (usually inverting input ground) frequency this pole. many instances frequency this pole much greater than expected frequency, closed loop gain consequently there negligible effect stability margin. However, feedback pole less than approximately times expected frequency, lead capacitor should placed from output input amp. value added capacitor should such that time constant this capacitor resistance parallels greater than equal original feedback pole time constant.
Detailed Schematic
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LS01124
1-83
This Material Copyrighted Respective Manufacturer

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