MATRIX 80-0UT SEGMENT PRELI NARY NJU6416 serial input, 80-ou

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MATRIX 80-0UT SEGMENT PRELI NARY NJU6416 serial input, 80-ou

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MATRIX 80-0UT SEGMENT
PRELI NARY
NJU6416 serial input, 80-out segment driver matrix LCDs, especially useful extension driver controller drivers like NJU6426.
consists bidirectional shift register, 80-bit latch, 80-out high voltage drivers.
bidirectional shift register perforins efficient extension driver allocation according nmtjer characters easy wiring with panel.
80-driver level voltage input drive LCD, adjustable driving voltage according panel supplied from external power source.
PACKAGE OUTLINE
NJU6416F
FEATURES
Segment Drivers 80-bit Shift Register
Bidirectional Shift Register) Shift Direction Select Terminal Fast Data Transmission Shift Clock min.) External Power Supply Driving Voltage Driving Voltage 3.0V 13.5V Operating Voltage Package Outline QFPIOO/Chip C-MOS Technology
BLOCK DIAGRAM
SEGl
5-684
-New2am tedio
Q00b353
This Material Copyrighted Respective Manufacturer
U6-4
CONFIGURATION
OOOOOOOO UOtiOOOOO WWWWWWWW WWWWMMWW WWWWWWMW rawracawcoroca
nnnnnnnnnnnnnnnnnnnnnnnnnnnnnn
OOCJO OOOOUOOU uuuooo Ulti WWWWUWtiJW EDO] (DCaCQU EOCOCOCQQQTOCOCO CQGQCQ03QQCQ
TERMINAL DESCRIPTION
SYMBOL
SEGeo segment driving terminal. Each terminal corresponds each shift register
Data input terminal. terminal fixed input terminal regardless shift direction. Display data input synchronized with clock signal.
Data output terminal. terminal fixed output terminal regardless shift direction. data output synchronized with clock signal.
Shift register clock pulse input terminal. data shifted shift register fal1ing edge clock pulse. data setip time hold time required between data input SCL. Clock pulse rising time falling time should less than 50ns(MAX) respectively.
Shift direction select terminal. Shift direction from 80th bit. Shift direction from 80th bit. terminals fixed input output terminal respectively regardless this terminal input level.
Latch pulse input terminal. data shift register latched Latch this signal. Data writing, Data latch
Alternate signal input driving.
Power supply terminal (connect controller's terminal) Power supply terminal (connect controller's terminal)
32,34,35,33 Vo,V2,V3,V5 vssh driving power source terminals. Vdd^Vo^Vz^SVbSVssh
38,43,45 47-50 connection.(Normal!y open)
-New Chocui Radio
QQObBSM
This Material Copyrighted Respective Manufacturer
FUNCTIONAL DESCRIPTION
Shift register control
80-bit shift register bidirectional register.
shift direction 80-bit bidirectional shift register shown below:
Control Terminal Input Shift Direction
Wj^W
(Note) terminals fixed input output terminal respectively regardless input level.
driver output truth table
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATINGS UNIT
Sippiy Voltage
Supply Voltage Note Vdd-13.5 VDD+0.3
Input Voltage Vdd+0.3
Operating Temperature Topr
Storage Temperature Tstg
Note relation must maintained.
5-686-Neu>ihaanRadio Co.,Ad.-
DDDbBSS 22fl
This Material Copyrighted Respective Manufacturer
Input Data Se1ect on/Non-se1ect Driver Output (SEGi SEG80)
Selection
Non-selection
ELECTRI CHARACTERI
Characteristics Ta=-20
PARAMETER SYMBOL CONDITIONS UNIT
Input Voltage Notel) 0.8Vdd
0.2Vdd
Input Current Notel)
Output Voltage Note2) -40juA
0.4mA
Driver Note3) 0.05mA
Operating Current Logic Part LM,LP=130jus cycle, SCL=1.5MHz. Every Inverted Data. Load.
Operating Current Driver Part ssho LM,LP=130/js cycle, SCL=1.5MHz. Every Inverted Data. Load.
Driving Voltage Vlcd Vssh Terminal, Vdd=5V Vdd-3.0 Vdd-13.5
Note Apply SCL, terminals.
Note Apply terminal.
Note Apply SEGi SEG8o terminals.
Characteristics
PARAMETER SYMBOL CONDITIONS UNIT
Propagation Delay Time TpLH(Hb)
Maximum Operating Frequency Duty
Pulse Width
Pulse Width
Time Tset
Time
Time
Data Hold Time Thold
Rise, Fall Time Tfs,
Rise, Fall Time Tfl,
Qapcut Radio Co.,JtkL OOObBSb
This Material Copyrighted Respective Manufacturer
5-687
U6-4
CHARACTERISTICS TIMING CHART
0.8Vdd
o.avp o.zvD
0-8VD
O.DVD O.IVD
0.8VDO O.XVSD
O.BV,
avOD
0.8Vdo 0.1VDD
O.SVDD)r
<K1Yvjgj-
5-688-New Zapon Radio Co.,Ud.~
bSbTfifiB 000b357
This Material Copyrighted Respective Manufacturer
;jrc
U6-4
TIMING CHART Bias, 1/16 Duty Ratio FRAME
SIGNAL 4^164.14^24.3 4.164.
)CDCZnt
LATCH DATA
enlarge
LATCHI DATA
XZXZXZ)<
LATCH
-rLn_n_n_n_n
"XZXZXHZXZX n-n_rT-n_n_n
SEGMENT SIGNAL OUTPUT TIMING
tLPSD
tLMSD
PARAMETER SYMBOL CONDITIONS UNIT
Output Delay Time Tlpsd 100pF
Output Delay Time Tlmsd 100pF
gapcui Radio Co.,
000h35fl
5-689
This Material Copyrighted Respective Manufacturer
DRIVING WAVEFORM EXAMPLE Bias, 1/16 Duty Ratio
Catron
COM. (fr^
COM,
Vlcd
COM,
COM,
.iiii COM,
COM.o-
COMu (t)(t) (t)(
COM,, Cpd) COM,. COM,,
Segment
Common GOMi Segment SEG, (Selection Waveform)
SEG'
Vlcd
3/5Vlcd
Vlcd
-1/5 Vlcd -3/5 Vlcd -Vlcd
Note
Cormon COMj -Segment SEG,
(Non-selection Waveform)
Vlcd
Vlcd
-1/5 Vlcd -3/5 Vlcd -Vlcd
"TT1
Frame
Note case terminal connected Vdd.
5-690-New faxm Radio Co.Hd.-
bSfc^flAB DOOtiBSI =173
This Material Copyrighted Respective Manufacturer
CJRC3
APPLICATION CIRCUIT
24-character Display Example (NJU6426 NJU6416)
con,
SEC,
-SEG.e
Matrix Panel 24-character, 4-line
SEGi
-New Zhecui Radio CoIM-5-691
D0Gb3L0
This Material Copyrighted Respective Manufacturer

MATRIX 80-0UT SEGMENT PRELI NARY NJU6416 serial input, 80-ou

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