CLC520 very flexible DC-coupled Automatic Gain Control amplifier (AGC)

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CLC520 very flexible DC-coupled Automatic Gain Control amplifier (AGC)

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Wideband Amplifier Differential Amplifier
CLC520 very flexible DC-coupled Automatic Gain Control amplifier (AGC). Unique features include closely-matched differential inputs, wideband gaincontrol channel (100MHz), ground referenced DCcoupled output signal driven from output impedance amplifier. Figure illustrates internal block diagram assignments CLC520.
resistors internal current-mirror gain. Both adjusted yield wide range differential gains. example, circuit Figure used demonstrate performance CLC520 fixedgain differential amplifier configuration.
Figure CLC520 Fixed-gain differential amplifier configuration Figure CLC520 internal block diagram shown Figure unity-gain closed-loop input buffers pins used force input voltages appear across external resistor, differential voltage across generates signal current which amplified factor 1.85 into quadrant multiplier stage. gain-adjustment voltage determines much this signal current makes through multiplier stage, with remainder signal current being shunted ground. multiplier's output current then flows through transimpedance amplifier formed external feedback resistor, internal amplifier. non-inverting input this output amplifier, Vref, tied ground then groundreferenced DC-coupled replica differential voltage across appears output amp. values along with gain-adjust voltage, determine gain. Refer CLC520 data sheet more complete operational performance discussion. order implement fixed-gain differential amplifier, CLC520 will rely very well-matched input buffers it's differential-to-single-ended voltage conversion. purposes this discussion, gaincontrol input will held fixed level yield maximum gain given 1.85*Rf/Rg. Thus, differential signal gain depends only ratio external
1993 National Semiconductor Corporation
Printed U.S.A.
demonstrate this application, CLC520 gain 4.08V/V. impedance-matching resistor output effectively halves differential gain 2.04V/V (6.2dB) load. Figure shows single-ended gain phase response both inputs linear frequency scale through 200MHz. Note 180° phase offset inverting-signal gain, indicating signal inversion. slightly quicker roll-off inverting-gain response consistent from part part. This broadband performance maintained part operated higher gain settings. close, broadband, gain match inputs that allows CLC520 provide this wideband differential amplifier with very good common-mode signal rejection.
Figure Single-ended gain phase
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measure good differential amplifier ability reject common-mode signals. common approach describing this rejection Common Mode Rejection Ratio (CMRR). definition CMRR structured allow common-mode input signal placed series with differential inputs, (divided CMRR), equivalent error term. With following definition CMRR, equivalent input error term placed inputs shown Figure
measured gain phase circuit Figure shown Figure order maintain compatibility with common-mode gain measurement, this figure represented with logarithmic frequency sweep from 100kHz 100MHZ. This circuit offers exceptional gain-flatness with only 0.5dB roll-off 100MHZ.
Figure Differential gain test circuit
Figure Input-referred common-mode error model
Figure Differential gain phase This definition CMRR essentially input refers output signal common-mode input signal which effectively holds common-mode gain constant differential gain changed. computing actual input-to-output signal gain common-mode input voltage, simply Note, with logarithmic form CMRR yields large positive value. However, computing output common-mode signal, shown Figure linear (V/V) gain must used error must considered bipolar. measure CMRR defined Figure measure pure differential gain must first made. This measurement accomplished with circuit Figure This circuit uses transformer with center tapped secondary generate pure differential input signal. center also provides path ground supplying DC-bias current each inputs. necessary, cases, carefully consider source these DC-bias currents. transformer's frequency response normalized prior gain phase response measurement. Although using this transformer effectively couples differential gain, important recognize that CLC520 truly DC-coupled device. common-mode gain measured replacing each input resistors Figure with while connecting inputs together. Tying inputs together forces input signals exactly same while resistor replacement retains input impedance match. actual application, connecting inputs together impractical. most cases common-mode gain amplifier, mismatch signal attenuations arising from each signalsource's impedance into single-ended input impedance each differential amplifier's inputs. careful attention signal-source impedance match necessary order CMRR performance dominated amplifier deleterious effects signal-source impedance mismatches. common-mode gain measurement made here sidesteps those issues simply tying inputs together. Figure shows CMRR using measured differential gain, measured common-mode gain logarithmic form CMRR (Eq.1). upper limit CMRR low-frequencies (below 100kHz) approximately 70dB. This limit differential-to-single-ended conversion that takes place
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internal CLC520 higher frequencies, divergence single-ended gains results 40dB roll-off CMRR 10MHz (shown Figure CLC520's highimpedance inputs with internal wideband differentialto-single ended conversion combine form very wideband, high CMRR, differential amplifier.
Once parasitic capacitance ground pins been minimized, frequency response similar that shown Figure achieved each inputs separately. possible take advantage parasitic gain imbalance order bring inverting gain, higher frequencies, into closer match with non-inverting gain. closer gain match over wider frequency range will improve CMRR high frequencies. Although equivalent circuit Figure shows output that depends only current through additional current driven buffers will also generate output signal. Therefore, adding coupled path ground output inverting buffer, response matched that noninverting buffer. circuit Figure shows original test circuit with addition this frequency-response matching network CT).
Figure Common-mode rejection ratio circuit Figure Application Hints: Improving CMRR Several elements combine frequency response CLC520. input side, parasitic capacitance ground either buffer outputs (pins cause high-frequency peaking. essential keep trace capacitance small balanced when connecting tests shown here, soldered directly across pins while those pins were lifted from board. output side, will determine frequency response output amplifier. Since this amplifier uses current-feedback topology, dominant element determining frequency response. Increasing value used roll-off peaking caused parasitic capacitance output input buffers. However, preferable (from noise standpoint)to minimize this parasitic pins lower values (and therefore lower values particular gain). CLC520 designed with feedback resistor. Decreasing this value will cause frequency response peak, while increasing will roll response off. Most designs should start first selecting value then determine required using design equations found CLC520 data sheet. additional constraint lower values good linear operation that maximum current supplied buffers through should kept within ±1.35mA. This will maximum differential input voltage based this current limit value
Figure Differential amplifier with inverting response compensation single-ended frequency responses shown Figure show lower bandwidth inverting gain path non-inverting. This bandwidth mismatch consistent from part part internal gain path. buffer bandwidths considerably higher play role determining this response. following analysis will show select appropriate values such that frequency response inverting gain path matched that noninverting gain path.
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non-inverting path gain
single-ended gain response either input analyzed grounding input order determine current generated output active buffer channel. Adding RT-CT series combination will then provide means canceling internal inverting-path pole with zero, replacing with pole that matches that seen single-ended non-inverting gain path. Note, adding this network will impact non-inverting response long assumed buffers have zero output-impedance. following analysis provides method computing required values given initial single-ended frequency response each input shown Figure Note: input-to-output gain from current produced compensation path that gain current produced through
Figures show resulting single-ended frequency responses CMRR achieved through this compensation. Comparing Figure Figure shows much closer match over frequency. significant improvement high-frequency CMRR been achieved with this simple approach. should tuned best CMRR these higher frequencies. Note: when using different values remeasurement single-ended gains required order provide singleended gain poles necessary this compensation analysis.
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Setting Differential Gain CLC520 fixed gain, best (from temperature stability standpoint) operate maximum gain, determined adjustable portion CLC520's gain two-transistor internal differential stage which compares voltage seen internal reference voltage developed resistor divider from positive supply ground. With approximately 750W internally ground external resistor shown circuits above will develop approximately volts insuring internal gain stage fully switched maximum gain.
shut down this fashion, output remains lowimpedance driver: will tri-stated. However, when driving several these differential stages into MUX, shutting down CLC520's gain will significantly improve overall signal isolation output. adjustable-gain differential amplifier also implemented with CLC520.As discussed data sheet, CLC520's gain adjustment intended operation inside loop. gain-adjust accuracy temperature stability CLC520 does support open loop operation. companion part, CLC522, should used absolute gain accuracy gain temperature stability desired open loop feedback gain adjust pin), adjustable-gain differentialamplifier application. Input Noise equivalent input noise CLC520 largely value shown data sheet, model input noise voltage simply Rg*l 8pA/Hz given gain setting, scaling down values will reduce this input noise. Since controls output-amplifier stability, cannot made small. fixed decreasing will increase signal gain. Since input noise decreases same rate gain increases, output noise remains nearly constant decreased.
Figure Single-ended gains with inverting path compensation
Figure Improved CMRR with better response-match over frequency Note that signal gain also dependent internal current-mirror gain from current developed multiplier stage. This nominal 1.85 factor will show some part-to-part tolerance slight temperature dependence. part-to-part tolerance this current gain along with +80ppm/°C temperature drift over 0°-70°C used design CLC520 circuits. Ill. Using Gain Adjust fixed-gain differential amplifiers shown above also disabled with open-collector pull-down device Once pulled below volts, gain will attenuated greater than 60dB. Again, refer CLC520 data sheet full discussion signal attenuation gain-adjust voltage. Although forward path
Figure Input noise voltage Figure shows measured input-referred spot noise voltage differential amplifier circuit Figure Application Suggestion: Wideband Differential Coax Line Receiver often necessary transfer high-speed signals from point point matched-impedance coaxial line. Figure illustrates receiver implementation using CLC520 fixed gain. Since both buffers have highimpedance inputs, simple termination across center conductor properly terminate cable allowing differential signal picked-off amplified CLC520. This circuit ties coax shield into local ground through high-frequency blocking ferrite bead. This will help prevent coupling high-frequency common-mode noise from coaxial line onto local
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ground, while same time setting voltage current operating point CLC520 inputs. This will also break high-frequency ground loops between different pieces equipment.
Figure Video loop-through connection using wideband differential amplifier Figure Differential coax line receiver Application Suggestion: Video Loop-Through Amplifier loop-through connection alternative impedance-matching approach high-speed signals. this approach, high-input-impedance differential amplifier simply placed across center conductor shield with minimal loading characteristic impedance-matching. Good high-frequency commonmode rejection good wideband differential amplification essential this application. final destination this daisy-chained connection terminates cable it's characteristic impedance. implementation this loop-through connection using CLC520 shown Figure This circuit replication circuit Figure with some additional input resistors shutdown control gate. resistors ground will insure DC-bias path input-stage bias currents. absolutely certain that path through both center conductor shield will maintained, resistors eliminated with overall improvement VSWR. With only termination, CLC520's input offsetcurrent drift will generate nominal input offset-voltage drift 100mV/°C. desirable considering commonmode rejection offset-current drift, keep these input termination resistors large possible. Ideally, termination resistors should eliminated bias current supplied cable. Remember, mis-match single-ended attenuations from center conductor's shields source impedances into CLC520's input impedances will degrade CMRR. series 37.5 resistors into pins isolate inputs from cable reactance helping maintain high-frequency input stability. These resistors, included with parasitic input-capacitance ground, will also form matched-impedance termination cable very high frequencies (>500MHz): well beyond signal frequencies interest. full signal level would available downstream stages using this wideband differential amplifier loop-through connection. Application Suggestion: Very Wideband Pulse-Differencing Amplifier With addition several frequency-response trims, basic circuit Figure used implement very wideband pulse-differencing amplifier. Targeting gain +1V/V into matched load, bandwidths excess 300MHz achievable. Figure shows typical single-sided pulse response. input rise time this test approximately 800ps. With 1.15ns output rise time 08ns input rise time, amplifiers actual rise time approximately 0.8ns this 0.9Vstep load. Very similar well-matched results achieved both inverting non-inverting inputs.
Figure Very wideband single input pulse response
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Application Suggestion: Alternative Wideband Differential Amplifiers Although classical single differential amplifier found wide usage, several intrinsic problems limit it's performance. Both signal inputs looking into relatively necessarily well-matched impedances causing unbalanced signal-source attenuation, having effect degraded CMRR. Most simplified analysis assume source impedance order circumvent this problem. Furthermore, resistor inaccuracies, instead amplifier itself, will typically dominate CMRR. These resistors amplifier's open-loop gain will determine differential-to-single ended conversion carried well CLC520. However, classical single-amp differential amplifier combined with pair wideband, low-output-impedance buffers made approach performance CLC520. This approach preferred lower input noise, lower power dissipation improved DC-drift characteristics worth higher number parts, lower differential bandwidth necessary precise resistormatching. Figure provides example single-amp differential amplifier using buffers from CLC114 quad buffer low-gain with differential gain +1V/V.
response-match. four resistors should matched closely possible since mis-match will degrade CMRR. recommended low-gain differencing amplifier chosen from following selection National's wideband low-gain amplifiers. CLC402 Low-gain high-accuracy current-feed back amplifier Lower CMRR than CLC420 with wider bandwidth better fine-scale, pulsesettling accuracy. Very wideband, low-gain, current-feed back amplifier.
CLC409
CLC410
Intermediate performance, low-gain, current-feedback amplifier. This part also includes shutdown feature provides best dG/d_ composite video applications. Unity-gain stable voltage feedback amplifier This part will provide best CMRR accuracy Similar CLC402 with outputclipping feature
CLC420
CLC502
these parts optimized feedback resistor shown circuit Figure Conclusion operating speeds have increased, need wide-bandwidth high-CMRR differential amplifiers increased. National's CLC520 CLC522 provide required building blocks integrated into part. Although intended adjustable gain requirements, operating CLC520 fixed gain perfectly acceptable preferable differential receiver application. Signal bandwidths excess 150MHz over wide range gains, along with CMRR exceeding 60dB through l0MHz,and matched high-impedance inputs provide essential requirements wideband differential amplification. some applications using wideband, power buffers standard single differential amplifier topology offers certain advantages over CLC520 approach.
Figure Single amplifier differential amplifier with input buffering input-barriers provide many same advantages found with CLC520 inputs. input terminations described CLC520 used here well. optional resistor ground output non-inverting buffer provides means matching loads seen both buffer outputs. This load matching will improve high frequency
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LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT GENERAL COUNSEL NATIONAL SEMICONDUCTOR CORPORATION. used herein: Life support devices systems devices systems which, intended surgical implant into body, support sustain life, whose failure perform, when properly used accordance with instructions provided labeling, reasonably expected result significant injury user. critical component component life support device system whose failure perform reasonably expected cause failure life support device system, affect safety effectiveness.
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CLC520 very flexible DC-coupled Automatic Gain Control amplifier (AGC)

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