FEATURES Provides V.35 Differential Clock Data Signals Chip Single Sup

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FEATURES Provides V.35 Differential Clock Data Signals Chip Single Sup

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Single Supply V.35 Transceiver Preliminary Technical Information ADM1345
FEATURES Provides V.35 Differential Clock Data Signals Chip Single Supply Shutdown Mode Typical Pin-Selectable Configuration ESD-Protected Transmitter Outputs Receiver Inputs 10kV Failsafe Transmitter Outputs High Impedance when Disabled, Shutdown Power Short-Circuit Protected Transmitter Outputs Complies With CCITT V.35 Specification Flow-through Pinout Easy Layout Second Source LTC1345 APPLICATIONS Modems Telecommunications Data Routers FUNCTIONAL BLOCK DIAGRAM
ADM1345
C227
GENERAL DESCRIPTION
ADM1345 line transmitter/receiver that send receive differential clock data signals V.35 interface while requiring only single supply. device contains three current output differential line transmitters, three differential receivers, charge pump generate on-chip negative supply. ADM1345 operates data rates 10Mbaud. Transmitter outputs short-circuit protected failsafe, assuming high impedance state when transmitters disabled, device shut down, power off. Receiver Output Enable allows receiver outputs forced into high impedance state. receiver inputs transmitter outputs both protected against repeated electrostatic discharge (ESD) 10kV. complete V.35 port implemented using only ADM1345 capacitors charge pump, external resistor termination network, ADM208E control signals.
REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Analog Devices. Analog Devices, Inc., 1997 Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
ADM1345
Preliminary Technical Information
(VCC Full Operating Range, TMIN TMAX unless otherwise noted)
0.55 0.66 -9.4 12.6 +100 Units Test Conditions/Comments Figure Figure VY,Z VB)/2 VB)/2 4mA, 0.2V 4mA, -0.2V Transmitter Inputs, Transmitter Inputs, Transmitter Inputs, Figure HIGH Load, HIGH Shutdown, Load, HIGH Figures Figures Figures Figures Figures Figures Figures Figures 15pF Figures 15pF Figures 15pF Figures 15pF
ADM1345-SPECIFICATIONS
Parameter Transmitter Differential Output Voltage, Transmitter Common-Mode Output Voltage, TransmitterOutputHighCurrent, Transmitter Output Current, Transmitter Output Leakage Current, Transmitter Output Impedance, Differential Receiver Input Threshold Voltage, Receiver Input Hysteresis, Receiver Input Current Receiver Input Impedance, 17.5 Receiver Output High Voltage, Receiver Output Voltage, Receiver Output Short-Circuit Current, IOSR Receiver Three-State Output Current, IOZR Logic Input High Voltage, VINH Logic Input Voltage, VINL Logic Input Current, Supply Current, 0.44 -0.6 -12.6
Generated Negative Supply Voltage,
Transmitter Rise Fall Time, Transmitter Input Output Propagation Delay, High, tPLH Transmitter Input Output Propagation Delay, High Low, tPHL Transmitter Output Output Skew, tSKEW
-5.5 Mbaud
Receiver Input Output Propagation Delay, High, tPLH Receiver Input Output Propagation Delay, High Low, tPHL Differential Receiver Skew, (tSKEW tPLH tPHL Receiver Enable Output LOW, Receiver Enable Output HIGH, Receiver Disable From LOW, Receiver Disable From HIGH, Charge Pump Oscillator Frequency, fOSC Maximum Data Rate, BRMAX (Note Notes
currents into device pins termed positive; currents device pins termed negative. voltages referenced device ground unless otherwise specified. typicals given ceramic capacitors 25°C. Maximum data rate specified data encoding scheme. maximum data rate different other data encoding schemes. Data rate guaranteed correlation tested.
REV.
Preliminary Technical Information
ABSOLUTE MAXIMUM RATINGS*
+25°C unless otherwise noted)
C1GND C227
ADM1345
SupplyVoltage,VCC Input Voltage Transmitters -0.3V (Vcc 0.3V) Receivers -18V -0.3V (Vcc 0.3V) Output Voltage Transmitters -18V Receivers -0.3V (Vcc 0.3V) -10V 0.3V Short-Circuit Duration Transmitter Output. Indefinite Receiver Output Indefinite Operating Temperature Range Commercial 70°C Industrial -40°C 85°C Storage Temperature Range -65°C 150°C Lead Temperature (Soldering, sec) 300°C
*Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions above those listed operational sections this specification implied. Exposure absolute maximum ratings extended periods time affect device reliability.
VIEW (Not Scale)
ADM1345
Figure ADM1345 Configuration Diagram
ORDERING GUIDE Package Option
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although ADM1345 features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
Model
Temperature Range
ADM1345JN ADM1345JR
+70°C +70°C
N-28 R-28 N-28 R-28
ADM1345AN ADM1345AR
-40°C +85°C -40°C +85°C
REV.
ADM1345
Mnemonic C1GND
Preliminary Technical Information
FUNCTION DESCRIPTION Function Capacitor Positive Terminal.This positive side capacitor second stage charge pump. Capacitor Positive Terminal. This positive side capacitor first stage charge pump. Positive Supply, 4.75 5.25V. Capacitor Negative Terminal. This negative terminal capacitor first stage charge pump. Ground. positive terminal connected ground. Transmitter Input. TTL/CMOS-compatible logic input. Transmitter Input. TTL/CMOS-compatible logic input. Transmitter Input. TTL/CMOS-compatible logic input. Select Input TTL/CMOS-compatible logic input. Select Input TTL/CMOS-compatible logic input.
Receiver Output. TTL/CMOS-compatible logic output. Receiver Output. TTL/CMOS-compatible logic output. Receiver Output. TTL/CMOS-compatible logic output. Receiver Output Enable. TTL/CMOS-compatible logic input. Receiver Inverting Input.
Receiver Noninverting Input. Receiver Inverting Input.
Receiver Noninverting Input. Receiver Inverting Input.
Receiver Noninverting Input. Transmitter Inverting Output. Differential current source output. Sources current when low. Sinks current when high. Transmitter Noninverting Output. Differential current source output. Sinks current when low. Sources current when high. Transmitter Inverting Output. Differential current source output. Sources current when low. Sinks current when high. Transmitter Noninverting Output. Differential current source output. Sinks current when low. Sources current when high. Transmitter Inverting Output. Differential current source output. Sources current when low. Sinks current when high. Transmitter Noninverting Output. Differential current source output. Sinks current when low. Sources current when high. Charge Pump Output. Connected negative terminal capacitor Capacitor Negative Terminal.
REV.
Preliminary Technical Information Typical Performance Characteristics
ADM1345
1.5V 1MHz: 10ns: 10ns 1.5V
OUTPUT NORMALLY HIGH
1.5V
PULSE GENERATOR 125W
125W
15pF
RECEIVER OUTPUT
RECEIVER OUTPUT
OUTPUT NORMALLY
1.5V
0.5V 0.5V
Figure V.35 Transmitter/Receiver Test Circuit
Figure Receiver Enable Disable Times
Test Load Receiver Enable Output Low, Disable from Output
Test Load Receiver Enable Output High, Disable from Output High
Figure Receiver Test Loads tZL,
TRANSMITTER INPUT
1MHz: 10ns: 10ns 1.5V tPLH
VDIFF V(Y) V(Z)
1.5V tPHL tSKEW
Figure Transmitter Output Waveforms
tSKEW
Figure V.35 Transmitter Propagation Delays
-VID
RECEIVER OUTPUT
1MHz: 10ns: 10ns tPLH 1.5V tPHL 1.5V
Figure Receiver Output Waveforms
Figure V.35 Receiver Propagation Delays
REV.
ADM1345
Preliminary Technical Information
Figure Transmitter Output Current Temperature
Figure Receiver Skew Temperature
Figure Transmitter Output Current Output Voltage
TAAW
Figure Supply Current Temperature
Figure Transmitter Output Skew Temperature
Figure Temperature
REV.
Preliminary Technical Information
CIRCUIT DESCRIPTION
ADM1345
receivers have common Output Enable (OE) pin, which enables receiver outputs when puts receiver outputs into high impedance state when high. should held normal operation.
SELECT INPUTS
ADM1345 contains three transmitters with TTL/ CMOS-compatible inputs complementaryl currentsource outputs, three receivers with differential inputs TTL/CMOS-compatible outputs, inverting charge pump provide negative supply rail (VEE).
TRANSMITTER OUTPUTS
internal CMOS logic transmitter controls output stage consisting switched complementary current sources, shown figure
11mA
ADM1345 configured select inputs, which hardwired under software control. Using these inputs, four modes selected, shown following truth table. Table Transmitter Receiver Configuration Condition
Shutdown Mode, transmitters receivers inactive receivers active, shut down (DTE Mode) transmitters active, shut down (DCE Mode)
CHIP
11mA
125W EXTERNAL TERMINATOR
transmitters receivers active
mode, output shut-down transmitter (TX3) assumes high-impedance state. mode, output shut-down receiver (RX3) assumes high impedance state. shutdown mode low) charge pump switched off, clamped ground, transmitter receiver outputs assume high impedance state. Truth tables various transmitter receiver input conditions given below. Table Transmitter Truth Table Inputs Outputs
Figure Transmitter Equivalent Output Circuit
Configuration
With logic zero transmitter input, inverting output sources 11mA (positive current flows pin) non-inverting output sinks 11mA (positive current flows into pin). With logic transmitter input, converse true, sinks 11mA sources 11mA. differential transmitter output voltage termination resistors. With both transmitter receiver terminated with differential resistors, output voltage 11mA) 550mV. transmitter receiver grounds same potential, then output voltages transmitter will symmetrical above below zero there will common-mode voltage assuming that current sources resistors matched). However, transmitter outputs have common-mode range which allows ground difference between transmitter receiver this case, common-mode current will flow resistors. More information terminating resistors given Applications Information section.
RECEIVER INPUTS
Shutdown
Table III. Receiver Truth Table Inputs Configuration Disabled Shutdown 0.2V -0.2V 0.2V -0.2V Outputs
receiver inputs have resistance ground require additional, external terminating resistors. Receivers feature hysteresis 50mV improve noise immunity. REV.
high impedance
ADM1345
CHARGE PUMP
Preliminary Technical Information
125W TWISTED PAIR CABLE 125W
negative supply voltage required achieve negative portion transmitter output common-mode range. This achieved charge-pump voltage-doubler/inverter.
ADM1345
120W
300W
300W 120W
6.3V
300W
300W
Figure Termination Networks
Figure Connection Charge Pump Capacitors
charge pump requires capacitors, supply should also decoupled with capacitor close More details about charge pump capacitors supply decoupling given Applications Information.
PROTECTION
receiver inputs transmitter outputs ADM1345 have built-in protection against repeated electrostatic discharge (ESD) transients 10kV. protection depends clamping transient on-chip diodes, impedance seen these pins must low, which means that capacitors with equivalent series resistance (ESR) must used these pins. testing carried using Human Body Model.
APPLICATIONS INFORMATION CHARGE PUMP CAPACITORS SUPPLY DECOUPLING
This requirement using either network equivalent network, shown figure Standard surface mount through-hole resistors used resistor tolerance should better maintain proper differential output swing. Alternatively, complete package containing terminating networks 14-pin SO-IC obtained from: Technologies (Formerly Beckman Industrial) Resistor Networks, 4200 Bonita Place Fullerton, 92635 Phone: (714) 447-2357 Fax: (714) 2500 Part Technologies 627T500/1250 (SOIC) Technologies 899TR50/125 (DIP)
DCE/DTE PORT APPLICATION
proper operation charge pump, capacitors should have equivalent series resistance (ESR) less than charge pump draws current pulses from VCC, decoupling capacitor should also have ESR. decoupling capacitor reservoir capacitor should also have because they determine effectively pulses clamped onchip clamp diodes. Tantalum monolithic ceramic capacitors suitable these components. using tantalum capacitors, forget observe polarity.
CABLE TERMINATION
ADM1435 ideally suited implementation Data Terminal Equipment (DTE) Data Circuit Terminating Equipment (DCE) port. Figure (facing page) shows complete V.35 DTE/DCE interface using only ICs, terminating resistor network, capacitors each side interface. ADM1345 used transmit receive high-speed data clock signals, while ADM208Es used lower speed control signals.
Both transmitter receiver cable connected between ADM1345s must properly identically terminated. Termination requires differential resistance between transmitter outputs receiver inputs) common-mode resistance ground allow common-mode current flow transmitter receiver grounds different potentials. REV.
Preliminary Technical Information
6.3V (115)
ADM1345
ADM1345
125W
ADM1345
6.3V
(103)
SCTE (113)
(114)
(104) (102) CABLE SHIELD (108) (105) (107) (106) (109) (142)
0.1mF 6.3V 0.1mF 0.1mF 6.3V
(140) 0.1mF 6.3V 0.1mF 0.1mF 6.3V SIGNALS WITHIN DOTTED LINE OPTIONAL (141)
0.1mF
2593 34-PIN DTE/DCE INTERFACE CONNECTORS
0.1mF
0.1mF
0.1mF
ADM208E
ADM208E
Figure Complete DTE/DTE Interface Operating from Single Supply
REV.
ADM1345
RS422/RS485 APPLICATIONS
Preliminary Technical Information
receivers ADM1345 ideally suited RS422 RS485 applications. Using circuit figure receiver reconstruct data stream data rates 10Mbaud while meeting RS422 RS485 common-mode voltage requirements +12V.
ADM485
100W
100W
ADM1345
GND1
+12V COMMON MODE VOLTAGE
GND2
Figure RS422/RS485 Application
OUTLINE DIMENSIONS
28-Lead Plastic (N-28)
1.565 (39.70) 1.380 (35.10)
Dimenions shown inches (mm)
0.580 (14.73) 0.485 (12.32)
0.250 (6.35)
0.060 (1.52) 0.015 (0.38) 0.150 (3.81)
0.625 (15.87) 0.600 (15.24)
0.195 (4.95) 0.125 (3.18)
0.200 (5.05) 0.125 (3.18)
0.022 (0.558) 0.014 (0.356)
0.100 (2.54)
0.070 (1.77)
SEATING PLANE
0.015 (0.381) 0.008 (0.204)
28-Lead Plastic (N-28)
0.7125 (18.10) 0.6969 (17.70)
0.1043 (2.65) 0.0926 (2.35)
0.4193 (10.65) 0.3937 (10.00)
0.2992 (7.60) 0.2914 (7.40)
0.0291 (0.74) 0.0098 (0.25)
0.0118 (0.30) 0.0040 (0.10)
0.0500 (1.27)
0.0192 (0.49) SEATING 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
28-Lead SOIC (R-28)
-10-
REV.

FEATURES Provides V.35 Differential Clock Data Signals Chip Single Sup

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