Product data Supersedes data 2003 Product data 2-bit bi-dire
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GTL2002 2-bit bi-directional voltage translator
Product data Supersedes data 2003
Product data
2-bit bi-directional voltage translator
GTL2002
FEATURES
DESCRIPTION
Gunning Transceiver Logic Transceiver Voltage Clamps (GTL-TVC) provide high-speed voltage translation with ON-state resistance minimal propagation delay. GTL2002 provides NMOS pass transistors with common gate (GREF) reference transistor (SREF DREF). device allows bi-directional voltage translations between without direction pin. When port clamp ON-state resistance connection exists between ports. Assuming higher voltage port, when port high, voltage port limited voltage reference transistor (SREF). When port high, port pulled pull resistors. This functionality allows seamless translation between higher lower voltages selected user, without need directional control. transistors have same electrical characteristics there minimal deviation from output another voltage propagation delay. This benefit over discrete transistor voltage translation solutions, since fabrication transistors symmetrical. Because transistors device identical, SREF DREF located other matched Sn/Dn transistors, allowing easier board layout. translator's transistors provides excellent protection lower voltage devices same time protect less resistant devices.
2-bit bi-directional voltage translator Allows voltage level translation between
busses which allows direct interface with GTL, GTL+, LVTTL/TTL CMOS levels
Provides bi-directional voltage translation with direction RDSON resistance between input output pins
(Sn/Dn)
Supports insertion power supply required Will latch tolerant inputs stand-by current Flow-through pinout ease printed circuit board trace routing protection exceeds 2000 JESD22-A114,
JESD22-A115, 1000 JESD22-C101
Package offer: SO8, TSSOP8
APPLICATIONS
application that requires bi-directional unidirectional
voltage level translation from voltage between voltage between
open drain construction with direction ideal
bi-directional voltage (e.g., processor port translation normal signal levels GTL/GTL+ translation LVTTL/TTL signal levels.
ORDERING INFORMATION
PACKAGES 8-Pin Plastic TEMPERATURE RANGE ORDER CODE GTL2002D TOPSIDE MARK GTL2002 NUMBER SOT96-1 SOT505-1
8-Pin Plastic TSSOP GTL2002DP 2002 Standard packing quantities other packaging data available www.philipslogic.com/packaging.
2003
Product data
2-bit bi-directional voltage translator
GTL2002
CONFIGURATION
FUNCTION TABLE
HIGH translation assuming higher voltage level GREF DREF SREF In-Sn Out-Dn Transistor nearly
SREF
GREF DREF
SA00640
High voltage level voltage level Don't Care
DESCRIPTION
NUMBER SYMBOL SREF DREF GREF NAME FUNCTION Ground Source reference transistor Port Port Port Port Drain reference transistor Gate reference transistor
NOTES: pulled through external resistor. follows input low. GREF should least higher than SREF best translator operation. equal SREF voltage.
CLAMP SCHEMATIC
DREF GREF
FUNCTION TABLE
HIGH translation assuming higher voltage level GREF DREF SREF In-Dn Out-Sn VTT1 Transistor
SREF SA00645
High voltage level voltage level Don't Care NOTES: pulled pulled down. follows input low. GREF should least higher than SREF best translator operation. equal SREF voltage.
2003
Product data
2-bit bi-directional voltage translator
GTL2002
APPLICATIONS Bi-directional translation
bi-directional clamping configuration, higher voltage lower voltage lower voltage higher voltage, GREF input must connected DREF both pins pulled high side through pull-up resistor (typically filter capacitor DREF recommended. processor output totem pole open drain (pull resistors required) chipset output totem pole open drain (pull resistors required pull outputs VCC). However, either output totem pole, data must uni-directional outputs must 3-statable outputs must controlled some direction control mechanism prevent high contentions either direction. both outputs open drain, direction control needed. opposite side reference transistor (SREF) connected processor core power supply voltage. When DREF connected through resistor supply SREF between1.0 output each maximum output voltage equal SREF output each maximum output voltage equal VCC.
TYPICAL BI-DIRECTIONAL VOLTAGE TRANSLATION
VCORE SREF GREF DREF
GTL2002
TOTEM POLE OPEN DRAIN
CHIPSET
INCREASE SIZE USING GTL2010 GTL2000
SA00642
CHIPSET
Figure Bi-directional translation multiple higher voltage levels such application
2003
Product data
2-bit bi-directional voltage translator
GTL2002
Uni-directional down translation
uni-directional clamping, higher voltage lower voltage, GREF input must connected DREFand both pins pulled higher side through pull-up resistor (typically filter capacitor DREF recommended. Pull resistors required chipset open drain. opposite side reference transistor (SREF) connected processor core supply voltage. When DREF connected through resistor supply SREF between output each maximum output voltage equal SREF. TYPICAL UNI-DIRECTIONAL HIGH VOLTAGE TRANSLATION
EASY MIGRATION LOWER VOLTAGE PROCESSOR GEOMETRY SHRINKS. VCORE SREF GREF DREF
GTL2002
CHIPSET TOTEM POLE
SA00643
Figure Uni-directional down translation, protect voltage processor pins
Uni-directional translation
uni-directional translation, lower voltage higher voltage, reference transistor connected same down translation. pull-up resistor required higher voltage side full high level, since GTL-TVC device will only pass reference source (SREF) voltage high when doing translation. driver lower voltage side only needs pull-up resistors open drain. TYPICAL UNI-DIRECTIONAL HIGH VOLTAGE TRANSLATION
EASY MIGRATION LOWER VOLTAGE PROCESSOR GEOMETRY SHRINKS. VCORE SREF GREF DREF
GTL2002
TOTEM POLE OPEN DRAIN
CHIPSET
SA00644
Figure Uni-directional translation, higher voltage chip sets
2003
Product data
2-bit bi-directional voltage translator
GTL2002
Sizing pull-up resistor
pull-up resistor value needs limit current through pass transistor when "on" state about This will guarantee pass voltage current through pass transistor higher than pass voltage will also higher "on" state. current through each pass transistor pull-up resistor value calculated follows: Resistor value Pull-u voltage (V)*0.35 0.015
table below summarizes resistor values various reference voltages currents also resistor value shown +10% column larger value should used ensure that pass voltage transistor would less. external driver must able sink total current from resistors both sides GTL-TVC device 0.175 although only applies current flowing through GTL-TVC device. Application Note AN10145-01 Bi-Directional Voltage Translators more information.
PULL RESISTOR VALUES
PULL RESISTOR VALUE (OHMS) VOLTAGE NOMINAL NOMINAL NOMINAL 1550 1705 1082
NOTES: Calculated 0.35 Assumes output driver 0.175 stated current +10% compensate range resistor tolerance.
ABSOLUTE MAXIMUM RATINGS1,
SYMBOL VSREF VDREF VGREF IREFK IMAX Tstg PARAMETER source reference voltage drain reference voltage gate reference voltage voltage Port voltage Port diode current reference pins diode current Port diode current Port clamp current channel Storage temperature range Channel ON-state CONDITIONS RATING -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 ±128 +150 UNIT
NOTES: Stresses beyond those listed cause permanent damage device. These stress ratings only functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. performance capability high-performance integrated circuit conjunction with thermal environment create junction temperatures which detrimental reliability. maximum junction temperature this integrated circuit should exceed input output negative voltage ratings exceeded input output clamp current ratings observed.
2003
Product data
2-bit bi-directional voltage translator
GTL2002
RECOMMENDED OPERATING CONDITIONS
SYMBOL VI/O VSREF VDREF VGREF IPASS Tamb PARAMETER Input/output voltage (Sn, source reference voltage1 drain reference voltage gate reference voltage Pass transistor current Operating ambient temperature range free CONDITIONS LIMITS UNIT
NOTE: VSREF VDREF best results level shifting applications.
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING FREE-AIR TEMPERATURE RANGE (unless otherwise noted)
SYMBOL CI(GREF) CIO(OFF) CIO(ON) PARAMETER level output voltage Input clamp voltage Gate input leakage Gate capacitance capacitance capacitance TEST CONDITIONS VSREF 1.365 0.175 Iclamp 15.2 VGREF VGREF VGREF VGREF ron2 On-resistance VGREF VGREF VGREF VGREF VGREF VGREF VGREF VGREF LIMITS TYP1 19.4 18.6 -1.2 UNIT
NOTES: typical values measured Tamb Measured voltage drop between terminals indicated current through switch. On-state resistance determined lowest voltage terminals.
2003
Product data
2-bit bi-directional voltage translator
GTL2002
CHARACTERISTICS TRANSLATOR TYPE APPLICATIONS
VREF 1.365 1.635 VDD1 VDD2 2.36 2.64 Refer Test Circuit diagram. LIMITS SYMBOL PARAMETER Propagation delay WAVEFORM Tamb +85°C tPLH2 TYP1 UNIT
NOTES: typical values measured VDD1 VDD2 VREF Tamb 25°C. Propagation delay guaranteed characterization. CON(max) COFF(max) guaranteed design.
WAVEFORMS
TEST CIRCUIT
INPUT
VDD1 tPHL
200K
VDD2
VDD2
VDD2
VDD2 TEST OUTPUT HIGH-to-LOW LOW-to-HIGH
tPLH
tPHL tPHL
tPLH tPLH
DREF
GREF
VDD2 OUTPUT HIGH-to-LOW LOW-to-HIGH
SREF
SA00524
Waveform Input (Sn) Output (Dn) Propagation Delays
VREF
TEST
PULSE GENERATOR
SA00646
Waveform Load circuit
2003
Product data
2-bit bi-directional voltage translator
GTL2002
CHARACTERISTICS TYPE APPLICATION
SYMBOL PARAMETER DESCRIPTION Propagation delay1 LIMITS +85°C GREF Mean UNITS
NOTES: This parameter warranted production tested. propagation delay based time constant typical on-state resistance switch load capacitance when driven ideal voltage source (zero output impedance).
WAVEFORMS
INPUT tPLH tPHL OUTPUT SA00639
TEST CIRCUIT WAVEFORMS
From Output Under Test Open
Load Circuit
TEST tPLZ/tPZL tPHZ/tPZH
open open
Waveform Input (Sn) Output (Dn) Propagation Delays
DEFINITIONS Load capacitance includes probe capacitance; CHARACTERISTICS value.
SA00012
Waveform Load circuit
2003
Product data
2-bit bi-directional voltage translator
GTL2002
SO8: plastic small outline package; leads; body width
SOT96-1
2003
Product data
2-bit bi-directional voltage translator
GTL2002
TSSOP8: plastic thin shrink small outline package; leads; body width
SOT505-1
2003
Product data
2-bit bi-directional voltage translator
GTL2002
REVISION HISTORY Date 20030401
Description Product data (9397 11349); 853-2214 29603 Dated February 2003. Supersedes data dated 2000 (9397 07417). Modifications: Added modified specifications data sheet updated. Product data (9397 07417); 853-2214 24367 dated 2000
20000816
2003
Product data
2-bit bi-directional voltage translator
GTL2002
Data sheet status
Level
Data sheet status[1]
Objective data
Product status[2]
Development
Definitions
This data sheet contains data from objective specification product development. Philips Semiconductors reserves right change specification manner without notice. This data sheet contains data from preliminary specification. Supplementary data will published later date. Philips Semiconductors reserves right change specification without notice, order improve design supply best possible product. This data sheet contains data from product specification. Philips Semiconductors reserves right make changes time order improve design, manufacturing supply. Relevant changes will communicated Customer Product/Process Change Notification (CPCN).
Preliminary data
Qualification
Product data
Production
Please consult most recently issued data sheet before initiating completing design. product status device(s) described this data sheet have changed since this data sheet published. latest information available Internet data sheets describing multiple type numbers, highest-level product status determines data sheet status.
Definitions
Short-form specification data short-form specification extracted from full data sheet with same type number title. detailed information relevant data sheet data handbook. Limiting values definition Limiting values given accordance with Absolute Maximum Rating System (IEC 60134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Applications that described herein these products illustrative purposes only. Philips Semiconductors make representation warranty that such applications will suitable specified without further testing modification.
Disclaimers
Life support These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips Semiconductors customers using selling these products such applications their risk agree fully indemnify Philips Semiconductors damages resulting from such application. Right make changes Philips Semiconductors reserves right make changes products-including circuits, standard cells, and/or software-described contained herein order improve design and/or performance. When product full production (status `Production'), relevant changes will communicated Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes responsibility liability these products, conveys license title under patent, copyright, mask work right these products, makes representations warranties that these products free from patent, copyright, mask work right infringement, unless otherwise specified.
Contact information
additional information please visit Fax: 24825
Koninklijke Philips Electronics N.V. 2003 rights reserved. Printed U.S.A. Date release: 04-03
sales offices addresses send e-mail
Document order number:
9397 11349
2003
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