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Utilizes digital inputs outputs transmit receive cable data Supports 1
Top Searches for this datasheetSP5301 Universal Serial Transceiver Utilizes digital inputs outputs transmit receive cable data Supports 12Mbps "Full Speed" 1.5Mbps "Low Speed" serial data transmission Compatible with VHDL "Serial Interface Engine" from developer's conference Hysteresis Function Ease peripheral expansion Protocol flexibility mixed-mode isochronous data transfers asynchronous messaging Available 0.15" SOIC package Rail Rail receiver common mode input range, 20mV typical receiver sensitivity Power; SUSPEND mode Enhanced version PDIUSBP11 DESCRIPTION SP5301 half-duplex Universal Serial (USB) differential transceiver that interfaces with Serial Interface Engine (SIE). SP5301 designed allow 3.3V 5.0V standard programmable logic interface with physical layer Universal Bus. protocol support multiple connections physical devices composed many diverse functions. capable transmitting receiving serial data both full speed (12Mbps) speed (1.5Mbps) data rates. Implementation Serial Interface Engine along with transceiver allow designer make flexible compatible devices with widely available logic components. SP5301 specifically geared towards low-cost solutions peripheral market. RERR DSPEED RSEO SPEED Receiver Logic SUSPND SUSPND RERR RSE0 SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation ABSOLUTE MAXIMUM RATINGS These stress ratings only functional operation device these ratings other above those indicated operation sections specifications below implied. Exposure absolute maximum rating conditions extended periods time affect reliability cause permanent damage device. VCC.-0.5V +6.5V IGND, current).+100mA Input Current Voltages: input diode current 0).-50mA input voltage, Note 1).-0.5 +6.5V VI/O input voltage range, I/O).-0.5V toVC 0.5V Output Currents Voltages: output diode current where 0).+50mA output voltage), Note 1.-0.5V (VCC 0.5V) output source sink current VP/VM/RCV/RERR/RSEO pins,VO VCC).+15mA output source sink current D+/D- pins, VCC.+50mA Storage Temperature.-65°C +150°C Ptot (Power dissipation package).1000mW NOTE input output voltage ratings exceeded input output clamp current ratings observed. SUSPND Active RERR Active Active RSEO Active Active VP/VM Active Active D+/DActive Active HI-Z HI-Z Comments Driving Driving Receiving Power State Function Table SPEED Receiver Logic SUSPND Figure Block Diagram SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation RERR RSE0 SPECIFICATIONS Unless otherwise noted, following specifications apply +3.0V +3.6V with Tamb +70°C. Typical values apply +3.3V Tamb 25°C. MIN. TYP. MAX. UNITS PARAMETERS HIGH level input, level input, HIGH level Driver output impedance level Driver output impedance D+/D- High Output Levels Logic HIGH level output Logic level output Receiver Differential Input Threshold Receiver Common Mode Range Quiescent supply current, ICCQ Supply current SUSPND ICCS Active supply current (Full Speed) ICCFS Active supply current (Low Speed) ICCLS Input leakage current, Tri-State output OFF-state current Transceiver Capacitance (D+/D-) VIL, GND, Note ±0.1 3.6V, 5.5V GND, pins 3.6V, 350pF, input 3.6V, 50pF, input 0.02 3.6V, GND, 3.6V, GND, Common Mode Voltage 3.0V, 6mA, Note 3.0V, 4mA, Note 3.0V, 200µA, Note 3.0V, 6mA, Note 3.0V, 4mA, Note 3.0V, 200µA, Note Note Note Ground 1.5K 3.6V Note Note Note Note CONDITIONS NOTE signals except NOTE "Load diagram testing details. NOTE This value includes external resistor. SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation SPECIFICATIONS (continued) Unless otherwise noted, following specifications apply 3.3V, 3.0ns, with Tamb +70°C. Typical values apply Tamb 25°C. MIN. PARAMETERS VPO/VMO D+/D- Delay, Full Speed tPLH tPHL D+/D- Rise Fall Times, Full Speed trise tfall VPO/VMO D+/D- Delay, Speed tPLH tPHL D+/D- Rise Fall Times, Speed trise tfall D+/D- Delay tPLH tPHL D+/D- VP/VM Delay tPLH tPHL D+/D- RERR Delay tPLH tPHL D+/D- RSEO Delay tPLH tPHL D+/DtPHZ tPZH tPLZ tPZL Setup SPEED, D+/D- Crossover point, TYP. MAX. UNITS CONDITIONS figure figure figure figure figure figure figure figure figure figure figure figure figure Note figure Note figure Note figure Note figure figure figure figure figure NOTE Delay defined from Midpoint input Midpoint output, with other input static (High Low). SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation DESCRIPTION SP5301 half-duplex Universal Serial (USB) differential transceiver that interfaces with VHDL Serial Interface Engine (SIE) from developer's conference. SP5301 designed allow digital logic communicate with physical layer Universal Bus. cable that supports data exchange between host computer wide range peripherals. Attached peripherals share bandwidth through host scheduled token based protocol. allows peripherals attached, configured, used, detached while host other peripherals operation. This referred dynamic, hot, attachment removal. attributes include lower costs, plug-and-play with dynamic attach-detach capabilities, ease design use, multiple peripherals, guaranteed latency, guaranteed bandwidth. specified industry standard extension architecture with focus Computer Telephony Integration (CTI), consumer, productivity applications. architecture protocol ease expansion peripherals, provide low-cost solution that supports tranfer rates 12Mbps, fully support real-time data voice, audio, compressed video. protocol provide protocol flexibility mixed-mode isochronous data transfers asynchrounous messaging. Guaranteed bandwidth latencies appropriate many telephony audio applications. 12Mbps covers mid-speed low-speed data ranges. Typically, mid-speed data types isochronous low-speed data comes from interactive devices. Isochronous communication only used full speed devices. THEORY OPERATION protocol support multiple connections physical devices composed many diverse functions. This makes SP5301 ideal solution multidrop applications. This lower protocol overhead results high utilization. isochronous workload utilize entire bandwidth. protocol reflects robust capability dynamic insertion removal devices identified user perceived real-time. This plug play quality preserves marketable synergy with industry, being simple protocol implement integrate into existing operating systems. SP5301 contains differential driver differential receiver half-duplex configuration. driver enabled pin. asserted LOW, driver active pins drive signals. differential receiver also controlled pin. HIGH, while SUSPEND LOW, receiver active driver tri-state. this receive mode, pins receiving signals. typical driver output voltage swing SP5301 will less than +0.3V state greater than +2.8V HIGH state. SP5301 differential interface with very high receiver input sensitivity. This makes data virtually immune noise pipeline. +90mV minimum receiver input sensitivity SP5301 ensures recovery even severely attenuated signals. SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation SP5301 incorporates receive error circuit. This error circuit outputs CMOS signals receive error (RERR) receive single ended zero (RSE0) under specific conditions from bus. When asserted LOW, enables driver transmit data output pins. receive error circuit disabled this condition both RERR RSE0 forced low. receive error circuit activated receive mode when HIGH. receive error circuit will signal error state when both HIGH forcing RERR HIGH. receiver error circuit will signal single ended zero when both forcing RSE0 HIGH. single ended zero valid state used signal packet (EOP) signal transmission. (CAUTION: Since both RERR RSE0 CMOS outputs, care must taken ensure that RERR RSE0 connected GND.) SP5301 suspend input (SUSPND) which enables power state while inactive. When SUSPND asserted HIGH SP5301 transmit mode LOW), receive data (RCV) will forced LOW. SP5301 transmit receive serial data both full speed, 12Mbps, speed, 1.5Mbps, data rates. full speed, active supply current SP5301 6mA. suspend state, supply current typically 20nA. Full speed applications include ISDN, PBX, POTS, sampled analog devices, audio, printers, telephony designs. speed applications include locator devices, keyboards, mouse, tablets, light pens, stylus, game peripherals, virtual reality peripherals, monitor configurations. protocol provides full support real-time data voice, audio, compressed video. SP5301 specifically geared towards low-cost solutions peripheral markets Waveforms below show device behavior transmit mode, both full speed, with D+/D- pins driving load specified figure 500mV 500mV 250nS 1.68 500mV 500mV 20.0nS 1.68 Waveform D+/D- Transmit Mode, speed Waveform D+/D- Transmit Mode, full speed SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation PINOUT RERR DSPEED RSEO SUSPND Suspend. This input provides power state SP5301 while inactive. While SUSPND asserted HIGH, will drive LOW. Ground. RSEO Receive Single Ended Zero. This CMOS level output forced HIGH when both signal packet (EOP) signal transmission. CAUTION: Since RSEO CMOS output, care must taken ensure that RSEO connected GND. SPEED Speed. Edge rate control. This input determines edge rates, where logic HIGH designates edge rates "full speed" logic designates edge rates "low speed." Data-, Data+. These differential data pins conform Universal Serial standard. VPO, These RESULT Logic Logic High Undefined SUSPND ASSIGNMENTS RERR Receive Error. This CMOS level output forced HIGH when both HIGH signal error state. CAUTION: Since RERR CMOS output, care must taken ensure that RERR connected GND. Output Enable Not. When asserted LOW, this input enables driver transmit data bus. When HIGH, receiver active driver outputs tri-state. Receive data. This CMOS level output from typically connected inputs Serial Interface Engine (SIE). Gated version Used detect single ended zero (SEO), error conditions, interconnect speed. These pins have CMOS level outputs. SP5301DS/10 logic inputs differential driver, typically connected outputs Serial Interface Engine (SIE). +3.0V +3.6V power supply. RESULT Speed Full Speed Error SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation WAVEFORMS 2.7V INPUT tPLH OUTPUT tPHL tRISE tFALL Figure D+/D- VP/VM VPO/VMO D+/D- Figure Rise Fall Times DVOH tPLH 2.0V 2.7V 1.5V tPZH tPZL D+/DVOL tPHZ tPLZ 1.5V 1.0V tPHL Figure D+/D Figure D+/D- NOTE: 0.3V, 0.3V, +3.0V, typical output voltage drops that occur with output load. SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation WAVEFORMS (continued) 2.7V SPEED 2.7V D+/DGND Test Point D.U.T. 25pF Figure Setup Speed Figure Load RERR, RSEO Test Point D.U.T. 50pF TEST D-/LS D+/LS D-/FS D+/FS Close Open Open Close Test Point 1.5K D.U.T. tPZH tPHZ tPZL tPLZ 50pF, Full Speed 350pF, Speed Figure Load D+/D- Figure Load Enable Disable Times NOTE: 0.3V, 0.3V, +3.0V, typical output voltage drops that occur with output load. SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation WAVEFORMS (continued) Delay (ns) 0.5V 1.0V 1.5V 2.0V 2.5V 3.0V Common Mode (Volts) tR/tF (nS) 50mV 100mV 200mV 500mV Load (pF) tR/tF Figure Receiver Delay Common Mode Voltage (with peak peak overdrive voltage parameter) Figure Transmitter Rise Fall Time Capacitive Load (full speed) 2.0V DtPLH 2.0V 1.0V tPLH 1.0V RSEO RERR Figure D+/D- RERR Delay Figure D+/D- RSEO Delay NOTE: 0.3V, 0.3V, +3.0V, typical output voltage drops that occur with output load. SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (NARROW) DIMENSIONS (Inches) Minimum/Maximum (mm) 8-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249 0.014/0.019 (0.35/0.49) 0.189/0.197 (4.80/5.00) 0.150/0.157 (3.802/3.988) 0.050 (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0°/8° (0°/8°) 14-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249) 0.013/0.020 (0.330/0.508) 16-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249) 0.013/0.020 (0.330/0.508) 0.337/0.344 0.386/0.394 (8.552/8.748) (9.802/10.000) 0.150/0.157 (3.802/3.988) 0.050 (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0°/8° (0°/8°) 0.150/0.157 (3.802/3.988) 0.050 (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0°/8° (0°/8°) SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation PACKAGE: PLASTIC THIN SMALL OUTLINE (TSSOP) DIMENSIONS inches (mm) Minimum/Maximum 14-PIN /0.43 /1.10) 0.002/0.006 (0.05/0.15) 0.007/0.012 (0.19/0.30) 0.193/0.201 (4.90/5.10) 0.169/0.177 (4.30/4.50) 0.026 (0.65 BSC) 0.126 (3.20 BSC) 0.020/0.030 (0.50/0.75) 0°/8° SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation ORDERING INFORMATION Model Temperature Range Package Types SP5301CN.0°C +70°C.14-Pin NSOIC SP5301CY.0°C +70°C.14-Pin TSSOP Please consult factory pricing availability Tape-On-Reel option. Corporation SIGNAL PROCESSING EXCELLENCE Sipex Corporation Headquarters Sales Office Linnell Circle Billerica, 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sales Office South Hillview Drive Milpitas, 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sipex Corporation reserves right make changes products described herein. Sipex does assume liability arising application product circuit described herein; neither does convey license under patent rights rights others. SP5301DS/10 SP5301 Universal Serial Transceiver Copyright 2000 Sipex Corporation Other recent searchesUS5L10 - US5L10 US5L10 Datasheet SD4012 - SD4012 SD4012 Datasheet PD-21033 - PD-21033 PD-21033 Datasheet HFBR-5963LZ - HFBR-5963LZ HFBR-5963LZ Datasheet E2500-Type - E2500-Type E2500-Type Datasheet CMPT2907AE - CMPT2907AE CMPT2907AE Datasheet CLC5958 - CLC5958 CLC5958 Datasheet BUK962R8-30B - BUK962R8-30B BUK962R8-30B Datasheet 2SC6034 - 2SC6034 2SC6034 Datasheet
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