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PCF8558 Universal driver small graphic panels Objective specifica


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PCF8558 Universal driver small graphic panels
Objective specification Supersedes data 1997 File under Integrated Circuits, IC12 1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
FEATURES Single-chip controller/driver column outputs Display data bits bytes 4040 bits On-chip: Generation intermediate bias voltages Oscillator requires external components (external clock also possible) fast I2C-bus interface CMOS compatible rate Logic supply voltage range Display supply voltage range VLCD power consumption, suitable battery operated systems. APPLICATIONS Telecom equipment Portable instruments Point sale terminals Alarm systems. ORDERING INFORMATION TYPE NUMBER PCF8558U/10 PCF8558U/12 Note further details Chapter "Bonding locations". PACKAGE(1) NAME chip chip with bumps DESCRIPTION GENERAL DESCRIPTION
PCF8558
PCF8558 power CMOS controller driver, designed drive graphic display rows columns. necessary functions display provided single chip, including on-chip generation bias voltages, resulting minimum external components lower power consumption. PCF8558 interfaces most microcontrollers I2C-bus interface.
VERSION
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
BLOCK DIAGRAM
PCF8558
handbook, full pagewidth
C101
COLUMN DRIVERS BIAS VOLTAGE GENERATOR DATA LATCHES VLCD
DRIVERS
SHIFT REGISTER
CURSOR DATA CONTROL
OSCILLATOR
ADDRESS COUNTER DATA REGISTER POWER-ON RESET DISPLAY DATA BYTES TIMING GENERATOR
DISPLAY ADDRESS COUNTER
PCF8558
BUFFER
MGG558
Fig.1 Block diagram.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PINNING SYMBOL C101 VLCD I2C-bus serial clock input driver data outputs column driver data outputs driver data outputs test output, must left unconnected (not user accessible) I2C-bus serial data input/output ground test input, must connected (not user accessible) negative supply voltage input DESCRIPTION
PCF8558
I2C-bus slave address input connecting this either (VSS) (VDD) test input, must connected (not user accessible) when on-chip oscillator used this must connected VDD; external clock signal, used, input this positive supply voltage
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
FUNCTIONAL DESCRIPTION bias voltage generator intermediate bias voltages display generated buffered on-chip. This removes need external resistor bias chain significantly reduces system power consumption. Oscillator on-chip oscillator provides clock signal display system. external components required must connected VDD. External clock external clock used input pin. resulting display frame frequency given frame 3072 Only power-down state clock allowed stopped (OSC connected VSS), otherwise will frozen state where voltage applied Power-on reset on-chip power-on reset block initializes chip after power-on power failure. This synchronous reset requires oscillator cycles execute. These oscillator cycles must provided from external clock source internal oscillator used. this done, device respond command sequences transmitted I2C-bus interface. Power-down chip into power-down mode where static currents switched internal oscillator, internal power-on reset, bias level generation outputs internally connected VDD) when logic During power-down information RAMs internal chip states preserved. Instruction execution during power-down possible externally clock signal applied OSC. Registers PCF8558 8-bit register, time shared Command Register (CR) Data Register (DR). command register stores command code such display display address information Display control
PCF8558
Display Data (DDRAM). Both registers written read from system controller. Address Counter (AC) address counter assigns addresses DDRAM writing command address. After write operation address counter automatically incremented accordance with flag. Display Data (DDRAM) PCF8558 contains 101-bit static which stores display data. divided into banks bytes bits). During access, data transferred I2C-bus. There direct correspondence between address column output number. Timing generator timing generator produces various signals required drive internal circuitry. Internal chip operation disturbed operations data buses.
display generated continuously shifting rows data matrix column outputs. display status (all dots on/off normal/inverse video) bits command word. column drivers PCF8558 contains column drivers, which connect appropriate bias voltages sequence display accordance with data displayed. Figure illustrates typical waveforms. Unused outputs should left unconnected. bias voltage levels, chosen give optimum display contrast multiplex rate Table Voltage bias levels VOLTAGE 0.8635 (VDD VLCD) 0.7270 (VDD VLCD) 0.2730 (VDD VLCD) 0.1365 (VDD VLCD)
LEVEL
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PCF8558
bank
bank
bank
bank
bank
MGG559
Fig.2 DDRAM display mapping.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PCF8558
frame VLCD VLCD VLCD VLCD
frame
Vstate 1(t) Vstate 2(t)
0.7269VOP Vstate 1(t) 0.2731VOP 0.2731VOP 0.7269VOP 0.7269VOP Vstate 2(t) 0.2731VOP 0.2731VOP 0.7269VOP
MGG560
Vstate1(t) C2(t) R1(t); Vstate2(t) C2(t) R2(t).
Fig.3 Typical driver waveforms (MUX rate 40).
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
ADDRESSING data downloaded into matrix PCF8558 indicated Figs
PCF8558
display matrix bits bytes). columns addressed address pointer. After writing byte pointer next byte. Control address increment, horizontal vertical, command byte.
handbook, full pagewidth display line display line display line display line display line address address address address address address address
MGG561
Fig.4 format, addressing.
DATA STRUCTURE
handbook, full pagewidth
MGG562
Order writing data bytes into
Order writing data bytes into
Fig.5 Order writing data bytes into RAM.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
I2C-BUS PROTOCOL 7-bit slave addresses (0111100 0111101) reserved both PCF8558. least-significant slave address connecting input either (VSS) (VDD). Therefore, PCF8558 used same I2C-bus allowing displays dots driven. I2C-bus protocol shown Fig.6. communications initiated with START condition from I2C-bus master, which followed desired slave address write bit. devices with this slave address acknowledge parallel. other devices ignore transfer. write mode (indicated setting read/write LOW) more commands follow slave address acknowledgement. commands also acknowledged addressed devices bus. last command must clear continuation After last command series data bytes follow. acknowledgement after each byte made only addressed device. After last data byte been acknowledged, I2C-bus master issues STOP condition (P). PCF8558, read mode provided. Display bytes written into address specified data pointer subaddress counter. Both data pointer subaddress counter
PCF8558
automatically incremented, enabling stream data transferred DDRAM. instruction format composed I2C-bus slave address followed command byte, address pointer, followed number data bytes. Command execution/storing data takes place during acknowledge cycle. Definitions Transmitter: device which sends data Receiver: device which receives data from Master: device which initiates transfer, generates clock signals terminates transfer Slave: device addressed master Multi-master: more than master attempt control same time. I2C-bus accommodate this without data los/contention. Arbitration: procedure ensure that, more than master simultaneously tries control bus, only allowed message corrupted Synchronization: procedure synchronize clock signals more devices.
handbook, full pagewidth
slave address
COMMAND
ADDRESS
DISPLAY DATA
bytes
MGG563
Fig.6 I2C-bus protocol.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
COMMANDS Display Control Table LOGIC normal horizontal addressing Display status BITS DISPLAY STATUS Blank Normal segments Inverse video POWER-DOWN outputs (display off) Bias generator Power-on reset oscillator (external clock still possible) VLCD disconnected I2C-bus, RAM, commands, etc. still function power-down mode. Address Table Table define address vector address display LINE LOGIC power-down vertical addressing Reset function address
PCF8558
address points columns. range (64H).
After power-on chip following state: Power-down mode undefined address undefined Display control bits (except undefined I2C-bus interface reset. Note chip used with external clock source, after power-on, chip requires least clock pulses ensure that internal synchronous reset carried out. After internal reset, chip goes into power-down mode clock pulses supplied, reset cleared, chip cannot respond commands bus. applications where internal oscillator used (pin VDD), oscillator starts after power-on. soon synchronous reset cleared, chip goes into power-down mode, oscillator stopped.
Instructions: control byte, address address DESCRIPTION address vector, display control column address
INSTRUCTION Display control address
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
CHARACTERISTICS I2C-BUS I2C-bus bidirectional, two-line communication between different modules. lines serial data line (SDA) serial clock line (SCL) which must connected positive supply pull-up resistor. Data transfer initiated only when busy. transfer data transferred during each clock pulse. data line must remain stable during HIGH period clock pulse changes data line this moment will interpreted control signals. START STOP conditions Both data clock lines remain HIGH when busy. HIGH-to-LOW transition data line, while clock HIGH, defined START condition (S). LOW-to-HIGH transition data line while clock HIGH, defined STOP condition (P). System configuration device transmitting message 'transmitter', device receiving message 'receiver'. device that controls message flow 'master' devices which controlled master 'slaves'. Acknowledge
PCF8558
number data bytes transferred between START STOP conditions from transmitter receiver unlimited. Each data byte eight bits followed acknowledge bit. acknowledge HIGH level transmitter, whereas master generates extra acknowledge related clock pulse. slave receiver which addressed must generate acknowledge after reception each byte. Also master must generate acknowledge after reception each byte that been clocked slave transmitter. device that acknowledges must pull down line during acknowledge clock pulse, that line stable during HIGH period acknowledge related clock pulse (set-up hold times must taken into consideration). master receiver must signal data transmission transmitter generating acknowledge last byte that been clocked slave. this event transmitter must leave data line HIGH enable master generate stop condition.
handbook, full pagewidth
data line stable; data valid change data allowed
MBC621
Fig.7 transfer.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PCF8558
handbook, full pagewidth
START condition STOP condition
MBC622
Fig.8 Definition START STOP condition.
MASTER TRANSMITTER/ RECEIVER
SLAVE RECEIVER
SLAVE TRANSMITTER/ RECEIVER
MASTER TRANSMITTER
MASTER TRANSMITTER/ RECEIVER
MGA807
Fig.9 System configuration.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PCF8558
handbook, full pagewidth
DATA OUTPUT TRANSMITTER acknowledge DATA OUTPUT RECEIVER acknowledge FROM MASTER START condition clock pulse acknowledgement
MBC602
general characteristics detailed specification I2C-bus available request (order number 9398 40011).
Fig.10 Acknowledgment I2C-bus.
LIMITING VALUES accordance with Absolute Maximum Rating System (IEC 134). SYMBOL VLCD IDD, ISS, ILCD Ptot Tstg HANDLING Inputs outputs protected against electrostatic discharge normal handling. However, totally safe desirable take normal precautions appropriate handling devices. supply voltage supply voltage input voltage input voltage output voltage output voltage C101 input current output current VDD, VLCD current power dissipation package power dissipation output storage temperature PARAMETER MIN. -0.5 MAX. +8.0 +150 UNIT
VLCD
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PCF8558
CHARACTERISTICS VLCD Tamb unless otherwise specified, note SYMBOL Supplies VLCD IDD(PD) IDD1 IDD2 ILCD VPOR Logic VIL1 VIH1 VIL2 VIH2 level input voltage (all inputs except OSC) HIGH level input voltage (all inputs except OSC) level input voltage (pin OSC) HIGH level input voltage (pin OSC) leakage current input capacitance note 0.7VDD 0.3VDD supply voltage supply voltage supply current power-down mode supply current external clock supply current internal clock input current power-on reset level note PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
outputs RROW RCOL I2C-bus; VIL3 VIH3 Notes Outputs open-circuit; inputs VSS; I2C-bus inactive; external clock with duty factor. Resets logic when VPOR. Periodically sampled, 100% tested. Resistance output terminals C101) with VLCD outputs measured time. When voltages above below supply voltages VSS, input current flow. This current must exceed ±0.5 component drivers C101 output resistance output resistance C101 level input voltage HIGH level input voltage leakage current input capacitance level output current note note note 0.7VDD 0.3VDD note note
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PCF8558
CHARACTERISTICS timing values referenced levels with input voltage swing VDD. VLCD Tamb unless otherwise specified. SYMBOL fFR) fOSC(ext) tPLCD PARAMETER frame frequency (internal oscillator) external clock frequency driver delays VLCD with test loads CONDITIONS MIN. TYP. 62.5 MAX. UNIT
I2C-bus (see Fig.12) fSCL tCLKL tCLKH tBUF tSU;STA tHD;STA tSU;DAT tHD;DAT tSU;STO Notes rise fall times specified here refer driver device (i.e. PCF8558) part general fast I2C-bus specification. However, when PCF8558 asserts acknowledge SDA, fall time given parameter capacitive load line. device inputs filtered will reject spikes lines width <tSW(max). clock frequency time HIGH time free time rise time fall time START condition set-up time START condition hold time data set-up time data hold time STOP condition set-up time tolerable spike width capacitive load line note between successive STOP START conditions note note repeated start codes only 0.1Cb
handbook, full pagewidth
R40, C101
MGG564
Fig.11 test loads.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PCF8558
ndbook, full pagewidth
HD;STA
HD;DAT
HIGH
SU;DAT
SU;STA
MGA728
SU;STO
Fig.12 I2C-bus timing waveforms.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
APPLICATION INFORMATION
PCF8558
pinning PCF8558 optimized single plane wiring e.g. Chip-on-glass display modules.
handbook, full pagewidth
dots full graphic display
VLCD
PCF8558 VLCD
C101
dots full graphic display
VLCD
PCF8558 VLCD
C101
MASTER TRANSMITTER PCF84C81A; P80CL410
MGG565
Fig.13 Application using I2C-bus interface.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
PCF8558
handbook, halfpage
DISPLAY
handbook, halfpage
PCF8558
PCF8558
pitch
supply,
MGG566 MGG567
Fig.14 Application, display size pixels.
Fig.15 Bonding pads.
CHIP INFORMATION PCF8558 manufactured p-well CMOS technology. VLCD positive. chip substrate connected VDD. Bonding pads pitch size, aluminium Bump dimensions Wafer thickness
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
BONDING LOCATIONS
PCF8558
handbook, full pagewidth
C101
MGG568
dummy
~8.95
dummy
PCF8558
VLCD
~3.99 Fig.16 Bonding locations.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
Table Bonding locations (dimensions µm). coordinates referenced centre chip, Fig.16. -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -4303.6 -3903.6 -3803.6 -3703.6 -3603.6 -3503.6 -3403.6 -3303.6 -3203.6 -3103.6 -3003.6 -2903.6 -2803.6 -2703.6 -2603.6 1280.0 1005.8 905.8 805.8 705.8 605.8 505.8 405.8 305.8 205.8 105.8 -94.3 -194.3 -383.3 -483.3 -583.3 -683.3 -783.3 -883.3 -983.3 -1083.3 -1183.3 -1283.3 -1383.3 -1483.3 -1583.3 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 SYMBOL -2503.6 -2403.6 -2303.6 -2203.6 -2103.6 -2003.6 -1814.6 -1714.6 -1614.6 -1514.6 -1414.6 -1314.6 -1214.6 -1114.6 -1014.6 -914.6 -814.6 -714.6 -614.6 -514.6 -414.6 -314.6 -214.6 -114.6 -14.6 85.4 274.4 374.4 474.4 574.4 674.4 774.4 874.4 974.4 1074.4 1174.4 1274.4 1374.4 1474.4 1574.4 1674.4
PCF8558
SYMBOL C101 C100
-1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
SYMBOL 1774.4 1874.4 1974.4 2074.4 2174.4 2363.4 2463.4 2563.4 2663.4 2763.4 2863.4 2963.4 3063.4 3163.4 3263.4 3363.4 3463.4 3563.4 3663.4 3763.4 3863.4 3963.4 4063.4 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1823.5 -1583 -1483 -1383 -1283 -1183 -1083 -983 -883 -783 -683 -583 -483 -383 -283 -183 105.8 SYMBOL VLCD Dummy pads dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy Alignment marks Sign Sign Sign -4082.6 4147.4 -4262.6 -257.1 -155.6 -54.1 47.4 148.9 250.4 -4223.6 4303.5 -4303.6 4323.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4303.6 4017.1 3917.1 3817.1 3717.1 3617.1 3517.1 3417.1 3317.1 -2695.6 -3044.1 -3190.6 -3362.1 -3463.6 -3635.1 -3735.1 -3839.1 -3939.6
PCF8558
1083 1183 1283 1383 1483 1583 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1823.5 1790.4 1790.4 1790.4 1790.4 1790.4 1790.4 1823.4 1843.5 -1843.5 -1843.5 -1782.5 1807.5 1417.5
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
PCF8558
This data sheet contains target goal specifications product development. This data sheet contains preliminary data; supplementary data published later. This data sheet contains final product specifications.
Limiting values given accordance with Absolute Maximum Rating System (IEC 134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Where application information given, advisory does form part specification. LIFE SUPPORT APPLICATIONS These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips customers using selling these products such applications their risk agree fully indemnify Philips damages resulting from such improper sale. PURCHASE PHILIPS COMPONENTS
Purchase Philips components conveys license under Philips' patent components system provided system conforms specification defined Philips. This specification ordered using code 9398 40011.
1998
Philips Semiconductors
Objective specification
Universal driver small graphic panels
NOTES
PCF8558
1998
Philips Semiconductors worldwide company
Argentina: South America Australia: Waterloo Road, NORTH RYDE, 2113, Tel. 9805 4455, Fax. 9805 4466 Austria: Computerstr. A-1101 WIEN, P.O. 213, Tel. 1010, Fax. 1210 Belarus: Hotel Minsk Business Center, Bld. 1211, Volodarski Str. 220050 MINSK, Tel. +375 733, Fax. +375 Belgium: Netherlands Brazil: South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, James Bourchier Blvd., 1407 SOFIA, Tel. +359 211, Fax. +359 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. 7381 China/Hong Kong: Hong Kong Industrial Technology Centre, Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: South America Czech Republic: Austria Denmark: Prags Boulevard 1919, DK-2300 COPENHAGEN Tel. 2636, Fax. 0044 Finland: Sinikalliontie FIN-02630 ESPOO, Tel. +358 615800, Fax. +358 61580920 France: Carnot, BP317, 92156 SURESNES Cedex, Tel. 6161, Fax. 6427 Germany: D-20097 HAMBURG, Tel. Fax. Greece: 25th March Street, 17778 TAVROS/ATHENS, Tel. 4894 339/239, Fax. 4814 Hungary: Austria India: Philips INDIA Ltd, Band Building, floor, 254-D, Annie Besant Road, Worli, MUMBAI 025, Tel. 8541, Fax. 0966 Indonesia: Philips Development Corporation, Semiconductors Division, Gedung Philips, Buncit Raya Kav.99-100, JAKARTA 12510, Tel. 0040 ext. 2501, Fax. 0080 Ireland: Newstead, Clonskeagh, DUBLIN Tel. +353 7640 000, Fax. +353 7640 Israel: RAPAC Electronics, Kehilat Saloniki 18053, AVIV 61180, Tel. +972 0444, Fax. +972 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza Novembre 20124 MILANO, Tel. 6752 2531, Fax. 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. 3740 5130, Fax. 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. 1412, Fax. 1415 Malaysia: Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. 5214, Fax. 4880 Mexico: 5900 Gateway East, Suite 200, PASO, TEXAS 79905, Tel. +9-5 7381 Middle East: Italy Netherlands: Postbus 90050, 5600 EINDHOVEN, Bldg. Tel. 82785, Fax. 88399 Zealand: Wagener Place, C.P.O. 1041, AUCKLAND, Tel. 4160, Fax. 7811 Norway: Manglerud 0612, OSLO, Tel. 8000, Fax. 8341 Pakistan: Singapore Philippines: Philips Semiconductors Philippines Inc., Valero Salcedo Village, P.O. 2108 MCC, MAKATI, Metro MANILA, Tel. 6380, Fax. 3474 Poland: Lukiska 04-123 WARSZAWA, Tel. 2831, Fax. 2327 Portugal: Spain Romania: Italy Russia: Philips Russia, Usatcheva 35A, 119048 MOSCOW, Tel. 6918, Fax. 6919 Singapore: Lorong Payoh, SINGAPORE 319762, Tel. 2538, Fax. 6500 Slovakia: Austria Slovenia: Italy South Africa: S.A. PHILIPS Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. 7430 Johannesburg 2000, Tel. 5911, Fax. 5494 South America: Vicente Pinzon, 173, floor, 04547-130 PAULO, Brazil, Tel. 2333, Fax. 2382 Spain: Balmes 08007 BARCELONA, Tel. 6312, Fax. 4107 Sweden: Kottbygatan Akalla, S-16485 STOCKHOLM, Tel. 5985 2000, Fax. 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 Tel. 2741 Fax. 3263 Taiwan: Philips Semiconductors, Chien Rd., Sec. TAIPEI, Taiwan Tel. +886 2134 2865, Fax. +886 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. 4090, Fax. 0793 Turkey: Talatpasa Cad. 80640 Tel. 2770, Fax. 6707 Ukraine: PHILIPS UKRAINE, Patrice Lumumba str., Building Floor 252042 KIEV, Tel. +380 2776, Fax. +380 0461 United Kingdom: Philips Semiconductors Ltd., Bath Road, Hayes, MIDDLESEX 5BX, Tel. 5000, Fax. 8421 United States: East Arques Avenue, SUNNYVALE, 94088-3409, Tel. 7381 Uruguay: South America Vietnam: Singapore Yugoslavia: PHILIPS, Pasica 5/v, 11000 BEOGRAD, Tel. +381 344, Fax.+381 Internet:
other countries apply Philips Semiconductors, International Marketing Sales Communications, Building BE-p, P.O. 218, 5600 EINDHOVEN, Netherlands, Fax. 24825 Philips Electronics N.V. 1998
SCA59
rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent- other industrial intellectual property rights.
Printed Netherlands
415106/1200/02/pp24
Date release: 1998
Document order number:
9397 03284

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