FB_D[16:31] FB_D[16:31] Bi-Buffers 1DIR 2DIR +3.3 B_D[16:31] B_D1

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FB_D[16:31] FB_D[16:31] Bi-Buffers 1DIR 2DIR +3.3 B_D[16:31] B_D1

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FB_D[16:31]
FB_D[16:31] Bi-Buffers 1DIR 2DIR +3.3 B_D[16:31] B_D16 B_D17 B_D18 B_D19 B_D20 B_D21 B_D22 B_D23 B_D24 B_D25 B_D26 B_D27 B_D28 B_D29 B_D30 B_D31 +3.3 TOUT0 TOUT0 TOUT1 TOUT1 INITIAL RESET CONFIGURATIONS: PRESET DIV0 PRESET DIV1 PRESET FREQ0 PRESET FREQ1 ADDR_CONF CS_CONF0 CS_CONF1 CS_CONF2
A[0:31] FB_D16 FB_D17 FB_D18 FB_D19 FB_D20 FB_D21 FB_D22 FB_D23 FB_D24 FB_D25 FB_D26 FB_D27 FB_D28 FB_D29 FB_D30 FB_D31 +3.3 +3.3
Uni-Buffers MA10 MA11 MA12 MA13 MA14 MA15
MA[0:19]
R/-W -CS0_EN
MC74LCX16245DT B_D[16:31] Bi-Buffers
MC74LCX16244DT
D[0:31]
D[0:31]
1DIR 2DIR
4.7K
Uni-Buffers MA16 MA17 MA18 MA19 -IRQ7
+3.3
IRQ7* C112 TANT. JUMPER SHOULD INSTALLED DURING ASSEMBLY
*IRQ7
1OE* 2OE*
R/-W -BD_CS
MC74LCX244DW +3.3
+3.3
4.7Kx9
+3.3
MC74LCX16245DT JP14 JP15 JP16 JP17 JP18 JP19 JP20 JP21 JUMPER SHOULD INSTALLED DURING ASSEMBLY Uni-Buffers
PP[0:7]
+3.3
Motorola ColdFire
Title MCF5307 Evaluation Board Size Date: Document Number MCF5307.BUFFERS Thursday, April 1999 Sheet
MC74LCX16244DT -CF_RSTI
RS232 Driver D[0:31] TXD1 RXD1 -RTS1 -CTS1 R/-W C2VCC C1VSS TANT. TERMINAL PORT TANT.
A[0:31]
TIN1 TOUT1 TIN0 TOUT0 -IRQ1 -IRQ5 -CS0_HEADER -BWE0 -BWE1 -BWE2 -BWE3 -CS4 -CS5 -RSTO BCLKOHEADER SIZ0 -IRQ7 -CS2 -CS6 -CF_RSTI TXD1 RXD1 -RTS1 -CTS1 MTMOD0 -R_CAS0/DQM0 -R_CAS2/DQM2 -R_RAS0/SO0 -R_DRAMW -R_SCAS +3.3 SIZ1 TANT. -IRQ3 -CS1 -CS3 -CS7 TXD2 RXD2 -RTS2 -CTS2 TANT. -HIZ -R_CAS1/DQM1 -R_CAS3/DQM3 -R_RAS1/SO2 TXD2 -R_SRAS RXD2 R_SCKE -RTS2 -CTS2
MC145407DW
RS232 Driver AUXILARY PORT
EXPANSION/ PORT +3.3
EXPANSION PORT +3.3 JUMPER SHOULD INSTALLED ACROSS PINS DURING ASSEMBLY +3.3 4.7K Header 4.7K Osc. Clock Driver BCLKO +3.3 VCC1 VCC2 VCC3 VCC4 GND1 GND2 GND3 GND4 GND5 GND6 BCLK_SRAM BCLKOB BCLK_FPLA BCLK_SDRAM0 EDGESEL BCLK_SDRAM1 BCLK_SDRAM2 +3.3 BCLK_SDRAM3 BCLKOHEADER BCLK_SDRAM[0:3] DEBUGGER PORT 100mil header 2x13pin DDATA[0:3]
MC145406DW
-BKPT_TMS DSCLK_TRST PST[0:3] DSDI_TDI DSDO_TDO DDATA3 DDATA1 PSTCLK TANT. 5.0V Regulator LT1086CT5.0 VOUT TANT. PST3 PST1 3.3V Regulator LT1086CT3.3 VOUT +3.3
+3.3
-BDM_RSTI PST2 PST0
CLKIN_SLOW
DDATA2 DDATA0
TANT.
TANT.
1N5404CT
CDC351DW
resistors body size except R24, R28-30, R36-41 which 1206.
caps body size except 10uF which TANT. which 200uF
Title MCF5307 Evaluation Board Size Date: Document Number MCF5307.POWER Thursday, April 1999 Sheet
FB_D[16:31] +3.3 FLASH UPPER BYTE MA18 MA17 MA16 MA15 MA14 MA13 MA12 MA11 MA10 RESET* AM29LV004T-100EC FLASH LOWER BYTE RY_BY* VCC1 VCC2 RESET* AM29LV004T-100EC GND2 GND1 GND2 GND1 RY_BY* VCC1 VCC2 4.7K 4.7K 4.7K 4.7K FB_D31 FB_D30 FB_D29 FB_D28 FB_D27 FB_D26 FB_D25 FB_D24 MA10 MA11 MA12 MA13 MA14 MA15 MA16 MA17 MA18 BCLK_SRAM FB_D23 FB_D22 FB_D21 FB_D20 FB_D19 FB_D18 FB_D17 FB_D16 MA[0:19]
D[0:31]
4.7K
SRAM SA10 SA11 SA12 SA13 SA14 SA15 SA16 ADSP* ADV* ADSC SGW* SBD* SBC* SBB* SBA* LBO* SE1* SE2* SE3* GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 QD35 QD34 QD33 QD32 QD31 QD30 QD29 QD28 QD27 QC26 QC25 QC24 QC23 QC22 QC21 QC20 QC19 QC18 QB17 QB16 QB15 QB14 QB13 QB12 QB11 QB10 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12
-CS0_EN
-CS0_HEADER -CS0 JUMPER SHOULD INSTALLED ACROSS PINS DURING ASSEMBLY R/-W -RSTO
+3.3
+3.3
+3.3
+3.3
+3.3
+3.3 MA18 MA17 MA16 MA15 MA14 MA13 MA12 MA11 MA10 +3.3 4.7K
4.7K
-BWE2 -BWE0 -BWE1 -BWE3
JUMPER SHOULD INSTALLED ACROSS PINS DURING ASSEMBLY
-CS2 +3.3
MA19
MA[0:19]
+3.3
MCM69F737TQ11 populated assembly +3.3
Title MCF5307 Evaluation Board Size Date: Document Number MCF5307.FLASH Thursday, April 1999 Sheet
PP[0:7]
JUMPER 3,4,5 SHOULD INSTALLED ACROSS PINS DURING ASSEMBLY SDRAM I/CLK TCLK MODE I/O/Q0 I/O/Q1 I/O/Q2 I/O/Q3 I/O/Q4 I/O/Q5 I/O/Q6 I/O/Q7 I/O/Q8 I/O/Q9
MA[0:19] MA15 MA14 MA13 MA12 MA11 MA10 MA17 +3.3
A10_AP CKE0 CKE1 CAS* RAS* DQM7 DQM6 DQM5 DQM4 DQM3 DQM2 DQM1 DQM0 SO2* SO0* SO1* SO3* VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 NC13
SDRAM VREF1 VREF2 CLK0 CLK1 CLK2 CLK3 NC10 NC11 NC12 BCLK_SDRAM0 BCLK_SDRAM1 BCLK_SDRAM2 BCLK_SDRAM3 Title
D[0:31]
D[0:31]
A[0:31]
SCLK MODE
R_SCKE +3.3 4.7K -R_CAS0/DQM0 -R_CAS1/DQM1 -R_CAS2/DQM2 -R_CAS3/DQM3 4.7K -R_SCAS -R_SRAS -R_DRAMW
ispGAL22LV10 socket 4.7K
4.7K 4.7K
4.7K
4.7K +3.3
-R_RAS1/SO2 -R_RAS0/SO0
+3.3
C107
C108
C109
C110
C111
+3.3
BCLK_SDRAM[0:3]
C100
C101
C102
C103
C104
C105
C106
MCF5307 Evaluation Board Size Date:
Document Number MCF5307.SDRAM Thursday, April 1999 Sheet
PC100 Unbuffered Bank DIMM 16M, support 512M
+3.3
HARD_RESET
3.3V Supply Voltage Supervisors RESIN SENSE RESET RESET CONTROL TLC7733ID -IOW R/-W ECLK BALE -CS3 GREEN +3.3
4.7K
Ethernet I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 TDO*/IN1 TDI*/IN ispEN*/NC TMS*/NC TCK*/Y2 RESET*/Y1 GOE0 I/O31 I/O30 I/O29 I/O28 I/O27 I/O26 I/O25 I/O24 I/O23 I/O22 I/O21 I/O20 I/O19 I/O18 I/O17 I/O16 VCC0 VCC1 SIZ1 -IO16 -IOCHRDY -BD_CS -CF_RSTI -BDM_RSTI SIZ0 MA16 -IOR +3.3
5.0V Supply Voltage Supervisors RESIN SENSE RESET RESET TL7705ACD GREEN
-ETH_IRQ3 -IRQ3 ETH_RESET -HIZ
BCLK_FPL
GND0 GND1
ispLSI2032V-100LJ socket
MODE SCLK
+3.3
+3.3
C113
4.7K 4.7K 4.7K 4.7K 4.7K
0.01
Title MCF5307 Evaluation Board Size Date: Document Number MCF5307.PLD Thursday, April 1999 Sheet
+3.3 +3.3 4.7Kx9 +3.3 4.7Kx9
-PST[0:3] JP10 PP[0:7] PST0 PST1 PST2 PST3 JP11 D[0:31] D[0:31] JP12 JP13 A[0:31] -CS7 -CS6 -CS5 -CS4 -CS3 -CS2 -CS1 -CS0 PLLTPA +3.3 +3.3
PST[0:3] PP[0:7] 4.7K 4.7K A[0:31]
Pull-ups JUMPER SHOULD INSTALLED DURING ASSEMBLY
PLL3.3 +3.3
Pull-ups
TT0/PP0 TT1/PP1 TM0/PP2 TM1/PP3 TM2/PP4 DREQ1/PP5 DREQ0/PP6 XTIP/PP7
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25
VCC27 VCC28 VCC29 VCC30
-IRQ1 -IRQ3 -IRQ5 -IRQ7 R/-W -CF_RSTI -BWE0 -BWE1 -BWE2 -BWE3
IRQ1 IRQ3 IRQ5 IRQ7 RSTI BWE0 BWE1 BWE2 BWE3 SIZ0 SIZ1
SIZ0 SIZ1 -R_RAS0/SO0 -R_RAS1/SO2 -R_CAS0/DQM0 -R_CAS1/DQM1 -R_CAS2/DQM2 -R_CAS3/DQM3 -R_DRAMW -R_SRAS -R_SCAS R_SCKE DSCLK_TRST DSDO_TDO DSDI_TDI -BKPT_TMS -HIZ BCLKO -RSTO CLKIN_SLOW PSTCLK EDGESEL
MCF5307FT90
RAS0/SO0 RAS1/SO2 CAS0/DQM0 CAS1/DQM1 CAS2/DQM2 CAS3/DQM3 DRAMW SRAS SCAS SCKE DSCLK/TRST DSO/TDO DSI/TDI BKPT/TMS BCLKO RSTO CLKIN PSTCLK EDGESEL
ColdFire
A24/PP8 A25/PP9 A26/PP10 A27/PP11 A28/PP12 A29/PP13 A30/PP14 A31/PP15
JUMPER SHOULD INSTALLED DURING ASSEMBLY
PST0 PST1 PST2 PST3
+3.3 4.7Kx9 Pull-ups
-CS7 -CS6 -CS5 -CS4 -CS3 -CS2 -CS1 -CS0 SMTMOD0 MTMOD1 MTMOD2 MTMOD3
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28 GND29 GND30 GND31
TIN1 TIN0 TOUT1 TOUT0
TXD1 RXD1 RTS1 CTS1
TXD2 RXD2 RTS2 CTS2
DDATA0 DDATA1 DDATA2 DDATA3
VCC26
PLLTP
+3.3 4.7K 4.7K 4.7K 4.7K 4.7K
+3.3 PLL3.3 1500 1500 4.7K 4.7K 4.7K
MTMOD3 MTMOD2 MTMOD1 MTMOD0 4.7K
DDATA[0:3] DDATA3 DDATA2 DDATA1 DDATA0 TOUT0 TOUT1 TIN0 TIN1 -CST2 -RTS2 RXD2 TXD2 -CST1 -RTS1 RXD1 TXD1 TOUT0 TOUT1 TIN0 TIN1 -CTS2 -RTS2 RXD2 TXD2 -CTS1 -RTS1 RXD1 TXD1
4.7K
TANT. NORMAL MODE HARD-WIRE
+3.3
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
Title MCF5307 Evaluation Board Size Date: Document Number MCF5307.CPU Thursday, April 1999 Sheet
B_D[16:31]
B_D[16:31] B_D16 B_D17 B_D18 B_D19 B_D20 B_D21 B_D22 B_D23 B_D24 B_D25 B_D26 B_D27 B_D28 B_D29 B_D30 B_D31 SD10 SD11 SD12 SD13 SD14 SD15 SA10 SA11 SA14 SA15 SA16 SA17 SA18 SA19 BALE
Ethernet Base-T MSD7 MSD6_SLOT MSD5_BNCSW MSD4 MSD3 MSD2_EECK MSD1_EED0 MSD0_EED1 EECS BPCS* IRQ3 IRQ4 IRQ5 IRQ9 IRQ10 IRQ11 IRQ12 IRQ15 IO16* IOCHRDY* SYSCLK IOR* IOW* SMEMR* AEN* MEMW* MEMR* AVDD1 AVDD2 AVDD3 AGND1 AGND2 AGND3 GND1 GND2 GND3 GND4 DM9008F 0.01 GREEN Title MCF5307 Evaluation Board Size Date: Document Number MCF5307.ETHERNET Thursday, April 1999 Sheet
4.7K Ethernet 4.7K
4.7K Ethernet Osc.
MA[0:19]
AT93C46-10SC-2.7 populated during assembly
-ETH_IRQ3
-IO16 -IOCHRDY
BALE 4.7K ECLK -IOR -IOW ETH_RESET
BNCEN TXRX+ RXCD+ CDTPTX+ TPTXTPRX+ TPRXLILED VCC1 VCC2 VCC3 GND0
4.7K
4.7K
Ethernet Filter TDX+ AGND1 TXDRXI+ AGND2 RXIFD22-101G 49.9 49.9 TPTX+ TPTXTPRX+ TPRX16
FERRITE_BEA
0.01
TANT. 4.7K
RJ45 Thur Hole
Mictor ADDRESS Mictor CONTROL Mictor DATA Mictor DEBUG CLK_0_1 CLK_0_2 IO_1 IO_2 IO_3 IO_4 IO_5 IO_6 IO_7 IO_8 IO_9 IO_10 IO_11 IO_12 IO_13 IO_14 IO_15 IO_16 IO_17 IO_18 IO_19 IO_20 IO_21 IO_22 IO_23 IO_24 IO_25 IO_26 IO_27 IO_28 IO_29 IO_30 IO_31 IO_32 TXD1 TXD2 CLK_0_1 CLK_0_2 IO_1 IO_2 IO_3 IO_4 IO_5 IO_6 IO_7 IO_8 IO_9 IO_10 IO_11 IO_12 IO_13 IO_14 IO_15 IO_16 IO_17 IO_18 IO_19 IO_20 IO_21 IO_22 IO_23 IO_24 IO_25 IO_26 IO_27 IO_28 IO_29 IO_30 IO_31 IO_32 PSTCLK CLK_0_1 CLK_0_2 IO_1 IO_2 IO_3 IO_4 IO_5 IO_6 IO_7 IO_8 IO_9 IO_10 IO_11 IO_12 IO_13 IO_14 IO_15 IO_16 IO_17 IO_18 IO_19 IO_20 IO_21 IO_22 IO_23 IO_24 IO_25 IO_26 IO_27 IO_28 IO_29 IO_30 IO_31 IO_32 CLK_0_1 CLK_0_2 IO_1 IO_2 IO_3 IO_4 IO_5 IO_6 IO_7 IO_8 IO_9 IO_10 IO_11 IO_12 IO_13 IO_14 IO_15 IO_16 IO_17 IO_18 IO_19 IO_20 IO_21 IO_22 IO_23 IO_24 IO_25 IO_26 IO_27 IO_28 IO_29 IO_30 IO_31 IO_32 Mictor DRAM D[0:31] BCLKOB -R_RAS0/SO0 TOUT1 -R_CAS2/DQM2 TIN1 -R_RAS1/SO2 -BWE1 -R_CAS0/DQM0 -BWE2 -R_CAS1/DQM1 -BWE3 -R_CAS3/DQM3 -BWE0 -R_SRAS -R_DRAMW -R_SCAS R_SCKE TIN0 TOUT0 PLLTPA EDGESEL CLK_0_1 CLK_0_2 IO_1 IO_2 IO_3 IO_4 IO_5 IO_6 IO_7 IO_8 IO_9 IO_10 IO_11 IO_12 IO_13 IO_14 IO_15 IO_16 IO_17 IO_18 IO_19 IO_20 IO_21 IO_22 IO_23 IO_24 IO_25 IO_26 IO_27 IO_28 IO_29 IO_30 IO_31 IO_32 D[0:31]
A[0:31]
A[0:31]
SIZ0 SIZ1 -CS0 -CS1 -RSTO -IRQ3 -IRQ1 -CF_RSTI -IRQ7 R/-W -CS4 -CS7 -CS3 -CS6 -CS2 -CS5 -IRQ5
PSTCLK PST3 PST0 PST1 PST2 MTMOD0 DDATA3 MTMOD1 DDATA2 RXD2 DDATA1 -RTS2 DDATA0 RXD1 MTMOD3 MTMOD2 -RTS1 DSCLK_TRST -CTS1 DSDI_TDI -CTS2 DSDO_TDO -BKPT_TMS -HIZ
BCLKO
Mictor_Connector 767054-1 Mictor_Connector 767054-1 Mictor_Connector 767054-1
Mictor_Connector 767054-1 Mictor_Connector 767054-1
+3.3 +3.3
+3.3 1500 1500 1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
Title 1500 Size Date:
MCF5307 Evaluation Board Document Number MCF5307.CONNECTORS Thursday, April 1999 Sheet

FB_D[16:31] FB_D[16:31] Bi-Buffers 1DIR 2DIR +3.3 B_D[16:31] B_D1

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