Download

PDF Abstract Text:

74VHC138 3-to-8 Decoder / Demultiplexer

November 1992 Revised April 1999

74VHC138 3-to-8 Decoder / Demultiplexer
November 1992 Revised April 1999
74VHC138 3-to-8 Decoder / Demultiplexer
General Description
The VHC138 is an advanced high speed CMOS 3-to-8 decoder / demultiplexer fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 binary select inputs (A0, A1 and A2) determine which one of the outputs (O0-O7) will go LOW. When enable input E3 is held LOW or either E1 or E2 is held HIGH, decoding function is inhibited and all outputs go HIGH. E3, E1 and E2 inputs are provided to ease cascade connection and for use as an address decoder for memory systems. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Features
Ordering Code:
Order Number 74VHC138M 74VHC138SJ 74VHC138MTC 74VHC138N Package Number M16A M16D MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
IEEE / IEC
Pin Descriptions
Pin Names A0-A2 E1-E2 E3 O0-O7 Description Address Inputs Enable Inputs Enable Input Outputs
DS011537.prf
www.fairchildsemi.com
74VHC138
Truth Table
www.fairchildsemi.com
74VHC138
Absolute Maximum Ratings(Note 1)
Recommended Operating Conditions (Note 2)
Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output / input loading variables. Fairchild does not recommend operation outside databook specifications. Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
www.fairchildsemi.com
74VHC138
AC Electrical Characteristics
Units
www.fairchildsemi.com
74VHC138
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
16-Lead Small Outline Package (SOP) EIAJ TYPE II, 5.3mm Wide Package Number M16D
www.fairchildsemi.com
74VHC138
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16
www.fairchildsemi.com
74VHC138 3-to-8 Decoder / Demultiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.