November 1992 Revised April 1999 74VHC138 3-to-8 Decoder/Demultip

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November 1992 Revised April 1999 74VHC138 3-to-8 Decoder/Demultip

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74VHC138 3-to-8 Decoder/Demultiplexer
November 1992 Revised April 1999
74VHC138 3-to-8 Decoder/Demultiplexer
VHC138 advanced high speed CMOS 3-to-8 decoder/demultiplexer fabricated with silicon gate CMOS technology. achieves high speed operation similar equivalent Bipolar Schottky while maintaining CMOS power dissipation. When device enabled, binary select inputs (A0, determine which outputs (O0-O7) will LOW. When enable input held either held HIGH, decoding function inhibited outputs HIGH. inputs provided ease cascade connection address decoder memory systems. input protection circuit ensures that applied input pins without regard supply voltage. This device used interface systems supply systems such battery back This circuit prevents device destruction mismatched supply input voltages.
Features
High Speed: 5.7ns (typ) 25°C power dissipation: (max.) 25°C High noise immunity: VNIH VNIL (min.) Power down protection provided inputs function compatible with 74HC138
Ordering Code:
Order Number 74VHC138M 74VHC138SJ 74VHC138MTC 74VHC138N Package Number M16A M16D MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages also available Tape Reel. Specify appending suffix letter ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Descriptions
Names A0-A2 E1-E2 O0-O7 Description Address Inputs Enable Inputs Enable Input Outputs
1999 Fairchild Semiconductor Corporation
DS011537.prf
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74VHC138
Truth Table
Inputs Outputs
HIGH Voltage Level Voltage Level Immaterial
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74VHC138
Absolute Maximum Ratings(Note
Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) Input Diode Current (IIK) Output Diode Current (IOK) Output Current (IOUT) /GND Current (ICC Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, seconds) 260°C -0.5V +7.0V -0.5V +7.0V -0.5V 0.5V -65°C +150°C
Recommended Operating Conditions (Note
Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) Operating Temperature (TOPR) Input Rise Fall Time (tr, 3.3V 0.3V 5.0V 0.5V ns/V ns/V 2.0V +5.5V +5.5V -40°C +85°C
Note Absolute Maximum Ratings values beyond which device damaged have useful life impaired. databook specifications should met, without exception, ensure that system design reliable over power supply, temperature, output/input loading variables. Fairchild does recommend operation outside databook specifications. Note Unused inputs must held HIGH LOW. They float.
Electrical Characteristics
Symbol Parameter HIGH Level Input Voltage Level Input Voltage HIGH Level Output Voltage Level Output Voltage Input Leakage Current Quiescent Supply Current 2.58 3.94 0.36 0.36 ±0.1 25°C 1.50 0.50 2.48 3.80 0.44 0.44 ±1.0 40.0 5.5V -40°C +85°C 1.50 0.50 Units Conditions
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74VHC138
Electrical Characteristics
Symbol tPLH tPHL Parameter Propagation Delay tPLH tPHL Propagation Delay tPLH tPHL Propagation Delay Input Capacitance Power Dissipation Capacitance
Note defined value internal equivalent capacitance which calculated from operating current consumption without load. Average operating current obtained equation: (opr.) ICC.
25°C 10.0 10.6 10.7 11.4 15.8 10.1 12.8 16.3 10.1 11.4 14.9 10.1
-40°C +85°C 13.5 18.0 11.5 15.0 18.5 11.5 13.5 17.0 11.5
Units
Conditions Open (Note
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74VHC138
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
16-Lead Small Outline Package (SOP) EIAJ TYPE 5.3mm Wide Package Number M16D
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74VHC138
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16
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74VHC138 3-to-8 Decoder/Demultiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT FAIRCHILD SEMICONDUCTOR CORPORATION. used herein: critical component component life support Life support devices systems devices systems device system whose failure perform reawhich, intended surgical implant into sonably expected cause failure life support body, support sustain life, whose failure device system, affect safety effectiveness. perform when properly used accordance with instructions provided labeling, reasonably expected result significant injury www.fairchildsemi.com user.
Fairchild does assume responsibility circuitry described, circuit patent licenses implied Fairchild reserves right time without notice change said circuitry specifications.

November 1992 Revised April 1999 74VHC138 3-to-8 Decoder/Demultip

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