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Superior Alternative EPROM Functionality Flash Introduction Many-


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SST's Products
Superior Alternative EPROM Functionality Flash
Introduction Many-Time Programmable cost flash memory. combines electrical erasability flash cost effectiveness EPROM. designed products, cost NVM, reducing some peripheral circuitry existing high-functionality SuperFlash products while retaining benefits SuperFlash core higher reliability, faster write performance, geometric scalability, low-cost manufacturing process. This application note describes features benefits SST's products they used existing UV-EPROM, OTP, flash designs. contents this application note will apply product densities. Device Operation products functionally (Read Program) compatible with industry standard UV-EPROM products utilizing same timing pinouts. supports electrical Erase operation instead ultraviolet Erase UV-EPROMs. products with densities lower will offered either 5.0V 2.7V Read, while densities will offered only 2.7V. devices programmed erased with 12V. Read operation, have held output data then becomes available after standard access time. device programmed byte byte erased Bulk Erase operation. Both Program Erase operations hardware-controlled operations room temperature. Unlike other flash, does (software data protection) command sequences initiating Program Erase operations. devices programmed erased using single pulse PGM# (PGM# VIL). 256K/512K/ devices programmed erased using single pulse (CE# VIL). falling edge PGM# (whichever applies) initiates Program/ Erase operation. device requires byte Program bulk Erase operation. Erase mode distinguished from Program mode above cases applying additional voltage pin. signal cases, except 512K device where dual-function OE#/VPP requires Program/Erase operation. control signals applied given below. more details device operation, please refer appropriate datasheet.
Program 1M/2M
PGM# 12V;
(PGM# requires pulse 256K/512K/4M 12V; (CE# requires pulse Erase 1M/2M
PGM# 12V;
(PGM# requires pulse 256K/512K/4M 12V; (CE# requires pulse Benefits SST's Products Greater functionality with electrical erase reprogrammability
products provide greater functionality that make them better alternatives standard EPROM products. Standard UV-EPROMs require separate Erase operation, while only programmed once. solution used, inventory that requires subsequent software upgrade would have discarded, therefore adding inventory costs. solution used would eliminate such added inventory costs, since device could quickly erased reprogrammed. Total cost ownership associated with solutions therefore inherently lower than that either UV-EPROM solutions. Faster Program Erase
biggest advantages faster total program erase time compared EPROMs functionality flash. comparisons below made with reference Mbit devices. OTPs take minimum µs/byte program entire chip. Therefore, Mbit device will take about 13.1 seconds program entire chip, programmable only once. UV-EPROMs require UV-eraser about minutes erase chip µs/byte program. Therefore, Mbit UV-EPROM device would take total over minutes both erase program.
1998 Silicon Storage Technology, Inc. logo SuperFlash registered trademarks Silicon Storage Technology, Inc. trademark Silicon storage Technology, Inc. 211-02 7/98 These specifications subject change without notice.
SST's Products Superior Alternative EPROM Functionality Flash
Application Note Mbit bulk-erase flash takes minimum seconds chip erase 12.5 seconds chip program. Note, case Erase, above numbers include time taken pre-program every location process that required avoid overerase problem bulkerase flash that SuperFlash technology inherently eliminates. Another point worth noting that Erase Program times bulk-erase flash longer with additional endurance cycles. Since does erase, windowed packages needed. This allows offered costeffective plastic package such PDIP PLCC. UVEPROM, other hand, requires windowed package that allows light, resulting higher packaging costs. higher cost manufacturing when compared MTP, higher yield loss programming errors. With MTP, yield loss programming errors zero, since quickly erased reprogrammed. Uses Superior SuperFlash Technology
contrast, Mbit device electrically erased maximum seconds reprogrammed about seconds (without requiring pre-programming 00H), therefore having shorter re-program time than above solutions. faster Program Erase operations result lower manufacturing cycle times resulting lower manufacturing costs. Testing times testing costs also reduced result faster erase programming times. addition, faster Program Erase operations will also reduce development cycles improve time market. clear advantage when compared EPROMs functionality bulk-erase flash. Lower Cost Solution
products based SST's core SuperFlash technology inherit benefits associated with this superior technology. SST's proprietary memory cell design uses relatively thick oxides compared with other flash technologies. SuperFlash tunnel oxide three four times thicker than conventional flash tunnel oxide, resulting excellent data retention (100 years), thus higher reliability than conventional flash years). erase, SST's SuperFlash memory cell uses average electric field 4MV/cm, opposed 10MV/ conventional flash, which increases possibility oxide rupture conventional stacked-gate flash memory. SST's Split gate design isolates each memory cell from line, eliminating possibility overerase failures. Conventional flash, other hand, requires special circuitry reduce overerase. addition, conventional flash, every location needs preprogrammed prior erase. This results slower Erase operation conventional flash memory. cost flash memory primarily function wafer fabrication testing. Unlike conventional flash technology, SST's SuperFlash technology uses simple process with fewer masking layers, significantly reducing cost wafer manufacturing resulting higher yields. seen earlier, testing time costs reduced faster Program Erase cycles. Choice Solutions from
Many applications require enhanced features high functionality flash, such single power supply smaller sector architecture, still require insurance re-programmability. However, until now, industry used higher cost flash lack appropriate solution. order address these applications, designed lower cost solutions eliminating some peripheral circuitry existing SuperFlash high functionality flash products like charge pump, circuitry, circuitry small sectors. Consequently, those applications where enhanced flash functionality needed, provides above applications with cost alternative NVM.
With introduction products, will provide complete solutions system designers. system designer SST's 29EExxx page mode EEPROM higher functionality products lower cost requirements.
1998 Silicon Storage Technology, Inc.
211-02 7/98
SST's Products Superior Alternative EPROM Functionality Flash
Application Note Compatibility between EPROM devices offered same packages UV-EPROM devices. They pin-to-pin compatible package types. Therefore, changes board layout needed. Mbit products available 32-pin PDIP, PLCC TSOP packages, while Kbit products offered PDIP TSOP PLCC packages. Read operation both EPROMs identical. difference programming algorithm transparent users since Program Erase operations normally performed using external programmer. Compatibility between Bulk-Erase Flash SST's Mbit devices offered same packages other Mbit Bulk Erase flash devices 32-pin PDIP/PLCC/ TSOP packages. They pin-topin compatible package types except flash PGM# MTP. However, these pins used Program Erase operation, described Section this application note. There would impact system design layout programming done using external programmer. same reason, difference programming algorithm transparent users. result, used 100% drop-in substitute densities, without board layout modifications. case 256K 512K, EPROM flash have different pinouts. This these densities compatible with flash, therefore, small layout changes would required. Programmer Support products will have programmer support from leading programmer vendors. Please contact local representative obtain list programmer support available products. In-System Programmability (ISP) Issues mainly suitable applications that require in-system programmability (ISP). However, device programmed system supply available system. system design should include jumper switch between Address pin. This because dual-functionality that used address input during program high voltage during erase. should noted that devices, temperature condition should 25°C±5°C program erase operations. Also, de-coupling capacitance required VPP, that noise during Program/Erase filtered. result, Program/Erase operation does intermittently disabled noise when memory locations being erased programmed. Another difference between flash will software command sequences flash which used products. Therefore, software command sequences used program flash need bypassed when programming erasing products system. Conclusion combines electrical erasability flash with cost effectiveness EPROMs. This makes costcompetitive solution EPROM other flash applications where required. compatibility with EPROM supports 100% drop-in replacement provides cost reduction existing systems that utilize EPROM. result, provides market with cost alternative bulk-erase flash high functionality alternative EPROMs.
1998 Silicon Storage Technology, Inc.
211-02 7/98
SST's Products Superior Alternative EPROM Functionality Flash
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Revised 6-26-98
Silicon Storage Technology, Inc. 1171 Sonora Court Sunnyvale, 94086 Telephone 408-735-9110 408-735-9036 www.SuperFlash.com www.ssti.com Literature FaxBack 888-221-1178, International 732-544-2873
1998 Silicon Storage Technology, Inc.
211-02 7/98

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