128K CMOS SRAM Features Industrial commercial temperature Organiz

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128K CMOS SRAM Features Industrial commercial temperature Organiz

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AS7C32098A
128K CMOS SRAM Features
Industrial commercial temperature Organization: 131,072 words bits Center power ground pins High speed
10/12/15/20 address access time 4/5/6/7 output enable access time 28.8 /max CMOS
Individual byte read/write controls Easy memory expansion with inputs TTL- CMOS-compatible, three-state 44-pin JEDEC standard packages protection 2000 volts Latch-up current
TSOP
power consumption: ACTIVE
/max
power consumption: STANDBY
Logic block diagram
arrangement TSOP
I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O16 I/O15 I/O14 I/O13 I/O12 I/O11 I/O10 I/O9
I/O1-I/O8 I/O9-I/O16
Decoder
1024 Array (2,097,152)
buffer
Control circuit Column decoder
Selection guide
Maximum address access time Maximum output enable access time Maximum operating current Maximum CMOS standby current Industrial Commercial Unit
2/24/05,
Alliance Semiconductor
Copyright Alliance Semiconductor. rights reserved.
AS7C32098A
Functional description
AS7C32098A high-performance CMOS 2,097,152-bit Static Random Access Memory (SRAM) device organized 131,072 words bits. designed memory applications where fast data access, power, simple interfacing desired. Equal address access cycle times (tAA, tRC, tWC) 10/12/15/20 with output enable access times (tOE) 4/5/6/7 ideal high-performance applications. chip enable input permits easy memory expansion with multiple-bank memory systems. When high device enters standby mode. device guaranteed exceed 28.8mW power consumption CMOS standby mode. write cycle accomplished asserting write enable (WE) chip enable (CE). Data input pins I/O1-I/O16 written rising edge (write cycle (write cycle avoid contention, external devices should drive pins only after outputs have been disabled with output enable (OE) write enable (WE). read cycle accomplished asserting output enable (OE) chip enable (CE), with write enable (WE) high. chip drives pins with data word referenced input address. When either chip enable output enable inactive, write enable active, output drivers stay high-impedance mode. device provides multiple center power ground pins, separate byte enable controls, allowing individual bytes written read. controls lower bits, I/O1-I/O8, controls higher bits, I/O9-I/O16. chip inputs outputs TTL- CMOS-compatible, operation 3.3V (AS7C32098A) supply. device available JEDEC standard TSOP package.
Absolute maximum ratings
Parameter Voltage relative Voltage relative Power dissipation Storage temperature (plastic) Ambient temperature with applied current into outputs (low) Symbol Tstg Tbias IOUT -0.50 -0.50 +5.0 +0.50 +150 +125 Unit
Note: Stresses greater than those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only functional operation device these other conditions outside those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
Truth table
I/O1-I/O8
High High
I/O9-I/O16
High High High DOUT DOUT High
Mode
Standby (ISB, ISB1) Output disable (ICC)
DOUT High DOUT High
Read (ICC)
Write (ICC)
Key: Don't care, Low, High.
2/24/05,v.
Alliance Semiconductor
AS7C32098A
Recommended operating conditions
Parameter Supply voltage Input voltage Ambient operating temperature commercial industrial Symbol (10/12/15/20)
Typical -0.5
Unit
VIL*
-1.0V pulse width less than 5ns. 2.0V pulse width less than 5ns.
operating characteristics (over operating range)1
Parameter Input leakage current Output leakage current Operating power supply current Symbol |ILI| Test conditions VI/O VIL, fmax IOUT VIH, 0.2V, 0.2V 0.2V, Output voltage Industrial Commercial Unit
|ILO|
Standby power supply current
ISB1
Capacitance 1MHz, NOMINAL)4
Parameter Input capacitance capacitance Symbol CI/O Signals Test conditions VOUT Unit
2/24/05,v.
Alliance Semiconductor
AS7C32098A
Read cycle (over operating range)2,8
Parameter Read cycle time Address access time Chip enable (CE) access time Output enable (OE) access time Output hold from address change output High output high output High output high access time output High output high Power time Power down time Symbol tACE tCLZ tCHZ tOLZ tOHZ tBLZ tBHZ Unit Notes
switching waveforms
Rising input Falling input Undefined/don't care
Read waveform (address controlled)5,6,8
Address DataOUT Previous data valid Data valid
2/24/05,v.
Alliance Semiconductor
AS7C32098A
Read waveform (CE, controlled)5,7,8
Address tOLZ tACE tCLZ tBLZ DataOUT Data valid tBHZ tCHZ tOHZ
Write cycle (over operating range)9
Parameter Write cycle time Chip enable (CE) write Address setup write Address setup time Write pulse width High) Write pulse width Low) Write recovery time Address hold from write Data valid write Data hold time Write enable output High-Z Output active from write Byte enable write Symbol tWP1 tWP2 Unit Note
2/24/05,v.
Alliance Semiconductor
AS7C32098A
Write waveform 1(WE controlled)9
Address DataIN DataOUT Data undefined Data valid High
Write waveform controlled)9
Address DataIN DataOUT tCLZ High Data undefined Data valid High
2/24/05,v.
Alliance Semiconductor
AS7C32098A
Write waveform
Address DataIN DataOUT High Data undefined Data valid High
test conditions
Output load: Figure Input pulse level: 3.0V. Figure Input rise fall times: Figure Input output timing reference levels: 1.5V.
+3.0V Figure Input pulse DOUT
+3.3V Thevenin equivalent: DOUT +1.728V
Figure 3.3V Output load
Notes
During power-up, pull-up resistor required meet specification. test conditions, Test Conditions, Figures tCLZ tCHZ specified with Figure Transition measured ±500mV from steady-state voltage. This parameter guaranteed, tested. High read cycle. read cycle. Address valid prior coincident with transition Low. read cycle timings referenced from last valid address first transitioning address. write cycle timings referenced from last valid address first transitioning address. C=30pF, except High parameters, where C=5pF.
2/24/05,v.
Alliance Semiconductor
AS7C32098A
Package dimensions
44-pin TSOP
101112131415161718 19202122 0-5°
44-pin TSOP (mm) (mm) 0.05 0.15 0.95 1.05 0.45 0.21 0.12 18.31 18.52 10.06 10.26 11.68 11.94 0.80 (typical) 0.40 0.60
2/24/05,v.
Alliance Semiconductor
AS7C32098A
Ordering Codes
Package TSOP Temperature Commercial Industrial AS7C32098A-10TC AS7C32098A-10TI AS7C32098A-12TC AS7C32098A-12TI AS7C32098A-15TC AS7C32098A-15TI AS7C32098A-20TC AS7C32098A-20TI
Note: suffix above part numbers Lead Free Parts. (EX: AS7C32098A 10TCN)
Part numbering system
AS7C SRAM prefix 2098A Package: TSOP Temperature ranges: Commercial, 70°C Industrial, -40°C 85°C Lead Free Parts Voltage: Device Access 3.3V CMOS number time
2/24/05,v.
Alliance Semiconductor
AS7C32098A
Alliance Semiconductor Corporation 2575, Augustine Drive, Santa Clara, 95054 Tel: 4900 Fax: 4999 www.alsc.com
Copyright Alliance Semiconductor Rights Reserved Preliminary Information Part Number: AS7C32098A Document Version:
Copyright 2003 Alliance Semiconductor Corporation. rights reserved. three-point logo, name Intelliwatt trademarks registered trademarks Alliance. other brand product names trademarks their respective companies. Alliance reserves right make changes this document products time without notice. Alliance assumes responsibility errors that appear this document. data contained herein represents Alliance's best data and/or estimates time issuance. Alliance reserves right change correct this data time, without notice. product described herein under development, significant changes these specifications possible. information this product data sheet intended general descriptive information potential customers users, intended operate provide, guarantee warrantee user customer. Alliance does assume responsibility liability arising application product described herein, disclaims express implied warranties related sale and/or Alliance products including liability warranties related fitness particular purpose, merchantability, infringement intellectual property rights, except express agreed Alliance's Terms Conditions Sale (which available from Alliance). sales Alliance products made exclusively according Alliance's Terms Conditions Sale. purchase products from Alliance does convey license under patent rights, copyrights; mask works rights, trademarks, other intellectual property rights Alliance third parties. Alliance does authorize products critical components life-supporting systems where malfunction failure reasonably expected result significant injury user, inclusion Alliance products such lifesupporting systems implies that manufacturer assumes risk such agrees indemnify Alliance against claims arising from such use.

128K CMOS SRAM Features Industrial commercial temperature Organiz

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