Industry Standard 0.13 Micron CMOS Digital Logic Process; 1.2/3.3 volt

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Industry Standard 0.13 Micron CMOS Digital Logic Process; 1.2/3.3 volt

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0.13um, 12-145 Phase Locke Loop
Industry Standard 0.13 Micron CMOS Digital Logic Process; 1.2/3.3 volts Digital Controlled Output Frequency with Symmetric Duty Cycle Embedded Frequency Range: MHz, locked reference frequency Jitter Nominally 72ps 1.2v CMOS Core Interface External Components Required
GENERAL DESCRIPTION
common method frequency synthesis lock phase locked loop (PLL) multiple some reference frequency. frequency resolution these systems limited reference frequency such that Fout Fref where arbitrary integer, Fout output frequency, Fref reference frequency. These systems into stability problems becomes large.
.64mm .34mm (0.13um 1P5M)
This frequency synthesizer uses method constructing output waveform from edges. edges equally spaced time, this spacing limiting factor resolution synthesizer. This system generates waves from with average period resolution 70ps. Based upon simulation, jitter 72ps rms. circuit fabricated 0.13um, 1.2/3.3V CMOS technology. device completely integrated, requiring external compensation.
SYSTEM OVERVIEW
simplified block diagram system shown Figure system four major functional blocks. There which generates equally offset waves. final high frequency output (fmx) selected from interpolator outputs selector block. selector controlled selection control block.
Sarnoff Corporation reserves right change these specifications without notice. ©Copyright 2002 Sarnoff Corporation. rights reserved.
SIMPLIFIED BLOCK DIAGRAM
CVCO Charge Pump
Interpolator
Phase Detector Divide Selector Ref(27MHz) IPE1*2048 -IPE2*2048 Selection Control Decrement Sequence Generator Counter Divider
Output
Figure
system able generate variable frequencies using best edge selection algorithm from equally offset waves coming from interpolator.
EXAMPLE
WAVE GENERATION
time
Tap(28) Tap(24) Tap(20) Tap(16) Tap(12) Tap(8) Tap(4) Tap(0)
more information, contact:
Sarnoff Corporation Washington Road 5300, Princeton, 08543 Phone: (609) 734-2553, Fax: (609) 734-2040 e-mail: siliconstrategies@sarnoff.com
Sarnoff Corporation reserves right change these specifications without notice. ©Copyright 2002 Sarnoff Corporation. rights reserved. 0112002

Industry Standard 0.13 Micron CMOS Digital Logic Process; 1.2/3.3 volt

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