| The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers. |
DESCRIPTIO Steeper Roll-Off Than Order Bessel Filters fCUTOFF 100
Top Searches for this datasheetLTC1064-7 Linear Phase, Order Lowpass Filter DESCRIPTIO Steeper Roll-Off Than Order Bessel Filters fCUTOFF 100kHz Phase Equalized Filter 14-Pin Package Phase Group Delay Response Fully Tested Transient Response Exhibits Overshoot Ringing Wide Dynamic Range 72dB Better Throughout 50kHz Passband External Components Needed LTC1064-7 clock-tunable monolithic order lowpass filter with linear passband phase flat group delay. amplitude response approximates maximally flat passband whilte exhibits steeper roll-off than equivalent order Bessel filter. instance, twice cutoff frequency filter attains 34dB attenuation 12dB Bessel), while three times cutoff frequency filter attains 68dB attenuation 30dB Bessel). cutoff frequency LTC1064-7 tuned external CMOS clock. LTC1064-7 features wide dynamic range. With single supply, 76dB. Optimum 92dB obtained with ±7.5V supplies. clock-to-cutoff frequency ratio LTC1064-7 50:1 (pin 100:1 (pin When filter operates clock-to-cutoff frequency ratio 50:1, input double-sampled lower risk aliasing. LTC1064-7 pin-compatible with LTC1064-X series, LTC1164-7 LTC1264-7. APPLICATI Data Communication Filters Time Delay Networks Phase-Matched Filters TYPICAL APPLICATI 7.5V LTC1064-7 80kHz Linear Phase Lowpass Filter 1064-7 TA01 -7.5V 4MHz VOUT NOTE: POWER SUPPLIES SHOULD BYPASSED 0.1µF CAPACITOR CLOSE PACKAGE PRINTED CIRCUIT BOARD ASSEMBLY SHOULD MAINTAIN DISTANCE LEAST INCHES BETWEEN OUTPUT INPUT fCLK LINE. 1V/DIV 7.5V ±7.5V fCLK 4MHz RATIO 50:1 Diagram 1µs/DIV 1064-7 TA02 LTC1064-7 ABSOLUTE RATI Operating Temperature Range LTC1064-7C 40°C 85°C LTC1064-7M 55°C 125°C Lead Temperature (Soldering, sec). 300°C Total Supply Voltage 16.5V Power Dissipation. 400mW Burn-In Voltage 16.5V Voltage Input 0.3V) 0.3V) Storage Temperature Range 65°C 150°C PACKAGE/ORDER ATIO VIEW ORDER PART NUMBER LTC1064-7CN LTC1064-7CJ LTC1064-7MJ fCLK 50/100 VOUT PACKAGE 14-LEAD CERAMIC PACKAGE 14-LEAD PLASTIC TJMAX 150°C, 65°C/W TJMAX 110°C, 65°C/W ELECTRICAL CHARACTERISTICS PARAMETER Passband Gain Gain fCUTOFF (Note Gain 0.75 fCUTOFF (Note Gain fCUTOFF Gain fCUTOFF Gain with fCLK 20kHz Gain with fCLK 400kHz, ±2.375V Phase Factor Phase 180° (f/fC) (Note ±7.5V, 10k, 25°C, fCUTOFF 10kHz 20kHz, fCLK 1MHz, CMOS level (maximum clock rise fall time 1µs) gain measurements referenced passband gain, unless otherwise specified. CONDITIONS 0.1Hz 0.25 fCUTOFF fTEST 5kHz, (fCLK /fC) 50:1 fTEST 10kHz, (fCLK /fC) 50:1 fTEST 5kHz, (fCLK 100:1 fTEST 15kHz, (fCLK /fC) 50:1 fTEST 20kHz, (fCLK /fC) 50:1 fTEST 10kHz, (fCLK /fC) 100:1 fTEST 40kHz, (fCLK /fC) 50:1 fTEST 20kHz, (fCLK /fC) 100:1 fTEST 200Hz, (fCLK /fC) 100:1 fTEST 4kHz, (fCLK /fC) 50:1 fTEST 8kHz, (fCLK /fC) 50:1 0.1Hz fCUTOFF (fCLK /fC) 50:1 (fCLK /fC) 100:1 (fCLK /fC) 50:1 (fCLK /fC) 100:1 (fCLK /fC) 50:1 (fCLK /fC) 100:1 (fCLK /fC) 50:1 (fCLK /fC) 100:1 Phase Nonlinearity (Notes VIEW fCLK 50/100 PACKAGE 16-LEAD PLASTIC TJMAX 110°C, 85°C/W ORDER PART NUMBER LTC1064-7CS VOUT 0.10 0.35 0.35 -1.0 34.0 34.5 ±1.0 ±1.0 0.65 0.15 1.25 0.35 2.50 3.75 31.75 31.75 0.25 2.00 UNITS 0.60 0.90 1.30 4.50 5.75 36.5 37.0 LTC1064-7 ELECTRICAL CHARACTERISTICS ±7.5V, 10k, 25°C, fCUTOFF 10kHz 20kHz, fCLK 1MHz, CMOS level (maximum clock rise fall time 1µs) gain measurements referenced passband gain, unless otherwise specified. PARAMETER Group Delay /360)(1/ (Note Group Delay Deviation (Notes CONDITIONS (fCLK /fC) 50:1, fCUTOFF (fCLK /fC) 100:1, fCUTOFF (fCLK /fC) 50:1, fCUTOFF (fCLK /fC) 100:1, fCUTOFF (fCLK /fC) 50:1, fCUTOFF (fCLK /fC) 100:1, fCUTOFF (fCLK /fC) 50:1, fCUTOFF (fCLK /fC) 100:1, fCUTOFF (fCLK /fC) 50:1 (fCLK /fC) 100:1 (AGND ±7.5V 50:1 ±2.5V ±7.5V ±2.375V ±7.5V 50:1, 100:1, 50:1, 100:1, ±2.375V, 25°C ±5V, 25°C 58.6 115.0 59.7 117.0 59.7 117.0 ±1.0 ±1.0 60.7 119.0 ±2.0 ±2.0 Input Frequency Range (Table Maximum fCLK Clock Feedthrough fCLK) Wideband Noise (1Hz fCLK) Input Impedance Output Voltage Swing (Note Output Offset Output Offset TempCo Power Supply Current ±1.0 ±2.1 ±3.0 <fCLK <fCLK ±1.2 ±3.2 ±5.0 ±150 ±150 ±200 ±200 ±220 ±7.5V, 25°C Power Supply Range ±2.375 UNITS µVRMS µVRMS µVRMS µVRMS µV/°C µV/°C denotes specifications which apply over full operating temperature range. Note Input frequencies, linearly phase shifted through filter long fCLK 1MHz cutoff frequency. RATIO 50:1 Figure curve shows typical phase response LTC1064-7 operating fCLK 1MHz, ratio 50:1, 20kHz closely matches ideal straight line. phase shift described phase shift 180° (f/fC); arbitrarily called "phase factor" expressed degrees. phase factor allows calculation phase given frequency. Example: phase shift 14kHz LTC1064-7 shown Figure -180 phase shift 180° 430° (14kHz/20kHz) nonlinearity -121° -121° 1.20°. -270 Note Group delay group delay deviation calculated from measured phase -360 factor phase deviation specifications. Note Phase deviation group delay deviation LTC1064-7MJ ±4%. FREQUENCY (kHz) 1164-7 Note filter cutoff frequency abbreviated fCUTOFF Note swing typically 11VP-P, 7VP-P, 2.8VP-P, with ±7.5V, ±5V, ±2.5V Figure Phase Response Passband (Note Supply respectively. more information refer Noise Input graphs. PHASE (DEG) LTC1064-7 TYPICAL PERFOR CHARACTERISTICS Gain Frequency GAIN (dB) 100:1 PHASE FACTOR PHASE FACTOR -100 -110 fCLK 1MHz 25°C FREQUENCY (kHz) 1064-7 Phase Factor fCLK (Min Representative Units) 25°C (fCLK /fC) 50:1 PHASE FACTOR PHASE FACTOR fCLK (MHz) Passband Gain Phase fCLK 1MHz (fCLK /fC) 50:1 GAIN -120 PHASE -180 -240 -300 -360 FREQUENCY (kHz) 1064-7 GAIN (dB) GAIN (dB) 50:1 Phase Factor fCLK (Typical Unit) fCLK (MHz) 25°C (fCLK /fC) 50:1 70°C Phase Factor fCLK (Typical Unit) (fCLK /fC) 100:1 70°C 25°C fCLK (MHz) 1064-7 1064-7 Phase Factor fCLK (Min Representative Units) 25°C PINS (fCLK /fC) 50:1 fCLK (MHz) 1064-7 1064-7 Passband Gain Phase GAIN PHASE -120 -180 -240 -300 -360 FREQUENCY (kHz) 1064-7 fCLK 2MHz (fCLK /fC) 100:1 PHASE (DEG) PHASE (DEG) LTC1064-7 TYPICAL PERFOR CHARACTERISTICS Passband Gain Frequency fCLK ±7.5V 25°C (fCLK /fC) 50:1 fCLK 1MHz fCLK 2MHz fCLK 3MHz fCLK 4MHz fCLK 5MHz ±7.5V (fCLK /fC) 50:1 fCLK 1MHz fCLK 2MHz fCLK 3MHz fCLK 4MHz fCLK 5MHz GAIN (dB) GAIN (dB) GAIN (dB) FREQUENCY (kHz) 1000 1064-7 Passband Gain Frequency fCLK SINGLE 25°C (fCLK /fC) 50:1 fCLK 0.5MHz fCLK 1.0MHz fCLK 1.5MHz fCLK 2.0MHz DELAY (µs) GAIN (dB) FREQUENCY (kHz) 1064-7 GAIN (dB) Delay Frequency fCLK 25°C (fCLK /fC) 100:1 NOISE (dB) DELAY (µs) fCLK 0.5MHz fCLK 1.5MHz fCLK 2.5MHz fCLK 3.5MHz NOISE (dB) FREQUENCY (kHz) 1064-7 Passband Gain Frequency fCLK 85°C FREQUENCY (kHz) 1000 1064-7 Passband Gain Frequency fCLK 85°C (fCLK /fC) 50:1 fCLK 0.5MHz fCLK 1.5MHz fCLK 2.5MHz fCLK 3.5MHz FREQUENCY (kHz) 1064-7 Passband Gain Frequency fCLK 85°C SINGLE (fCLK /fC) 50:1 fCLK 0.5MHz fCLK 1.0MHz fCLK 1.5MHz fCLK 2.0MHz Delay Frequency fCLK 25°C (fCLK /fC) 50:1 fCLK 0.5MHz fCLK 1.5MHz fCLK 2.5MHz fCLK 3.5MHz FREQUENCY (kHz) 1064-7 FREQUENCY (kHz) 1064-7 Noise Frequency FREQUENCY (kHz) 1064-7 Noise Frequency ±7.5V 1VRMS fCLK 2.5MHz (fCLK /fC) 50:1 (100k RESISTOR ±7.5V 2VRMS fCLK 1MHz (fCLK /fC) 50:1 (100k RESISTOR FREQUENCY (kHz) 1064-7 LTC1064-7 TYPICAL PERFOR CHARACTERISTICS Noise Frequency NOISE (dB) NOISE (dB) NOISE (dB) 1VRMS fCLK 1MHz (fCLK /fC) 50:1 (100k RESISTOR FREQUENCY (kHz) Noise Input 1kHz fCLK 1MHz (fCLK /fC) 50:1 (100k ±7.5V NOISE (dB) NOISE (dB) INPUT (VRMS) 1064-7 NOISE (dB) Noise Input SINGLE 1kHz fCLK 500kHz (fCLK /fC) 100:1 PHASE DIFFERENCE (DEG) POWER SUPPLY CURRENT (mA) NOISE (dB) PINS PINS 2.5V INPUT (VRMS) 1064-7 1064-7 Noise Frequency FREQUENCY (kHz) 1064-7 Noise Frequency SINGLE 0.5VRMS fCLK 500kHz (fCLK /fC) 100:1 (PINS SINGLE 0.5VRMS fCLK 1MHz (fCLK /fC) 50:1 (PINS FREQUENCY (kHz) 1064-7 Noise Input 1kHz fCLK 2MHz (fCLK /fC) 100:1 ±7.5V Noise Input SINGLE 1kHz fCLK 1MHz (fCLK /fC) 50:1 PINS PINS 2.5V INPUT (VRMS) 1064-7 INPUT (VRMS) 1064-7 Phase Matching Frequency PHASE DIFFERENCE BETWEEN UNITS (SAMPLE REPRESENTATIVE UNITS) fCLK 2.5MHz (fCLK /fC) 50:1 100:1 70°C Power Supply Current Power Supply Voltage fCLK 1MHz -55°C 25°C 125°C FREQUENCY (fCUTOFF /FREQUENCY) TOTAL POWER SUPPLY VOLTAGE 1064-7 1064-7 LTC1064-7 TYPICAL PERFOR CHARACTERISTICS Table Passband Gain Phase ±7.5V, (fCLK 50:1, 25°C FREQUENCY (kHz) fCLK 1MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 fCLK 2MHz (Typical Unit) 0.000 10.000 20.000 30.000 40.000 fCLK 3MHz (Typical Unit) 0.000 15.000 30.000 45.000 60.000 fCLK 4MHz (Typical Unit) 0.000 20.000 40.000 60.000 80.000 fCLK 5MHz (Typical Unit) 0.000 25.000 50.000 75.000 100.000 GAIN (dB) 0.086 0.086 0.334 1.051 3.316 0.131 0.131 0.442 1.108 3.115 0.156 0.156 0.459 0.941 2.508 0.121 0.121 0.292 0.476 1.539 0.045 0.045 0.006 0.185 0.356 PHASE (DEG) 180.00 73.54 -33.60 -140.81 249.30 180.00 72.88 34.71 -141.99 250.45 180.00 72.54 35.01 141.95 250.53 180.00 72.12 35.75 142.92 252.63 180.00 70.85 38.25 146.77 259.27 FREQUENCY (kHz) fCLK 4MHz (Typical Unit) 0.000 10.000 20.000 30.000 40.000 fCLK 5MHz (Typical Unit) 0.000 12.500 25.000 37.500 50.000 GAIN (dB) 0.116 0.116 0.436 1.171 3.353 0.097 0.097 0.351 0.951 2.999 PHASE (DEG) 180.00 72.49 35.21 142.33 250.12 180.00 71.00 38.08 146.51 256.13 Table Passband Gain Phase ±7.5V, (fCLK 100:1, 25°C FREQUENCY (kHz) fCLK 1MHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 fCLK 2MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 fCLK 3MHz (Typical Unit) 0.000 7.500 15.000 22.500 30.000 GAIN (dB) 0.203 0.203 0.741 1.831 4.451 0.152 0.152 0.575 1.501 3.973 0.123 0.123 0.481 1.312 3.654 PHASE (DEG) 180.00 74.07 31.71 136.47 240.17 180.00 73.79 32.47 138.11 243.84 180.00 73.32 33.64 140.14 247.11 Table Passband Gain Phase ±5V, (fCLK 50:1, 25°C FREQUENCY (kHz) fCLK 0.5MHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 fCLK 1MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 fCLK 1.5MHz (Typical Unit) 0.000 7.500 15.000 22.500 30.000 fCLK 2MHz (Typical Unit) 0.000 10.000 20.000 30.000 40.000 fCLK 2.5MHz (Typical Unit) 0.000 12.500 25.000 37.500 50.000 fCLK 3MHz (Typical Unit) 0.000 15.000 30.000 45.000 60.000 GAIN (dB) 0.081 0.081 0.345 1.063 3.283 0.071 0.071 0.322 1.036 3.284 0.095 0.095 0.392 1.075 3.155 0.127 0.127 0.447 1.041 2.856 0.126 0.126 0.411 0.864 2.397 0.102 0.102 0.292 0.546 1.769 PHASE (DEG) 180.00 73.71 33.31 140.36 248.52 180.00 73.44 33.83 141.13 249.68 180.00 73.03 34.53 141.89 250.45 180.00 72.81 34.70 141.77 250.24 180.00 72.61 34.91 141.88 250.62 180.00 72.23 35.64 142.96 252.73 LTC1064-7 TYPICAL PERFOR CHARACTERISTICS Table Passband Gain Phase ±5V, (fCLK 50:1, 25°C FREQUENCY (kHz) fCLK 3.5MHz (Typical Unit) 0.000 17.500 35.000 52.500 70.000 GAIN (dB) 0.054 0.054 0.108 0.137 1.104 PHASE (DEG) 180.00 71.07 38.00 146.68 258.97 Table Passband Gain Phase ±5V, (fCLK 100:1, 25°C FREQUENCY (kHz) fCLK 0.5MHz (Typical Unit) 0.000 1.250 2.500 3.750 5.000 fCLK 1MHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 fCLK 1.5MHz (Typical Unit) 0.000 3.750 7.500 11.250 15.000 fCLK 2MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 fCLK 2.5MHz (Typical Unit) 0.000 6.250 12.500 18.750 25.000 fCLK 3MHz (Typical Unit) 0.000 7.500 15.000 22.500 30.000 fCLK 3.5MHzMHz (Typical Unit) 0.000 8.750 17.500 26.250 35.000 GAIN (dB) 0.186 0.186 0.726 1.805 4.402 0.184 0.184 0.712 1.785 4.387 0.145 0.145 0.596 1.556 4.047 0.116 0.116 0.494 1.361 3.761 0.101 0.101 0.452 1.273 3.611 0.105 0.105 0.445 1.228 3.509 0.104 0.104 0.437 1.188 3.478 PHASE (DEG) 180.00 74.10 31.65 136.48 240.33 180.00 74.02 31.80 136.61 240.43 180.00 73.84 32.32 137.73 242.95 180.00 73.64 32.93 139.03 245.57 180.00 73.17 33.93 140.58 247.80 180.00 72.36 35.47 142.70 250.58 180.00 70.81 38.39 146.85 256.10 Table Passband Gain Phase Single (fCLK /fC) 50:1, 25°C FREQUENCY (kHz) fCLK 0.5MHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 fCLK 1MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 fCLK 1.5MHz (Typical Unit) 0.000 7.500 15.000 22.500 30.000 fCLK 2MHz (Typical Unit) 0.000 10.000 20.000 30.000 40.000 GAIN (dB) 0.134 0.134 0.391 1.109 3.351 0.148 0.148 0.423 1.111 3.241 0.157 0.157 0.456 0.981 2.687 0.188 0.188 0.304 0.513 1.824 PHASE (DEG) 180.00 73.52 33.67 140.92 249.32 180.00 73.07 34.63 142.25 251.03 180.00 72.73 34.83 142.08 251.09 180.00 71.37 37.52 146.11 257.46 Table Passband Gain Phase Single (fCLK /fC) 100:1, 25°C FREQUENCY (kHz) fCLK 0.5MHz (Typical Unit) 0.000 1.250 2.500 3.750 5.000 fCLK 1MHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 fCLK 1.5MHz (Typical Unit) 0.000 3.750 7.500 11.250 15.000 fCLK 2MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 GAIN (dB) 0.243 0.243 0.776 1.861 4.483 0.208 0.208 0.678 1.679 4.221 0.115 0.115 0.473 1.314 3.715 0.209 0.209 0.499 1.281 3.695 PHASE (DEG) 180.00 73.91 31.98 136.98 240.90 180.00 73.76 32.47 137.87 242.65 180.00 73.26 33.73 140.40 247.66 180.00 71.18 37.85 146.27 255.38 LTC1064-7 CTIO Power Supply Pins (pin (pin should bypassed with 0.1µF capacitor adequate analog ground. filter's power supplies should isolated from other digital high voltage analog supplies. noise linear supply recommended. Using switching power supply will lower signal-to-noise ratio filter. supply during power-up should have slew rate less than 1V/µs. When applied before allowed above ground, signal diode should clamp prevent latch-up. Figures show typical connections dual single supply operation. 0.1µF LTC1064-7 DIGITAL SUPPLY CLOCK SOURCE 0.1µF Figure Dual Supply Operation fCLK/fCUTOFF 50:1 0.1µF LTC1064-7 VOUT 1064-7 Figure Single Supply Operation fCLK/fCUTOFF 50:1 Clock Input (11) CMOS clock source with square-wave output duty cycle (±10%) adequate clock source device. power supply clock source should filter's power supply. analog ground filter should connected clock's ground single point only. Table shows clock's high level threshold values dual single supply operation. pulse generator used clock source provided high level time greater than 0.1µs. Sine waves recommended clock input frequencies less than 100kHz, since excessively slow clock rise fall times generate internal clock jitter (maximum clock rise fall time 1µs). clock signal should routed from right side package perpendicular avoid coupling input output analog signal path. resistor between clock source will slow down rise fall times clock further reduce charge coupling (Figures Table Clock Source High Threshold Levels POWER SUPPLY Dual Supply ±7.5V Dual Supply Dual Supply 2.5V Single Supply Single Suppl HIGH LEVEL 2.18V 1.45V 0.73V 7.80V 1.45V LEVEL 0.5V 0.5V 2.0V 6.5V 0.5V VOUT 1064-7 Analog Ground Pins filter performance depends quality analog signal ground. either dual single supply operation, analog ground plane surrounding package recommended. analog ground plane should connected digital ground single point. dual supply operation, should connected analog ground plane. single supply operation should biased supply should bypassed analog ground plane with least capacitor (Figure single operation highest fCLK 2MHz, should biased This minimizes passband gain phase variations. Ratio Input (10) level this determines ratio clock frequency cutoff frequency filter. gives 50:1 ratio gives 100:1 ratio. single supply operation ratio 50:1 when 100:1 when ground. When tied ground, should bypassed analog ground DIGITAL SUPPLY CLOCK SOURCE LTC1064-7 CTIO with 0.1µF capacitor. level switched mechanically electrically slew rates greater than 1V/µs while device operating, resistor should connected between source. Filter Input input connected internally through resistor tied inverting input amp. Filter Output Pins specified output filter; typically source sink 1mA. Driving coaxial cables resistive loads less than will degrade total harmonic distortion filter. When evaluating device's distortion output buffer required. noninverting buffer, Figure used provided that input common-mode range well within filter's output swing. intermediate filter output providing unspecified order lowpass filter. should loaded. External Connection Pins Pins should connected together. printed circuit board connection should done under package through short trace surrounded analog ground plane. Pins Pins connected internal circuit point device should preferably tied analog ground. Figure Buffer Filter Output APPLICATI ATIO Clock Feedthrough Clock feedthrough defined value clock frequency harmonics that present filter's output (9). clock feedthrough tested with input grounded depends board layout value power supplies. With proper layout techniques values clock feedthrough shown Table Table Clock Feedthrough Single ±7.5V 50:1 90µVRMS 100µVRMS 120µVRMS 100:1 100µVRMS 300µVRMS 650µVRMS amplitude strongly depends scope probing techniques well grounding power supply bypassing. clock feedthrough, bothersome, greatly reduced adding simple lowpass network output filter (9). This will completely eliminate switching transients. Wideband Noise wideband noise filter total value device's noise spectral density used determine operating signal-to-noise ratio. Most frequency contents within filter passband cannot reduced with post filtering. instance, LTC1064-7 wideband noise supply 105µVRMS, 95µVRMS which have frequency contents from filter's cutoff frequency. total wideband noise (µVRMS) nearly independent value clock. clock feedthrough specifications part wideband noise. Note: clock feedthrough single imbedded wideband noise filter. Clock waveform square wave. parasitic switching transients during rise fall edges incoming clock part clock feedthrough specifications. Switching transients have frequency contents much higher than applied clock; their LT1220 1064-7 LTC1064-7 APPLICATI ATIO Speed Limitations avoid slew rate limiting maximum clock frequencies, signal amplitude should kept below specified level shown Table 2V/DIV Table Maximum Clock POWER SUPPLY ±7.5V MAXIMUM fCLK 5.0MHz 4.5MHz 4.0MHz 3.5MHz 3.5MHz 3.0MHz 2.0MHz MAXIMUM 1.8VRMS (fIN 80kHz) 2.3VRMS (fIN 80kHz) 2.7VRMS (fIN 80kHz) 1.4VRMS (fIN 500kHz) 1.6VRMS (fIN 80kHz) 0.7VRMS (fIN 400kHz) 0.5VRMS (fIN 250kHz) Single Table Transient Response Lowpass Filters DELAY RISE SETTLING TIME* TIME** TIME*** LOWPASS FILTER (SEC) (SEC) (SEC) LTC1064-3 Bessel 0.50/fC 0.34/fC 0.80/fC LTC1164-5 Bessel 0.43/fC 0.34/fC 0.85/fC LTC1164-6 Bessel 0.43/fC 0.34/fC 1.15/fC LTC1264-7 Linear Phase 1.15/fC 0.36/fC 2.05/fC LTC1164-7 Linear Phase 1.20/fC 0.39/fC 2.2/fC LTC1064-7 Linear Phase 1.20/fC 0.39/fC 2.2/fC LTC1164-5 Butterworth 0.80/fC 0.48/fC 2.4/fC LTC1164-6 Elliptic 0.85/fC 0.54/fC 4.3/fC LTC1064-4 Elliptic 0.90/fC 0.54/fC 4.5/fC LTC1064-1 Elliptic 0.85/fC 0.54/fC 6.5/fC ±5%, ±5%, ±0.5% OVERSHOOT INPUT OUTPUT Table Aliasing (fCLK 100kHz) INPUT FREQUENCY (VIN 1VRMS, fCLK fOUT) (kHz) 50:1, fCUTOFF 2kHz 210) 205) 204) 203) 202) 199.5 200.5) 100:1, fCUTOFF 1kHz 103) 97.5 102.5) 102) 98.5 101.5) 101) 99.5 100.5) OUTPUT LEVEL (Relative Input, 1VRMS) (dB) -76.1 51.9 36.3 18.4 -74.2 53.2 36.9 19.6 OUTPUT FREQUENCY (Aliased Frequency fOUT [fCLK fIN]) (kHz) 10.0 Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights. Transient Response 50µs/DIV ±7.5V, 2kHz fCLK 1MHz, RATIO 50:1 1064-7 Figure RISE TIME (tr) 0.39 fCUTOFF SETTLING TIME (ts) OUTPUT) CUTOFF DELAY TIME (td) GROUP DELAY fCUTOFF OUTPUT) 1064-7 Figure Aliasing Aliasing inherent phenomenon sampled data systems occurs when input frequencies close sampling frequency applied. LTC1064-7 case 100:1, input signal whose frequency range fCLK ±3%, will aliased back into filter's passband. instance, LTC1064-7 operating with 100kHz clock 1kHz cutoff frequency receives 98kHz, 10mV input signal, 2kHz, 143µVRMS alias signal will appear output. When LTC1064-7 operates with clock-tocutoff frequency 50:1, aliasing occurs twice clock frequency. Table shows details. LTC1064-7 PACKAGE DESCRIPTIO 0.290 0.320 (7.366 8.128) 0.008 0.018 (0.203 0.460) 0.385 0.025 (9.779 0.635) 0.038 0.068 (0.965 1.727) 0.014 0.026 (0.360 0.660) 0.300 0.325 (7.620 8.255) 0.015 (0.380) 0.130 0.005 (3.302 0.127) 0.009 0.015 (0.229 0.381) +0.025 0.325 -0.015 +0.635 8.255 -0.381 0.075 0.015 (1.905 0.381) 0.291 0.299 (7.391 7.595) 0.005 (0.127) 0.010 0.029 (0.254 0.737) NOTE 0.009 0.013 (0.229 0.330) 0.050 (1.270) 0.004 0.012 (0.102 0.305) 0.394 0.419 (10.007 10.643) NOTE 0.016 0.050 (0.406 1.270) NOTE: IDENT, NOTCH CAVITIES BOTTOM PACKAGES MANUFACTURING OPTIONS. PART SUPPLIED WITH WITHOUT OPTIONS. Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, 95035-7487 (408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977 Dimensions inches (millimeters) unless otherwise noted. Package 14-Lead Ceramic 0.785 (19.939) 0.200 (5.080) 0.015 0.060 (0.381 1.524) 0.005 (0.127) 0.025 (0.635) 0.220 0.310 (5.588 7.874) 0.100 0.010 (2.540 0.254) 0.125 (3.175) 0.098 (2.489) 0392 Package 14-Lead Plastic 0.065 (1.651) 0.770 (19.558) 0.045 0.065 (1.143 1.651) 0.260 0.010 (6.604 0.254) 0.018 0.003 (0.457 0.076) 0.100 0.010 (2.540 0.254) 0.125 (3.175) 0392 Package 16-Lead Plastic 0.398 0.413 (10.109 10.490) 0.093 0.104 (2.362 2.642) 0.037 0.045 (0.940 1.143) 0.014 0.019 (0.356 0.482) SOL16 0392 LT/GP 1292 LINEAR TECHNOLOGY CORPORATION 1992 Other recent searchesSN74ABTH18504A - SN74ABTH18504A SN74ABTH18504A Datasheet SN74ABTH182504A - SN74ABTH182504A SN74ABTH182504A Datasheet SN54ABTH18504A - SN54ABTH18504A SN54ABTH18504A Datasheet SN54ABTH182504A - SN54ABTH182504A SN54ABTH182504A Datasheet PIC16F873A - PIC16F873A PIC16F873A Datasheet PIC16F874A - PIC16F874A PIC16F874A Datasheet PIC16F87XA - PIC16F87XA PIC16F87XA Datasheet PD161623 - PD161623 PD161623 Datasheet OD-24F2 - OD-24F2 OD-24F2 Datasheet LAN9117 - LAN9117 LAN9117 Datasheet DIP05-1A72-12MHR - DIP05-1A72-12MHR DIP05-1A72-12MHR Datasheet DIP05-1A66-12MHR - DIP05-1A66-12MHR DIP05-1A66-12MHR Datasheet AN1084 - AN1084 AN1084 Datasheet
Privacy Policy | Disclaimer |