128K CMOS SRAM (Center power ground) Features Industrial commerci

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AS7C1025B
128K CMOS SRAM (Center power ground) Features
Industrial commercial temperatures Organization: 131,072 bits High speed 10/12/15/20 address access time 5/6/7/8 output enable access time power consumption: ACTIVE 605mW power consumption: STANDBY CMOS 0.18 CMOS technology Easy memory expansion with inputs Center power ground TTL/LVTTL-compatible, three-state JEDEC-standard packages 32-pin, 32-pin, protection 2000 volts Latch-up current
arrangement
Logic block diagram
32-pin (300 mil) 32-pin (400 mil) Input buffer I/O7
I/O0 I/O1 I/O2 I/O3 I/O7 I/O6 I/O5 I/O4
decoder
Array (1,048,576)
Sense
I/O0
Column decoder
Control circuit
Selection guide
Maximum address access time Maximum output enable access time Maximum operating current Maximum CMOS standby current Unit
3/26/04,
Alliance Semiconductor
AS7C1025B
Copyright Alliance Semiconductor. rights reserved.
AS7C1025B
Functional description
AS7C1025B high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized 131,072 bits. They designed memory applications where fast data access, power, simple interfacing desired. Equal address access cycle times (tAA, tRC, tWC) 10/12/15/20 with output enable access times (tOE) 5/6/7/8 ideal highperformance applications. chip enable input permits easy memory expansion with multiple-bank memory systems. When high, device enters standby mode. inputs still toggling, device will consume power. static, then full standby power reached (ISB1). example, AS7C1026B guaranteed exceed under nominal full standby conditions. write cycle accomplished asserting write enable (WE) chip enable (CE). Data input pins I/O0 through I/O7 written rising edge (write cycle (write cycle avoid contention, external devices should drive pins only after outputs have been disabled with output enable (OE) write enable (WE). read cycle accomplished asserting output enable (OE) chip enable (CE), with write enable (WE) high. chips drive pins with data word referenced input address. When either chip enable output enable inactive write enable active, output drivers stay high-impedance mode. chip inputs outputs TTL-compatible, operation from single supply. AS7C1025B packaged common industry standard packages.
Absolute maximum ratings
Parameter Voltage relative Voltage relative Power dissipation Storage temperature (plastic) Ambient temperature with applied current into outputs (low) Symbol Tstg Tbias IOUT -0.50 -0.50 +7.0 +150 +125 Unit
NOTE: Stresses greater than those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only functional operation device these other conditions outside those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
Truth table
Data High High DOUT Mode Standby (ISB, ISB1) Output disable (ICC) Read (ICC) Write (ICC)
Key: don't care, low, high.
3/26/04,
Alliance Semiconductor
AS7C1025B
Recommended operating conditions
Parameter Supply voltage Input voltage Ambient operating temperature -1.0V pulse width less than VCC+2.0V pulse width less than 5ns. commercial industrial Symbol -0.5 Nominal Unit
operating characteristics (over operating range)1
Parameter
Input leakage current Output leakage current Operating power supply current Standby power supply current1
Symbol
Test conditions
Max, Max, VIH, Vout VIL, fMax, IOUT VIH, fMax VCC-0.2 -0.2
Unit
ISB1
Output voltage
Capacitance MHz, NOMINAL)2
Parameter Input capacitance capacitance Symbol CI/O Signals Test conditions VOUT Unit
3/26/04,
Alliance Semiconductor
AS7C1025B
Read cycle (over operating range)3,9
Parameter Read cycle time Address access time Chip enable (CE) access time Output enable (OE) access time Output hold from address change output output high output high output high Power time Power down time Symbol tACE tCLZ tCHZ tOLZ tOHZ Unit Notes
switching waveforms
Rising input Falling input Undefined/don't care
Read waveform (address controlled)3,6,7,9
Address DOUT Data valid
Read waveform controlled)3,6,8,9
DOUT Supply current tACE tCLZ Data valid tOLZ tOHZ tCHZ tRC1
3/26/04,
Alliance Semiconductor
AS7C1025B
Write cycle (over operating range)11
Parameter Write cycle time Chip enable (CE) write Address setup write Address setup time Write pulse width Write recovery time Address hold from write Data valid write Data hold time Write enable output high Output active from write Symbol Unit Notes
Write waveform controlled)10,11
Address DOUT Data valid
3/26/04,
Alliance Semiconductor
AS7C1025B
Write waveform controlled)10,11
Address DOUT Data valid
test conditions
Output load: Figure Input pulse level: Figure Input rise fall times: Figure Input output timing reference levels:
Thevenin equivalent:
+3.5
DOUT
DOUT
+1.728
Figure Input pulse
Figure Output load
Notes
During power-up, pull-up resistor required meet specification. This parameter sampled, 100% tested. test conditions, Test Conditions, Figures tCLZ tCHZ specified with Figure Transition measured ±500 from steady-state voltage. This parameter guaranteed, 100% tested. high read cycle. read cycle. Address valid prior coincident with transition low. read cycle timings referenced from last valid address first transitioning address. write cycle timings referenced from last valid address first transitioning address. N/A. except high parameters where
3/26/04,
Alliance Semiconductor
AS7C1025B
Package dimensions
32-pin Symbol
32-pin mil/400
32-pin 0.132 0.025 0.105 0.026 0.015 0.007 0.820 0.354 0.395 0.435 0.146 0.115 0.032 0.020 0.013 0.830 0.378 0.405 0.445
0.128 0.025 0.095 0.026 0.016 0.007 0.820 0.255 0.295 0.330
0.145 0.105 0.032 0.020 0.010 0.830 0.275 0.305 0.340
Seating plane
0.050
0.050
3/26/04,
Alliance Semiconductor
AS7C1025B
Ordering Codes
Package Access time Temperature
300-mil Commercial Industrial 400-mil Commercial Industrial
AS7C1025B-10TJC AS7C1025B-10TJI AS7C1025B-10JC AS7C1025B-10JI
AS7C1025B-12TJC AS7C1025B-12TJI AS7C1025B-12JC AS7C1025B-12JI
AS7C1025B-15TJC AS7C1025B-15TJI AS7C1025B-15JC AS7C1025B-15JI
AS7C1025B-20TJC AS7C1025B-20TJI AS7C1025B-20JC AS7C1025B-20JI
Note: suffix above part number LEAD FREE parts. AS7C1025B-10TJCN)
Part numbering system
AS7C SRAM prefix 1025B Package: Temperature range commercial, industrial, -40° LEAD FREE PART
Device number Access time
3/26/04,
Alliance Semiconductor
AS7C1025B
Alliance Semiconductor Corporation 2575, Augustine Drive, Santa Clara, 95054 Tel: 4900 Fax: 4999 www.alsc.com
Copyright Alliance Semiconductor Rights Reserved Part Number: AS7C1025B Document Version:
Copyright 2003 Alliance Semiconductor Corporation. rights reserved. three-point logo, name Intelliwatt trademarks registered trademarks Alliance. other brand product names trademarks their respective companies. Alliance reserves right make changes this document products time without notice. Alliance assumes responsibility errors that appear this document. data contained herein represents Alliance's best data and/or estimates time issuance. Alliance reserves right change correct this data time, without notice. product described herein under development, significant changes these specifications possible. information this product data sheet intended general descriptive information potential customers users, intended operate provide, guarantee warrantee user customer. Alliance does assume responsibility liability arising application product described herein, disclaims express implied warranties related sale and/or Alliance products including liability warranties related fitness particular purpose, merchantability, infringement intellectual property rights, except express agreed Alliance's Terms Conditions Sale (which available from Alliance). sales Alliance products made exclusively according Alliance's Terms Conditions Sale. purchase products from Alliance does convey license under patent rights, copyrights; mask works rights, trademarks, other intellectual property rights Alliance third parties. Alliance does authorize products critical components life-supporting systems where malfunction failure reasonably expected result significant injury user, inclusion Alliance products such life-supporting systems implies that manufacturer assumes risk such agrees indemnify Alliance against claims arising from such use.

128K CMOS SRAM (Center power ground) Features Industrial commerci

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