1024 (8K), 2048 (16K) Two-wire Serial Interface Schmitt Trigger, Filte
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Low-voltage Standard-voltage Operation, 2.7V-5.5V Internally Organized (1K), (2K), (4K),
1024 (8K), 2048 (16K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs Noise Suppression Bidirectional Data Transfer Protocol Compatibility 8-byte Page (1K, 2K), 16-byte Page (4K, 16K) Write Modes Partial Page Writes Allowed Self-timed Write Cycle max) High Reliability Endurance: Million Write Cycles Data Retention: Years Protection: >3000V
AT24C01A/02SC/04SC/08SC/16SC provide 1024/2048/4096/8192/16384 bits serial, electrically-erasable, programmable read-only memory (EEPROM) organized 128/256/512/1024/2048 words bits each. devices optimized smart card applications where low-power low-voltage operation essential. devices available several standard 7816 smart card modules (see Ordering Information, pages 12-13). devices functionally equivalent Atmel serial EEPROM products offered standard packages (PDIP, SOIC, TSSOP, MAP), with exception slave address write protect functions, which required smart card applications. Table Configuration
Name Description Power Supply Voltage Ground Serial Clock Input Serial Data Input/Output Connect Module Contact
Two-wire Serial EEPROM Smart Card Modules (128 (256 (512 (1024 (2048 AT24C01ASC AT24C02SC AT24C04SC AT24C08SC AT24C16SC
Figure Card Module Contact
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Absolute Maximum Ratings
Operating Temperature.-55°C +125°C Storage Temperature .-65°C +150°C Voltage with Respect Ground -1.0V +7.0V Maximum Operating Voltage 6.25V Output Current. *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
Figure Block Diagram
SERIAL CLOCK (SCL): input used positive edge clock data into each EEPROM device negative edge clock data each device. SERIAL DATA (SDA): bidirectional serial data transfer. This open-drain driven wire-ORed with number other open-drain opencollector devices.
Memory Organization
AT24C01ASC, SERIAL EEPROM: Internally organized with pages bytes each, requires 7-bit data word address random word addressing. AT24C02SC, SERIAL EEPROM: Internally organized with pages bytes each, requires 8-bit data word address random word addressing.
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
AT24C04SC, SERIAL EEPROM: Internally organized with pages bytes each, requires 9-bit data word address random word addressing. AT24C08SC, SERIAL EEPROM: Internally organized with pages bytes each, requires 10-bit data word address random word addressing. AT24C16SC, SERIAL EEPROM: Internally organized with pages bytes each, requires 11-bit data word address random word addressing.
Capacitance
Table Capacitance Applicable over recommended operating range from 25°C, MHz, +2.7V
Symbol CI/O Note: Test Condition Input/Output Capacitance (SDA) Input Capacitance (SCL) This parameter characterized 100% tested. Units Conditions VI/O
Characteristics
Table Characteristics
Symbol ISB1 ISB2 Notes: Parameter Supply Voltage Supply Current 5.0V Supply Current 5.0V Standby Current 2.7V Standby Current 5.0V Input Leakage Current Output Leakage Current Input Level
Test Condition
Units
READ WRITE VOUT -0.6
0.10 0.05
18.0
Input High Level
Output Level 3.0V
Applicable over recommended operating range from: +70°C, +2.7V +5.5V (unless otherwise noted) reference only tested.
Characteristics
Table Characteristics(1)
Symbol fSCL tLOW tHIGH tBUF Parameter Clock Frequency, Clock Pulse Width Clock Pulse Width High Noise Suppression Time
Units
Clock Data Valid Time must free before transmission start(1)
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Table Characteristics(1) (Continued)
Symbol tHD.STA tSU.STA tHD.DAT tSU.DAT tSU.STO Endurance(1) Note: Parameter Start Hold Time Start Setup Time Data Hold Time Data Setup Time Inputs Rise Time Inputs Fall Time
Units
Write Cycles
Stop Setup Time Data Hold Time Write Cycle Time 5.0V, 25°C, Byte Mode
Applicable over recommended operating range from +70°C, +2.7V +5.5V, Gate (unless otherwise noted) This parameter characterized 100% tested.
Device Operation
CLOCK DATA TRANSITIONS: normally pulled high with external device. Data change only during SCL-low time periods (see Figure page Data changes during SCL-high periods will indicate start stop condition defined below. START CONDITION: high-to-low transition with high start condition that must precede other command (see Figure page STOP CONDITION: low-to-high transition with high stop condition. After read sequence, Stop command will place EEPROM standby power mode (see Figure page ACKNOWLEDGE: addresses data words serially transmitted from EEPROM 8-bit words. Each word requires receiver acknowledge that received valid command data byte. During transmission commands from host EEPROM, EEPROM will send zero host acknowledge that received valid command byte. This occurs ninth clock cycle command byte. During read operations, host will send zero EEPROM acknowledge that received valid data byte that requests next sequential data byte transmitted during subsequent eight clock cycles. This occurs ninth clock cycle data byte. host does transmit this acknowledge bit, EEPROM will disable read operation return standby mode. STANDBY MODE: AT24C01ASC/02SC/04SC/08SC/16SC feature low-power standby mode that enabled upon power-up after receipt stop completion internal operations. MEMORY RESET: After interruption protocol, power loss, system reset, two-wire part reset following these steps: Clock cycles. Look high each cycle while high. Create start condition high.
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
Timing Diagrams
Timing
Figure Timing
Note:
SCL: Serial Clock, SDA: Serial Data
Write Cycle Timing
Figure Write Cycle Timing
tWR(1)
Notes:
write cycle time time from valid stop condition write sequence internal clear/write cycle. SCL: Serial Clock, SDA: Serial Data
Data Validity
Figure Data Validity
DATA STABLE
DATA STABLE
DATA CHANGE
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Start Stop Definition
Figure Start Stop Definition
START
STOP
Output Acknowledge
Figure Output Acknowledge
DATA
DATA
START
ACKNOWLEDGE
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
Device Addressing
EEPROM devices require 8-bit device address word following start condition enable chip read write operation (see Figure page device address word consists mandatory "1", "0", "1", sequence first four most significant bits shown. This common serial EEPROM devices. next three bits device address word most significant data word address bits AT24C16SC (16K), which requires total address bits. AT24C08SC (8K) requires only total word address bits. most significant bits included device address word. unused device address word should "0". AT24C04SC (4K) requires only nine total data word address bits. most significant included device address word. unused bits devic addr word hould "0". AT24C 02SC (2K) AT24C01ASC (1K) require address bits device address word. three unused bits device address word should "0". eighth device address read/write operation select bit. read operation initiated this high, write operation initiated this low. Upon compare device address, EEPROM will output (ACK). successful compare made, chip will return standby state ACK). Figure Device Address
1K/2K
Note:
Data word address bits
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Write Operations
BYTE WRITE: write operation requires 8-bit data word address following device address word acknowledgment. Upon receipt this address, EEPROM will again respond with (ACK) then clock first 8-bit data word. Following receipt 8-bit data word, EEPROM will output (ACK) addressing device, such microcontroller, must terminate write sequence with stop condition. this time EEPROM enters internally-timed write cycle, nonvolatile memory. inputs disabled during this write cycle EEPROM will respond until write complete (refer Figure Figure Byte Write
WORD ADDRESS
DATA
PAGE WRITE: 1K/2K EEPROM capable 8-byte page write, devices capable 16-byte page writes. page write initiated same byte write, microcontroller does send stop condition after first data word clocked Instead, after EEPROM acknowledges receipt first data word, microcontroller transmit (1K/2K) (4K, 16K) more data words. EEPROM will respond with (ACK) after each data word received. microcontroller must terminate page write sequence with stop condition (refer Figure Figure Page Write
DATA
DATA
DATA
Note:
DON'T CARE
data word address lower three (1K/2K) four (4K, 16K) bits internally incremented following receipt each data word. higher data word address bits incremented, retaining memory page location. When word address, internally generated, reaches page boundary, following byte placed beginning same page. more than eight (1K/2K) (4K, 16K) data words transmitted EEPROM, data word address will "roll over" previous data will overwritten. ACKNOWLEGE POLLING: Once internally timed write cycle started EEPROM inputs disabled, acknowledge polling initiated. This involves sending start condition followed device address word. read/write representative operation desired. Only internal write cycle completed
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
will EEPROM respond with (ACK), allowing read write sequence continue.
Read Operations
Read operations initiated same write operations, with exception that read/write select device address word "1". There three read operations: current address read, random address read, sequential read. CURRENT ADDRESS READ: internal data word address counter maintains last address accessed during last read write operation, incremented one. This address stays valid between operations long chip power maintained. address "rollover" during read from last byte last memory page first byte first page. address "rollover" during write from last byte current page first byte same page. Once device address with read/write select clocked acknowledged EEPROM, current address data word serially clocked out. microcontroller does respond with input does generate following stop condition (refer Figure Figure Current Address Read.
LINE
DEVICE ADDRESS
DATA
RANDOM READ: random read requires "dummy" byte write sequence load data word address. Once device address word data word address clocked acknowledged EEPROM, microcontroller must generate another start condition. microcontroller initiates current address read sending device address with read/write select high. EEPROM acknowledges device address serially clocks data word. microcontroller does respond with ACK) does generate following stop condition (refer Figure 10). Figure Random Read
WORD ADDRESS
Note:
DON'T CARE
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SEQUENTIAL READ: Sequential reads initiated either current address read random address read. After microcontroller receives data word, responds with acknowledge. long EEPROM receives acknowledge, will continue increment data word address serially clock sequential data words. When memory address limit reached, data word address will "rollover" sequential read will continue. sequential read operation terminated when microcontroller does respond with ACK) does generate following stop condition (refer Figure 11). Figure Sequential Read
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
AT24C01ASC Ordering Information
Ordering Code AT24C01ASC-09ET AT24C01ASC-09GT AT24C01ASC-09HT AT24C01ASC-09PT AT24C01ASC-10WI Package Module Module Module Module Wafer Voltage Range 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V Operation Range Commercial (0°C-70°C) Commercial (0°C-70°C) Commercial (0°C-70°C) Commercial (0°C-70°C) Industrial (-40°C-85°C)
AT24C02SC Ordering Information
Ordering Code AT24C02SC-09ET AT24C02SC-09PT AT24C02SC-10WI Package Module PModule Wafer Voltage Range 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V Operation Range Commercial (0°C-70°C) Commercial (0°C-70°C) Industrial (-40°C-85°C)
AT24C04SC Ordering Information
Ordering Code AT24C04SC-09ET AT24C04SC-09PT AT24C04SC-10WI Package Module PModule Wafer Voltage Range 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V Operation Range Commercial (0°C-70°C) Commercial (0°C-70°C) Industrial (-40°C-85°C)
AT24C08SC Ordering Information
Ordering Code AT24C08SC-09ET AT24C08SC-09PT AT24C08SC-10WI Package Module PModule Wafer Voltage Range 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V Operation Range Commercial (0°C-70°C) Commercial (0°C-70°C) Industrial (-40°C-85°C)
AT24C16SC Ordering Information
Ordering Code AT24C16SC-09ET AT24C16SC-09PT AT24C16SC-10WI Package Module PModule Wafer Voltage Range 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V Operation Range Commercial (0°C-70°C) Commercial (0°C-70°C) Industrial (-40°C-85°C)
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Package Type(1) Module Module Module Module Note:
Description 7816 Smart Card Module with Atmel Logo 7816 Smart Card Module 7816 Smart Card Module 7816 Smart Card Module with Atmel Logo
Formal drawings obtained from Atmel sales office.
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
Smart Card Modules
Ordering Code: 09ET-00
Module Size: M2-00 Dimension*: 12.6 11.4 [mm] Glob Top: Clear, Round: [mm] Thickness: 0.58 [mm] Pitch: 14.25 [mm]
Ordering Code: 09GT-00
Module Size: Dimension*: 10.6 [mm] Glob Top: Clear, Round: [mm] Thickness: 0.58 [mm] Pitch: [mm]
Ordering Code: 09PT-00
Module Size: Dimension*: 12.6 11.4 [mm] Glob Top: Square: [mm] Thickness: 0.58 [mm] Pitch: 14.25 [mm]
Ordering Code: 09HT-00
Module Size: Dimension*: 10.6 [mm] Glob Top: Clear, Round: [mm] Thickness: 0.58 [mm] Pitch: [mm]
*Note: module dimensions listed refer dimensions exposed metal contact area. actual dimensions module after excise punching from carrier tape generally greater both directions (i.e., punched module will yield 13.0 11.8 mm).
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