3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER W/3-STATE OUTPUTS 3.3V CMO
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IDT74ALVCHR16500
3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER W/3-STATE OUTPUTS
3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER WITH 3-STATE OUTPUTS BUS-HOLD
FEATURES:
MICRON CMOS Technology Typical tSK(0) (Output Skew) 250ps 2000V MIL-STD-883, Method 3015; 200V using machine model 200pF, 0.635mm pitch SSOP, 0.50mm pitch TSSOP, 0.40mm pitch TVSOP packages Extended commercial range 40°C 85°C 3.3V 0.3V, Normal Range 2.7V 3.6V, Extended Range 2.5V 0.2V CMOS power levels (0.4µ typ. static) Rail-to-Rail output swing increased noise margin Drive Features ALVCHR16500: Balanced Output Drivers: ±12mA switching noise
IDT74ALVCHR16500
DESCRIPTION:
This 18-bit universal transceiver built using advanced dual metal CMOS technology. Data flow each direction controlled output-enable (OEAB OEBA), latch enable (LEAB LEBA) clock (CLKAB CLKBA) inputs. A-to-B data flow, device operates transparent mode when LEAB high. When LEAB LOW, data latched CLKAB held high logic level. LEAB LOW, data stored latch/flip-flop high-to-low transition CLKAB. OEAB performs output enable function port. Data flow from port port similiar requires using OEBA, LEBA CLKBA. Flow-through organization signal pins simplifies layout. inputs designed with hysteresis improved noise margin. ALVCHR16500 series resistors device output structure which will significantly reduce reduce line noise when used with light loads. This driver been designed drive ±12mA designated threshold levels. ALVCHR16500 "bus-hold" which retains inputs' last state whenever input goes high impedance. This prevents floating inputs eliminates need pull-up/down resistors.
APPLICATIONS:
3.3V High Speed Systems 3.3V lower voltage computing systems
Functional Block Diagram
OEAB CLKAB
LEAB LEBA CLKBA OEBA
OTHER CHANNELS
1999 Integrated Device Technology, Inc.
JULY 1999
DSC-4533/-1
IDT74ALVCHR16500
3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER W/3-STATE OUTPUTS
CONFIGURATION
OEAB OEBA
ABSOLUTE MAXIMUM RATING
Symbol VTERM(2) VTERM(3) TSTG IOUT Description Terminal Voltage with Respect Terminal Voltage with Respect Storage Temperature Output Current Continuous Clamp Current, Continuous Clamp Current, Continuous Current through each
Unit
NEW16link
Max. ±100
NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. terminals. terminals except VCC.
CAPACITANCE +25oC, 1.0MHz)
Symbol COUT CI/O Parameter(1) Input Capacitance Output Capacitance Port Capacitance Conditions VOUT Typ. Max. Unit
NEW16link
NOTE: applicable device type.
FUNCTION TABLE
Inputs OEAB LEAB CLKAB
Outputs BO(3) BO(4)
SSOP/ TSSOP/TVSOP VIEW
NOTES: A-to-B data flow shown. B-to-A data flow similar uses OEBA, LEBA, CLKBA HIGH Voltage Level Voltage Level Don't Care High-Impedance HIGH-to-LOW Transition Output level before indicated steady-state input conditions were established Output level before indicated steady-state input conditions were established, provided that CLKAB before LEAB went low.
IDT74ALVCHR16500
3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER W/3-STATE OUTPUTS
DESCRIPTION
Names OEAB OEBA LEAB LEBA CLKAB CLKBA Description A-to-B Output Enable Input B-to-A Output Enable Input (Active LOW) A-to-B Latch Enable Input B-to-A Latch Enable Input A-to-B Clock Input (Active LOW) B-to-A Clock Input (Active LOW) A-to-B Data Inputs B-to-A 3-State Outputs(1) B-to-A Data Inputs A-to-B 3-State Outputs(1)
NOTE: These pins have "Bus-Hold." other pins standard inputs, outputs, I/Os.
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: 40°C +85°C
Symbol IOZH IOZL ICCL ICCH ICCZ Parameter Input HIGH Voltage Level Input Voltage Level Input HIGH Current Input Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current 2.3V, 18mA 3.3V 3.6V input 0.6V, other inputs Test Conditions 2.3V 2.7V 2.7V 3.6V 2.3V 2.7V 2.7V 3.6V 3.6V 3.6V 3.6V Min. Typ.(1) Max. Unit
Quiescent Power Supply Current Variation
NEW16link
NOTE: Typical values 3.3V, +25°C ambient.
IDT74ALVCHR16500
3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER W/3-STATE OUTPUTS
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NEW16link
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current
3.0V 2.3V 3.6V
Test Conditions 2.0V 0.8V 1.7V 0.7V 3.6V
Min.
Typ.(2)
Max.
Unit
NOTES: Pins with Bus-hold identified description. Typical values 3.3V, +25°C ambient.
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Output HIGH Voltage Test Conditions(1) 2.3V 3.6V 0.1mA 2.7V 3.0V Output Voltage 2.3V 3.6V 2.3V 2.7V 3.0V 12mA 0.1mA 12mA Min. Max. 0.55 0.55
NEW16link
Unit
2.3V
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C 85°C.
OPERATING CHARACTERISTICS, 25oC
2.5V 0.2V Symbol Parameter Power Dissipation Capacitance Outputs enabled Power Dissipation Capacitance Outputs disabled Test Conditions 0pF, 10Mhz Typical 3.3V 0.3V Typical Unit
IDT74ALVCHR16500
3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER W/3-STATE OUTPUTS
SWITCHING CHARACTERISTICS
Symbol fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tSK(o) Parameter Propagation Delay Propagation Delay LEBA LEAB Propagation Delay CLKBA CLKAB Output Enable Time OEBA Output Enable Time OEAB Output Disable Time OEBA Output Disable Time OEAB Setup Time, data before Hold Time, data after Setup Time, data before Hold Time, data after Pulse Width, HIGH Pulse Width, HIGH Output Skew(2) HIGH HIGH
2.5V 0.2V Min. Max.
2.7V Min. Max.
3.3V 0.3V Min. Max. Unit
NOTES: test circuits waveforms. 40°C 85°C. Skew between outputs same package switching same direction.
IDT74ALVCHR16500
3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER W/3-STATE OUTPUTS
TEST CIRCUITS WAVEFORMS: TEST CONDITIONS PROPAGATION DELAY
Symbol VLOAD VCC(1)= 3.3V±0.3V VCC(1)= 2.7V VCC(2)= 2.5V±0.2V Unit
NEW16link
PHAS INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION
ALVC Link
TEST CIRCUITS OUTPUTS
Pulse Generator
ENABLE DISABLE TIMES
ENABLE CONTROL INPUT tPZL OUTPUT ITCH NORM ALLY CLOSE tPZH OUTPUT ITCH NORM ALLY OPEN HIGH LOAD tPLZ DISABLE LOAD
ALVC Link
LOAD Open
D.U.T.
ALVC Link
SET-UP, HOLD, RELEASE TIMES SWITCH POSITION
Test Open Drain Disable Enable Disable High Enable High Other tests Switch VLOAD
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL
NEW16link
Open
Link
OUTPUT SKEW INPUT
-HIGH-LOW PULSE HIGH-LOW -HIGH PULSE
Link
tPLH1
OUTPUT
OUTPUT tPLH2
PLH2
Link
NOTES: tSK(o) OUTPUT1 OUTPUT2 outputs. tSK(b) OUTPUT1 OUTPUT2 same bank.
IDT74ALVCHR16500
3.3V CMOS 18-BIT UNIVERSAL TRANSCEIVER W/3-STATE OUTPUTS
ORDERING INFORMATION
ALVC Family
Temp. Range
Bus-Hold
Device Type Package
Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) 18-Bit Universal Transceiver with 3-State Outputs Double-Density with Resistors, ±12mA
Bus-Hold -40°C +85°C
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