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75A, 55V, 0.012 Ohm, N-Channel UltraFET Power MOSFETs These N-Cha


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HUF75339G3, HUF75339P3, HUF75339S3S
75A, 55V, 0.012 Ohm, N-Channel UltraFET Power MOSFETs
These N-Channel power MOSFETs manufactured using innovative UltraFET® process. This advanced process technology achieves lowest possible on-resistance silicon area, resulting outstanding performance. This device capable withstanding high energy avalanche mode diode exhibits very reverse recovery time stored charge. designed applications where power efficiency important, such switching regulators, switching converters, motor drivers, relay drivers, lowvoltage switches, power management portable battery-operated products. Formerly developmental type TA75339.
Features
75A, Simulation Models Temperature Compensated PSPICE® SABERModels SPICE SABER Thermal Impedance Models Available www.fairchildsemi.com Peak Current Pulse Width Curve Rating Curve Related Literature TB334, "Guidelines Soldering Surface Mount Components Boards"
Symbol
Ordering Information
PART NUMBER HUF75339G3 HUF75339P3 HUF75339S3S PACKAGE TO-247 TO-220AB TO-263AB BRAND 75339G 75339P 75339S
NOTE: When ordering, entire part number. suffix obtain TO-263AB variant tape reel, e.g., HUF75339S3ST.
Packaging
JEDEC STYLE TO-247
SOURCE DRAIN GATE DRAIN (FLANGE)
JEDEC TO-220AB
SOURCE DRAIN GATE
DRAIN (TAB)
JEDEC TO-263AB
GATE SOURCE
DRAIN (FLANGE)
Product reliability information found severe environments, Automotive HUFA series. Fairchild semiconductor products manufactured, assembled tested under ISO9000 QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF75339G3, HUF75339P3, HUF75339S3S Rev.
HUF75339G3, HUF75339P3, HUF75339S3S
Absolute Maximum Ratings
25oC, Unless Otherwise Specified Figure Figures 1.35 UNITS
Drain Source Voltage (Note VDSS Drain Gate Voltage (RGS 20k) (Note VDGR Gate Source Voltage Drain Current Continuous (Figure Pulsed Drain Current Pulsed Avalanche Rating Power Dissipation Derate Above 25oC Operating Storage Temperature .TJ, TSTG Maximum Temperature Soldering Leads 0.063in (1.6mm) from Case Package Body 10s, Techbrief Tpkg
W/oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTE: 25oC 150oC.
Electrical Specifications
PARAMETER STATE SPECIFICATIONS
25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS UNITS
Drain Source Breakdown Voltage Zero Gate Voltage Drain Current
BVDSS IDSS
250µA, (Figure 50V, 45V, 150oC ±20V
±100
Gate Source Leakage Current STATE SPECIFICATIONS Gate Source Threshold Voltage Drain Source Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction Case Thermal Resistance Junction Ambient
IGSS
VGS(TH) rDS(ON)
VDS, 250µA (Figure 75A, (Figure
0.010
0.012
(Figure TO-247 TO-220, TO-263
0.74
oC/W oC/W oC/W
SWITCHING SPECIFICATIONS (VGS 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge Threshold Gate Charge Gate Source Gate Charge Reverse Transfer Capacitance Qg(TOT) Qg(10) Qg(TH) 30V, 75A, Ig(REF) 1.0mA (Figure td(ON) td(OFF) tOFF 30V, 75A, 0.4, 10V,
©2001 Fairchild Semiconductor Corporation
HUF75339G3, HUF75339P3, HUF75339S3S Rev.
HUF75339G3, HUF75339P3, HUF75339S3S
Electrical Specifications
PARAMETER CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS 25V, 1MHz (Figure 2000 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS UNITS
Source Drain Diode Specifications
PARAMETER Source Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge SYMBOL 75A, dISD/dt 100A/µs 75A, dISD/dt 100A/µs TEST CONDITIONS 1.25 UNITS
Typical Performance Curves
POWER DISSIPATION MULTIPLIER DRAIN CURRENT CASE TEMPERATURE (oC) CASE TEMPERATURE (oC)
FIGURE NORMALIZED POWER DISSIPATION CASE TEMPERATURE
FIGURE MAXIMUM CONTINUOUS DRAIN CURRENT CASE TEMPERATURE
THERMAL IMPEDANCE ZJC, NORMALIZED DUTY CYCLE DESCENDING ORDER 0.05 0.02 0.01
NOTES: DUTY FACTOR: t1/t2 PEAK 10-3 10-2 10-1
0.01 10-5
SINGLE PULSE 10-4
RECTANGULAR PULSE DURATION
FIGURE NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2001 Fairchild Semiconductor Corporation
HUF75339G3, HUF75339P3, HUF75339S3S Rev.
HUF75339G3, HUF75339P3, HUF75339S3S Typical Performance Curves
1000
(Continued)
25oC
IDM, PEAK CURRENT
TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT FOLLOWS:
TRANSCONDUCTANCE LIMIT CURRENT THIS REGION 10-4 10-3 10-2 PULSE WIDTH 10-1
10-5
FIGURE PEAK CURRENT CAPABILITY
IAS, AVALANCHE CURRENT RATED
(L)(IAS)/(1.3*RATED BVDSS VDD) (L/R)ln[(IAS*R)/(1.3*RATED BVDSS VDD)
DRAIN CURRENT
100µs
STARTING 25oC
OPERATION THIS AREA LIMITED rDS(ON) VDSS(MAX)
10ms
STARTING 150oC
0.001
0.01 tAV, TIME AVALANCHE (ms)
VDS, DRAIN SOURCE VOLTAGE
NOTE: Refer Fairchild Application Notes AN9321 AN9322. FIGURE FORWARD BIAS SAFE OPERATING AREA FIGURE UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
DRAIN CURRENT
DRAIN CURRENT
PULSE DURATION 80µs DUTY CYCLE 0.5% 175oC
PULSE DURATION 80µs DUTY CYCLE 0.5% 25oC VDS, DRAIN SOURCE VOLTAGE
25oC -55oC
VGS, GATE SOURCE VOLTAGE
FIGURE SATURATION CHARACTERISTICS
FIGURE TRANSFER CHARACTERISTICS
©2001 Fairchild Semiconductor Corporation
HUF75339G3, HUF75339P3, HUF75339S3S Rev.
HUF75339G3, HUF75339P3, HUF75339S3S Typical Performance Curves
NORMALIZED DRAIN SOURCE RESISTANCE PULSE DURATION 80µs DUTY CYCLE 0.5% 10V,
(Continued)
VDS, 250µA NORMALIZED GATE THRESHOLD VOLTAGE
JUNCTION TEMPERATURE (oC)
JUNCTION TEMPERATURE (oC)
FIGURE NORMALIZED DRAIN SOURCE RESISTANCE JUNCTION TEMPERATURE
FIGURE NORMALIZED GATE THRESHOLD VOLTAGE JUNCTION TEMPERATURE
NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE 250µA
3750 1MHz CISS CRSS COSS
3000 CAPACITANCE (pF)
2250
CISS
1500 COSS CRSS
JUNCTION TEMPERATURE (oC)
DRAIN SOURCE VOLTAGE
FIGURE NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE JUNCTION TEMPERATURE
GATE SOURCE VOLTAGE
FIGURE CAPACITANCE DRAIN SOURCE VOLTAGE
WAVEFORMS DESCENDING ORDER: 37.5A
GATE CHARGE (nC)
NOTE: Refer Fairchild Application Notes AN7254 AN7260. FIGURE GATE CHARGE WAVEFORMS CONSTANT GATE CURRENT
©2001 Fairchild Semiconductor Corporation
HUF75339G3, HUF75339P3, HUF75339S3S Rev.
HUF75339G3, HUF75339P3, HUF75339S3S Test Circuits Waveforms
BVDSS VARY OBTAIN REQUIRED PEAK
0.01
FIGURE UNCLAMPED ENERGY TEST CIRCUIT
FIGURE UNCLAMPED ENERGY WAVEFORMS
Qg(TOT)
Qg(10) Qg(TH) Ig(REF)
IG(REF)
FIGURE GATE CHARGE TEST CIRCUIT
FIGURE GATE CHARGE WAVEFORM
td(ON)
tOFF td(OFF)
PULSE WIDTH
FIGURE SWITCHING TIME TEST CIRCUIT
FIGURE RESISTIVE SWITCHING WAVEFORMS
©2001 Fairchild Semiconductor Corporation
HUF75339G3, HUF75339P3, HUF75339S3S Rev.
HUF75339G3, HUF75339P3, HUF75339S3S PSPICE Electrical Model
.SUBCKT HUF75339
2.80e-9 2.80e-9 1.77e-9
February 1999
LDRAIN DPLCAP RLDRAIN DBREAK EBREAK MWEAK MMED MSTRO LSOURCE RSOURCE RLSOURCE RBREAK RVTEMP SOURCE DBODY DRAIN RSLC1 ESLC
RSLC2
EBREAK 59.2 EVTHRES EVTEMP LDRAIN 1.0e-9 LGATE 2.0e-9 LSOURCE 4.7e-10 LSOURCE LGATE 0.0302 MMED MMEDMOD MSTRO MSTROMOD MWEAK MWEAKMOD RBREAK RBREAKMOD RDRAIN RDRAINMOD 1.95e-3 RGATE 0.34 RLDRAIN RLGATE RLSOURCE RSLC1 RSLCMOD 1.0e-6 RSLC2 RSOURCE RSOURCEMOD 6.0e-3 RVTHRES RVTHRESMOD RVTEMP RVTEMPMOD S1AMOD S1BMOD S2AMOD S2BMOD
GATE
LGATE EVTEMP RGATE EVTHRES
RLGATE
VBAT ESLC .MODEL DBODYMOD 3.5e-12 3.02e-3 1.02 TRS1 3.0e-3 TRS2 4.0e-6 2.9e-9 4.35e-8 0.5) .MODEL DBREAKMOD 8.5e-2 TRS1 8.0e- 4TRS2 1.0e-7) .MODEL DPLCAPMOD (CJO 2.25e- 1e-30 .MODEL MMEDMOD NMOS (VTO 1e-30 RG=0.34) .MODEL MSTROMOD NMOS (VTO 3.73 86.5 1e-30 .MODEL MWEAKMOD NMOS (VTO 0.01 1e-30 RG=3.4) .MODEL RBREAKMOD (TC1 1.08e- 3TC2 -2.5e-7) .MODEL RDRAINMOD (TC1 2.05e-2 1.6e-5) .MODEL RSLCMOD (TC1 6.0e-3 -2.8e-6) .MODEL RSOURCEMOD (TC1 5.5e-4 1.75e-5) .MODEL RVTHRESMOD (TC1 -3.65e-3 -6.0e-6) .MODEL RVTEMPMOD (TC1 -2.3e- 3TC2 -4.0e-6) .MODEL S1AMOD VSWITCH (RON 1e-5 .MODEL S1BMOD VSWITCH (RON 1e-5 .MODEL S2AMOD VSWITCH (RON 1e-5 .MODEL S2BMOD VSWITCH (RON 1e-5 .ENDS ROFF ROFF ROFF ROFF VOFF= -5.5) -5.5 VOFF= VOFF= 2.1) VOFF=
NOTE: further discussion PSPICE model, consult PSPICE Sub-Circuit Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written William Hepp Frank Wheatley.
©2001 Fairchild Semiconductor Corporation
DBODY DBODYMOD DBREAK DBREAKMOD DPLCAP DPLCAPMOD
RDRAIN
VBAT
RVTHRES
HUF75339G3, HUF75339P3, HUF75339S3S Rev.
HUF75339G3, HUF75339P3, HUF75339S3S SABER Electrical Model
February 1999 template huf75339 electrical iscl d.model dbodymod 3.5e-12, 1.02, 5.5, 2.9e-9, 4.35e-8, 0.5) d.model dbreakmod DPLCAP d.model dplcapmod (cjo 2.25e-9, 1e-30, m.model mmedmod (type=_n, 3.1, 1.5, 1e-30, m.model mstrongmod (type=_n, 3.73, 86.5, 1e-30, m.model mweakmod (type=_n, 2.7, 0.01, 1e-30, sw_vcsp.model s1amod (ron 1e-5, roff 0.1, voff -5.5) RSLC2 sw_vcsp.model s1bmod (ron 1e-5, roff 0.1, -5.5, voff sw_vcsp.model s2amod (ron 1e-5, roff 0.1, voff 2.1) sw_vcsp.model s2bmod (ron 1e-5, roff 0.1, 2.1, voff c.ca 2.8e-9 c.cb 2.8e-9 c.cin 1.77e-9 d.dbody model=dbodymod d.dbreak model=dbreakmod d.dplcap model=dplcapmod i.it
LGATE GATE RLGATE
LDRAIN RLDRAIN RDBREAK DBREAK MWEAK MMED MSTRO EBREAK RDBODY DRAIN RSLC1 ISCL
EVTEMP RGATE EVTHRES
RDRAIN
DBODY
LSOURCE RLSOURCE
l.ldrain 1.0e-9 l.lgate 2.0e-9 l.lsource 4.7e-10 k.kl (l.lgate) (l.lsource) l(l.lgate), l(l.lsource), 0.0302 m.mmed model=mmedmod, m.mstrong model=mstrongmod, m.mweak model=mweakmod, res.rbreak 1.08e-3, -2.5e-7 res.rdbody 3.02e-3, 3.0e-3, 4.0e-6 res.rdbreak 8.5e-2, 8.0e-4, 1.0e-7 res.rdrain 1.95e-3, 2.05e-2, 1.6e-5 res.rgate 0.34 res.rldrain res.rlgate res.rlsource res.rslc1 1e-6, 6.0e-3, -2.8e-6 res.rslc2 res.rsource 6e-3, 5.5e-4, 1.75e-5 res.rvtemp -2.3e-3, -4.0e-6 res.rvthres -3.65e-3, -6.0e-6 spe.ebreak 59.2 spe.eds spe.egs spe.esg spe.evtemp spe.evthres sw_vcsp.s1a model=s1amod sw_vcsp.s1b model=s1bmod sw_vcsp.s2a model=s2amod sw_vcsp.s2b model=s2bmod v.vbat
SOURCE
RSOURCE RBREAK RVTEMP
VBAT
RVTHRES
equations (n51->n50) iscl iscl: v(n51,n50) 4.0))
©2001 Fairchild Semiconductor Corporation
HUF75339G3, HUF75339P3, HUF75339S3S Rev.
HUF75339G3, HUF75339P3, HUF75339S3S SPICE Thermal Model
February 1999 HUF75339 CTHERM1 5.00e-3 CTHERM2 1.90e-2 CTHERM3 7.95e-3 CTHERM4 9.00e-3 CTHERM5 2.95e-2 CTHERM6 12.55 RTHERM1 5.04e-3 RTHERM2 1.25e-2 RTHERM3 3.54e-2 RTHERM4 1.98e-1 RTHERM5 2.99e-1 RTHERM6 3.97e-2
RTHERM1 CTHERM1 JUNCTION
RTHERM2
CTHERM2
RTHERM3
CTHERM3
SABER Thermal Model
SABER thermal model HUF75339 template thermal_model thermal_c ctherm.ctherm1 5.00e-3 ctherm.ctherm2 1.90e-2 ctherm.ctherm3 7.95e-3 ctherm.ctherm4 9.00e-3 ctherm.ctherm5 2.95e-2 ctherm.ctherm6 12.55 rtherm.rtherm1 5.04e-3 rtherm.rtherm2 1.25e-2 rtherm.rtherm3 3.54e-2 rtherm.rtherm4 1.98e-1 rtherm.rtherm5 2.99e-1 rtherm.rtherm6 3.97e-2
RTHERM4
CTHERM4
RTHERM5
CTHERM5
RTHERM6
CTHERM6
CASE
©2001 Fairchild Semiconductor Corporation
HUF75339G3, HUF75339P3, HUF75339S3S Rev.

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