LT®1713/LT1714 UltraFast7ns, single/dual comparators featuring rail-to

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LT®1713/LT1714 UltraFast7ns, single/dual comparators featuring rail-to

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LT1713/LT1714 Single/Dual, 7ns, Power, 3V/5V/±5V Rail-to-Rail Comparators DESCRIPTIO
LT®1713/LT1714 UltraFast7ns, single/dual comparators featuring rail-to-rail inputs, rail-to-rail complementary outputs output latch. Optimized power supplies, they operate over single supply voltage range from 2.4V from ±2.4V dual supplies. LT1713/LT1714 designed ease variety systems. addition wide supply voltage flexibility, rail-to-rail input common mode range extends 100mV beyond both supply rails outputs protected against phase reversal inputs extending further beyond rails. Also, rail-to-rail inputs taken opposite rails with significant increase input current. rail-to-rail matched complementary outputs interface directly CMOS logic sink 10mA within 0.5V source 10mA within 0.7V LT1713/LT1714 have internal TTL/CMOS compatible latches retaining data outputs. Each latch holds data long latch held high. Latch hysteresis provides protection against slow moving noisy latch signals. LT1713 available 8-lead MSOP package. LT1714 available 16-lead narrow SSOP package.
registered trademarks Linear Technology Corporation. UltraFast trademark Linear Technology Corporation.
Ultrafast: 20mV Overdrive 8.5ns Overdrive Rail-to-Rail Inputs Rail-to-Rail Complementary Outputs (TTL/CMOS Compatible) Specified 2.7V, Supplies Power (Per Comparator): Output Latch Inputs Exceed Supplies Without Phase Reversal LT1713: 8-Lead MSOP Package LT1714: 16-Lead Narrow SSOP Package
APPLICATIO
High Speed Automatic Test Equipment Current Sense Switching Regulators Crystal Oscillator Circuits High Speed Sampling Circuits High Speed Converters Pulse Width Modulators Window Comparators Extended Range Converters Fast Pulse Height/Width Discriminators Line Receivers High Speed Triggers
TYPICAL APPLICATIO
NTSC Subcarrier Voltage-Tunable Crystal Oscillator
1N4148 100pF MV-209 VARACTOR DIODE 47k* LT1004-2.5 3.9k*
PROPAGATION DELAY (ns)
0.047µF SELECT (CHOOSE CORRECT LOOP RESPONSE)
LT1713
Y1** 15pF 100pF
200pF
FREQUENCY OUTPUT
171314 TA01
FILM RESISTOR NORTHERN ENGINEERING LABS C-2350N-14.31818MHz
LT1713/LT1714 Propagation Delay Input Overdrive
INPUT OVERDRIVE (mV) tPD- tPD+ 25°C VSTEP 100mV
171314 TA02
LT1713/LT1714
ABSOLUTE
RATI
Supply Voltage 12.6V 12.6V 0.3V Differential Input Voltage ±12.6V Latch Voltage Input Latch Current ±10mA
PACKAGE/ORDER ATIO
ORDER PART NUMBER
VIEW LATCH ENABLE
LT1713CMS8 LT1713IMS8
PACKAGE 8-LEAD PLASTIC MSOP
PART MARKING LTRD LTUK
TJMAX 150°C, 250°C/
Consult factory parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 2.7V +/2, VLATCH 0.8V, CLOAD 10pF, VOVERDRIVE 20mV, unless otherwise specified.
SYMBOL PARAMETER Positive Supply Voltage Range Input Offset Voltage (Note (Note CONDITIONS
VOS/T CMRR
Input Offset Voltage Drift Input Offset Current
Input Bias Current (Note
Input Voltage Range (Note Common Mode Rejection Ratio 2.7V, 2.7V 2.7V, 2.7V
(Note
Output Current (Continuous) ±20mA Operating Temperature Range 40°C 85°C Specified Temperature Range (Note 40°C 85°C Junction Temperature 150°C Storage Temperature Range 65°C 150°C Lead Temperature (Soldering, sec). 300°C
VIEW
LATCH ENABLE LATCH ENABLE
ORDER PART NUMBER LT1714CGN LT1714IGN
PART MARKING 1714 1714I
PACKAGE 16-LEAD PLASTIC SSOP
TJMAX 150°C, 120°C/
UNITS µV/°C
LT1713/LT1714
ELECTRICAL CHARACTERISTICS
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 2.7V +/2, VLATCH 0.8V, CLOAD 10pF, VOVERDRIVE 20mV, unless otherwise specified.
SYMBOL PARAMETER PSRR+ PSRR- Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Small-Signal Voltage Gain (Note Output Voltage Swing HIGH Output Voltage Swing Positive Supply Current (Per Comparator) Negative Supply Current (Per Comparator) Latch High Input Voltage Latch Input Voltage Latch Current Propagation Delay (Note VLATCH 100mV, VOVERDRIVE 20mV 100mV, VOVERDRIVE 20mV 100mV, VOVERDRIVE 100mV, VOVERDRIVE 20mV IOUT OVERDRIVE 50mV IOUT 10mA, VOVERDRIVE 50mV IOUT 1mA, VOVERDRIVE 50mV IOUT 10mA, VOVERDRIVE 50mV VOVERDRIVE
CONDITIONS 2.4V
0.20 0.35
UNITS V/mV
1mA,
psRMS
VOVERDRIVE
11.0 12.5
tLPD tDPW fMAX tJITTER
Differential Propagation Delay (Note Output Rise Time Output Fall Time Latch Propagation Delay (Note Latch Setup Time (Note Latch Hold Time (Note Minimum Latch Disable Pulse Width (Note Maximum Toggle Frequency Output Timing Jitter
100mVP-P Sine Wave 630mVP-P (0dBm) Sine Wave, 30MHz
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. VLATCH 0.8V, CLOAD 10pF, VOVERDRIVE 20mV, unless otherwise specified.
SYMBOL PARAMETER Positive Supply Voltage Range Negative Supply Voltage Range (Note Input Offset Voltage (Note CONDITIONS
UNITS µV/°C
VOS/T
Input Offset Voltage Drift Input Offset Current Input Bias Current (Note
LT1713/LT1714
ELECTRICAL CHARACTERISTICS
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. VLATCH 0.8V, CLOAD 10pF, VOVERDRIVE 20mV, unless otherwise specified.
SYMBOL PARAMETER CMRR PSRR+ PSRR- Input Voltage Range Common Mode Rejection Ratio Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Small-Signal Voltage Gain (Note Output Voltage Swing HIGH (Note Output Voltage Swing (Note Positive Supply Current (Per Comparator) Negative Supply Current (Per Comparator) Latch High Input Voltage Latch Input Voltage Latch Current Propagation Delay (Note VLATCH 100mV, VOVERDRIVE 20mV 100mV, VOVERDRIVE 20mV 100mV, VOVERDRIVE 100mV, VOVERDRIVE 20mV
CONDITIONS
0.20 0.35
UNITS V/mV
2.4V
VOUT IOUT 1mA, VOVERDRIVE 50mV IOUT 10mA, VOVERDRIVE 50mV IOUT 1mA, VOVERDRIVE 50mV IOUT 10mA, VOVERDRIVE 50mV VOVERDRIVE VOVERDRIVE
psRMS
tLPD tDPW fMAX tJITTER
Differential Propagation Delay (Note Output Rise Time Output Fall Time Latch Propagation Delay (Note Latch Setup Time (Note Latch Hold Time (Note Minimum Latch Disable Pulse Width (Note Maximum Toggle Frequency Output Timing Jitter
100mVP-P Sine Wave 630mVP-P (0dBm) Sine Wave, 30MHz
Note Absolute Maximum Ratings those values beyond which life device impaired. Note LT1713C/LT1714C guaranteed meet specified performance from 70°C. They designed, characterized expected meet specified performance from 40°C 85°C tested sampled these temperatures. LT1713I/LT1714I guaranteed meet specified performance from 40°C 85°C. Note negative supply should greater than ground voltages maximum voltage across positive negative supplies should greater than 12V. Note Input offset voltage (VOS) defined average voltages measured forcing first output, then other +/2. Note Input bias current (IB) defined average input currents.
Note Propagation delay (tPD) measured with overdrive added actual VOS. Differential propagation delay defined tPD+ tPD-. Load capacitance 10pF. test system requirements, LT1713/LT1714 propagation delay specified with load ground supplies, mid-supply 2.7V single supplies. Note Latch propagation delay (tLPD) delay time output respond when latch deasserted. Latch setup time (tSU) interval which input signal must remain stable prior asserting latch signal. Latch hold time (tH) interval after latch asserted which input signal must remain stable. Latch disable pulse width (tDPW) width negative pulse latch enable that latches data data inputs.
LT1713/LT1714
ELECTRICAL CHARACTERISTICS
Note Output voltage swings characterized tested They designed expected meet these same specifications Note input voltage range tested under more demanding conditions -5V. LT1713/LT1714 designed expected meet these specifications Note LT1713/LT1714 voltage gain tested only. Voltage gain single supply 2.7V guaranteed design correlation. Note Input offset voltage over temperature 2.7V guaranteed design characterization.
TYPICAL PERFOR CHARACTERISTICS
Input Offset Voltage Temperature
2.5V
PROPAGATION DELAY (ns)
INPUT OFFSET VOLTAGE (mV)
PROPAGATION DELAY (ns)
TEMPERATURE (°C)
POSITIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
Propagation Delay Input Common Mode Voltage
10.0
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
tPD- 25°C 20mV VSTEP 100mV CLOAD 10pF INPUT COMMON MODE
171314
Propagation Delay Load Capacitance
25°C 2.5V 20mV VSTEP 100mV LOAD CAPACITANCE (pF) tPD- tPD+
Propagation Delay Temperature
2.5V 20mV VSTEP 100mV CLOAD 10pF tPD+ tPD-
TEMPERATURE (°C)
171314
171314
Propagation Delay Positive Supply Voltage
10.0 POSITIVE SUPPLY VOLTAGE 25°C 2.5V 20mV VSTEP 100mV CLOAD 10pF
Positive Supply Current Positive Supply Voltage
25°C 100mV IOUT
tPD+
tPD-
POSITIVE SUPPLY VOLTAGE
171314
171314
171314
LT1713/LT1714 TYPICAL PERFOR CHARACTERISTICS
POSITIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
NEGATIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
Positive Supply Current Switching Frequency
25°C CLOAD 10pF SWITCHING FREQUENCY (MHz)
INPUT BIAS CURRENT (µA)
Input Bias Current Temperature
2.5V
OUTPUT VOLTAGE
INPUT BIAS CURRENT (µA)
25°C 100mV 0.01 LOADING SOURCE CURRENT (mA)
OUTPUT VOLTAGE
TEMPERATURE (°C)
171314
Output Timing Jitter Switching Frequency
OUTPUT TIMING JITTER (psRMS)
25°C 2.5V 630mVP-P (0dBm) SINE WAVE
FREQUENCY (MHz)
171314
Negative Supply Current Negative Supply Voltage
25°C 100mV IOUT
Input Bias Current Input Common Mode Voltage
25°C
2.7V
NEGATIVE SUPPLY VOLTAGE
INPUT COMMON MODE VOLTAGE
171314
171314
Output High Voltage Source Current
Output Voltage Sink Current
25°C 100mV
0.01
LOADING SINK CURRENT (mA)
171314
171314
Output Rising Edge, Supply
Output Falling Edge, Supply
VOUT
VOUT
171314
171314
171314
LT1713/LT1714
CTIO
LT1713 (Pin Positive Supply Voltage, Usually (Pin Noninverting Input. (Pin Inverting Input. (Pin Negative Supply Voltage, Usually LATCH ENABLE (Pin Latch Enable Input. With logic high output latched. (Pin Ground Supply Voltage, Usually (Pin Noninverting Output. (Pin Inverting Output.
LT1714 (Pin Inverting Input Channel Comparator. (Pin Noninverting Input Channel Comparator. (Pins Negative Supply Voltage, Usually Pins should connected together externally. (Pins Positive Supply Voltage, Usually Pins should connected together externally. (Pin Noninverting Input Channel Comparator. (Pin Inverting Input Channel Comparator. LATCH ENABLE (Pin Latch Enable Input Channel Comparator. With logic high, output latched. (Pin 10): Ground Supply Voltage Channel Comparator, Usually (Pin 11): Noninverting Output Channel Comparator. (Pin 12): Inverting Output Channel Comparator. (Pin 13): Inverting Output Channel Comparator. (Pin 14): Noninverting Output Channel Comparator. (Pin 15): Ground Supply Voltage Channel Comparator, Usually LATCH ENABLE (Pin 16): Latch Enable Input Channel Comparator. With logic high, output latched.
LT1713/LT1714
APPLICATIO ATIO
Common Mode Considerations
LT1713/LT1714 specified common mode range 5.1V 5.1V supply, common mode range 0.1V 5.1V single supply. more general consideration that common mode range from 100mV below negative supply 100mV above positive supply, independent actual supply voltage. criteria common mode limit that output still responds correctly small differential input signal. When either input signal falls outside common mode limit, internal diode formed with substrate turn resulting significant current flow through die. Schottky clamp diodes between inputs supply rails speed recovery from excessive overdrive conditions preventing these substrate diodes from turning Input Bias Current Input bias current measured with outputs held 2.5V with supply voltage. with rail-to-rail differential input stage, LT1713/LT1714 bias current flows into device depending upon common mode level. input circuit consists pair pair. inputs near negative rail, pair inactive, input bias current flows device; inputs near positive rail, pair inactive, these currents flow into device. inputs enough away from supply rails, input bias current will some combination bias currents. differential input voltage increases, input current each pair will increase inputs decrease other input. Large differential input voltages result different input currents input stage enters various regions operation. reduce influence these changing input currents system operation, source resistance.
Latch Dynamics internal latches LT1713/LT1714 comparators retain input data (output latched) when their respective latch goes high. latch will float state when disconnected, better ground latch when flow-through condition desired. latch designed driven with either CMOS output. built-in hysteresis approximately 100mV, that slow moving noisy input signals impact latch performance. LT1714, only comparators being used given time, best latch second comparator avoid possibility interactions between comparators same package. High Speed Design Techniques substantial amount design effort made LT1713/LT1714 relatively easy use. with most high speed comparators, careful attention board layout design important order prevent oscillations. most common problem involves power supply bypassing which necessary maintain supply impedance. Resistance inductance supply wires traces quickly build unacceptable levels, thereby allowing supply voltages move supply current changes. This movement supply voltages will often result improper operation. addition, adjacent devices connected through unbypassed supply interact with each other through finite supply impedances. Bypass capacitors furnish simple solution this problem providing local reservoir energy device, thus keeping supply impedance low. Bypass capacitors should close possible LT1713/LT1714 supply pins. good high frequency capacitor, such 0.1µF ceramic, recommended parallel with larger capacitor, such 4.7µF tantalum.
LT1713/LT1714
APPLICATIO ATIO
Poor trace routes high source impedances also common sources problems. Keep trace lengths short possible avoid running output trace adjacent input trace prevent unnecessary coupling. output traces longer than inches, provide proper termination impedances (typically 400) eliminate reflections that occur. Also keep source impedances possible, preferably much less than input output traces should also isolated from another. Power supply traces used achieve
Figure Typical LT1714 Topside Metal Multilayer Layout
this isolation shown Figure typical topside layout LT1713/LT1714 multilayer board. Shown topside metal etch including traces, escape vias land pads GN16 LT1713/LT1714 adjacent 0805 bypass capacitors. traces shield inputs from outputs. Although pins connected internally, they should shorted together externally well order both function shields. same true pins. pins connected internally, most applications they both connected directly ground plane.
1714
LT1713/LT1714
APPLICATIO ATIO
Hysteresis
Another useful technique avoid oscillations provide positive feedback, also known hysteresis, from output input. Increased levels hysteresis, however, reduce sensitivity device input voltage levels, amount positive feedback should tailored particular system requirements.
LT1713
VHYST (ALL CASES) VREF
Figure Various Configurations Introducing Hysteresis
LT1713/LT1714 completely flexible regarding application hysteresis, rail-to-rail inputs complementary outputs. Specifically, feedback resistors connected from both outputs their corresponding inputs without regard common mode considerations. Figure shows several configurations.
100k
LT1713
VIN+ VIN-
LT1713
100k
171314
LT1713/LT1714
TYPICAL APPLICATIO
Simultaneous Full Duplex 75Mbaud Interface with Only Wires circuit Figure shows simple, fully bidirectional, differential 2-wire interface that gives good results 75Mbaud, using LT1714. diagrams under conditions unidirectional bidirectional communication shown Figures Although pristine unidirectional performance Figure performance under simultaneous bidirectional operation still excellent. Because LT1714 input voltage range extends 100mV beyond both supply rails, circuit works with full (one whole down) ground potential difference. circuit works well with resistor values shown, other sets values used. starting point characteristic impedance, twisted-pair cable. input impedance resistive network should match characteristic impedance given
750k
LT1714
750k 100k 49.9 2.55k 2.55k
49.9
LT1714
100k
R1||(R2 [R1||(R2 R3)]
This comes values shown. Thevenin equivalent source voltage given
[R1||(R2 R3)]
750k
LT1714
6-FEET TWISTED PAIR DIODES: BAV99 2.55k
750k 100k 2.55k
49.9
LT1714
49.9
100k
171314
Figure 75Mbaud Full Duplex Interface Wires
LT1713/LT1714
TYPICAL APPLICATIO
Figure Performance Figure Circuit When Operated Unidirectionally. Wide Open
This amounts attenuation factor 0.0978 with values shown. (The actual voltage lines will half again ZO.) reason this attenuation factor important that deciding ratio between R2-R3 resistor divider receiver path. This divider allows receiver reject large signal local transmitter instead sense attenuated signal remote transmitter. Note that above equations, fully determined because they only appear sum. This allows designer place additional constraint their values. R2-R3 divide ratio should equal half attenuation factor mentioned above R3/R2 0.09761. Having already designed 2.653k allocating input impedance across requisite 120), then become 2529 123.5 respectively. nearest value 2.55k that 124. Voltage-Tunable Crystal Oscillator front page application variant basic crystal oscillator that permits voltage tuning output frequency. Such voltage-controlled crystal oscillators (VCXO) often employed where slight variation stable carrier required. This example specifically intended provide NTSC sub-carrier tunable oscillator suitable phase locking.
FREQUENCY DEVIATION (kHz)
171112
171112
Figure Performance When Operated Simultaneous Bidirectionally (Full Duplex). Crosstalk Appears Noise. Slightly Shut Performance Still Excellent
LT1713 crystal oscillator. varactor diode biased from tuning input. tuning network arranged drive provides reasonably symmetric, broad tuning range around 14.31818MHz center frequency. indicated selected capacitor sets tuning bandwidth. should picked complement loop response phase locking applications. Figure plot tuning input voltage versus frequency deviation. Tuning deviation from NTSC 14.31818MHz center frequency exceeds ±240ppm input.
Using design value 2.653k rather than implementation value 2.55k 2.674k.
14.314.0MHz 14.31818MHz
14.3217MHz
INPUT VOLTAGE
171112
Figure Control Voltage Output Frequency First Page Application Circuit. Tuning Deviation from Center Frequency Exceeds ±240ppm
LT1713/LT1714
TYPICAL APPLICATIO
1MHz Series Resonant Crystal Oscillator with Square Sinusoid Outputs Figure shows classic 1MHz series resonant crystal oscillator. series resonance, crystal impedance positive feedback connection what brings about oscillation series resonant frequency. feedback around other path ensures that circuit does find stable operating point refuse oscillate. comparator output 1MHz square wave (top trace Figure with jitter measured better than 28psRMS supply 40psRMS supply. comparator, other side crystal, clean sine wave except presence small high frequency glitch (middle trace Figure This glitch caused fast edge comparator output feeding back through crystal capacitance. Amplitude stability sine wave maintained fact that sine wave basically filtered version square wave. Hence, usual amplitude control loops associated with sinusoidal oscillators necessary.2 sine wave filtered buffered fast, noise LT1806 amp. remove glitch, LT1806 configured bandpass filter with unity-gain center frequency 1MHz, with output shown bottom trace Figure Distortion measured 70dBc 60dBc second third harmonics, respectively.
0.1µF
Figure LT1713 Comparator Configured Series Resonant Xtal Oscillator. LT1806 Configured Bandpass with 1MHz
Figure Oscillator Waveforms with Comparator Output. Middle Xtal Feedback LT1713 (Note Glitches). Bottom Buffered, Inverted Bandpass Filtered with LT1806
Amplitude will linear function comparator output swing, which supply dependent therefore adjustable. important difference here that added amplitude stabilization control loop will faced with classical task avoiding regions nonoscillation versus clipping.
1MHz AT-CUT LT1713
6.49k 100pF 100pF
100pF
15.8k
LT1806 SINE
SQUARE 0.1µF
171314
3V/DIV
1V/DIV
1V/DIV
200ns/DIV
171112
LT1713/LT1714
PACKAGE DESCRIPTIO
Dimensions inches (millimeters) unless otherwise noted.
Package 8-Lead Plastic MSOP
(LTC 05-08-1660)
0.118 0.004* (3.00 0.102)
0.193 0.006 (4.90 0.15)
0.118 0.004** (3.00 0.102)
0.043 (1.10) 0.007 (0.18) 0.021 0.006 (0.53 0.015) SEATING PLANE
0.034 (0.86)
0.009 0.015 (0.22 0.38)
0.0256 (0.65)
0.005 0.002 (0.13 0.05)
MSOP (MS8) 1100
DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH, PROTRUSIONS GATE BURRS SHALL EXCEED 0.006" (0.152mm) SIDE DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSIONS. INTERLEAD FLASH PROTRUSIONS SHALL EXCEED 0.006" (0.152mm) SIDE
LT1713/LT1714
PACKAGE DESCRIPTIO
Dimensions inches (millimeters) unless otherwise noted. Package 16-Lead Plastic SSOP (Narrow 0.150)
(LTC 05-08-1641)
0.189 0.196* (4.801 4.978)
0.009 (0.229)
0.229 0.244 (5.817 6.198)
0.150 0.157** (3.810 3.988)
0.015 0.004 (0.38 0.10) 0.007 0.0098 (0.178 0.249) 0.016 0.050 (0.406 1.270) DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH SHALL EXCEED 0.006" (0.152mm) SIDE DIMENSION DOES INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL EXCEED 0.010" (0.254mm) SIDE 0.053 0.068 (1.351 1.727)
0.004 0.0098 (0.102 0.249)
0.008 0.012 (0.203 0.305)
0.0250 (0.635)
GN16 (SSOP) 1098
TYPICAL APPLICATIO
Rail-to-Rail Pulse Width Modulator Using LT1714 Binary modulation schemes used order improve efficiency reduce physical circuit size. They this reducing power dissipation output driver transistors. normal Class Class amplifier, voltage drop current flow exist simultaneously output transistors power losses proportional occur. binary modulation scheme, output transistors, whether bipolar FET, switched hard-on hard-off that voltage drops occur simultaneously with
Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights.
current flow. circuit Figure shows example binary modulation scheme, this case pulse width modulation. LT1809 configured integrator order generate nice linear rail-to-rail voltage ramps. polarity ramp determined output LT1714's comparator into heavy hysteresis around LT1714's comparator combined with feedback LT1809 force devices perpetually reverse each other, resulting 1MHz triangle wave. This constitutes usual first half pulse width modulator,
LT1713/LT1714
TYPICAL APPLICATIO
forte this particular implementation that rail-torail allowing full-scale analog input. Once triangle wave achieved, remainder pulse width modulator easy, constituted doing simple comparison using second half LT1714. triangle wave relatively slow moving analog signal (the modulated modulation, depending look into inputs comparator whose output then representation analog input voltage. higher analog input voltage, wider output pulse. time averaged output level thus proportional analog input voltage. This binary output then into power transistors with direct control over motor speaker winding current,
26.1
LT1714
2.7V
RELATED PARTS
PART NUMBER LT1016 LT1116 LT1394 LT1671 LT1711/LT1712 LT1719 LT1720/LT1721 DESCRIPTION UltraFast Precision Comparator 12ns Single Supply Ground Sensing Comparator 7ns, UltraFast Single Supply Comparator 60ns, Power, Single Supply Comparator Single/Dual, 4.5ns, 3V/5V/±5V Rail-to-Rail Comparators 4.5ns, Single Supply 3V/5V Comparator Dual/Quad, 4.5ns, Single Supply Comparator COMMENTS Industry Standard 10ns Comparator Single Supply Version LT1016 Single Supply Comparator 450µA Single Supply Comparator Faster Versions LT1713/LT1714 Comparator with Rail-to-Rail Outputs Dual/Quad Version LT1719
171314f LT/TP 0501 PRINTED
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, 95035-7417
(408)432-1900 FAX: (408) 434-0507 www.linear-tech.com
example, with their inherent lowpass characteristic. Care must taken avoid cross conduction output power transistors. linearity pulse width modulated signal easily ascertained putting simple 2-pole filter output shown Figure This demodulates signal which then viewed compared with original input signal oscilloscope. Using spectrum analyzer 1kHz reference signal, this circuit's distortion products were measured better than 50dBc (0.3%) about 3.5VP-P, degrading 30dBc (3%) circuit clips 5VP-P single supply.
500pF ANALOG INPUT ANTIALIASING FILTER 0.001µF 16kHz ANALOG FILTER LINEARITY MEASUREMENT 0.01µF 0.001µF
171314
100pF 1MHz TRIANGLE WAVE
LT1809
LT1714
0.01µF
COMPLEMENTARY 1MHz OUTPUTS
Figure Rail-to-Rail 1MHz Pulse Width Modulator
LINEAR TECHNOLOGY CORPORATION 2000

LT®1713/LT1714 UltraFast7ns, single/dual comparators featuring rail-to

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