5.5A, 100V, 0.039 Ohm, N-Channel, UltraFET® Power MOSFET Packaging

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5.5A, 100V, 0.039 Ohm, N-Channel, UltraFET® Power MOSFET Packaging

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HUF75631SK8
5.5A, 100V, 0.039 Ohm, N-Channel, UltraFET® Power MOSFET Packaging
JEDEC MS-012AA
BRANDING DASH
Features
Ultra On-Resistance rDS(ON) 0.039, Simulation Models Temperature Compensated PSPICE® SABERElectrical Models Spice SABER Thermal Impedance Models www.fairchildsemi.com Peak Current Pulse Width Curve Rating Curve
DRAIN DRAIN DRAIN DRAIN
Symbol
SOURCE SOURCE SOURCE GATE
Ordering Information
PART NUMBER HUF75631SK8 PACKAGE MS-012AA BRAND 75631SK8
NOTE: When ordering, entire part number. suffix obtain variant tape reel, e.g., HUF75631SK8T.
Absolute Maximum Ratings
25oC, Unless Otherwise Specified HUF75631SK8 UNITS Figure Figures mW/oC
Drain Source Voltage (Note VDSS Drain Gate Voltage (RGS 20k) (Note VDGR Gate Source Voltage Drain Current Continuous (TA= 25oC, 10V) (Figure Continuous (TA= 100oC, 10V) (Figure Pulsed Drain Current Pulsed Avalanche Rating Power Dissipation Derate Above 25oC Operating Storage Temperature TSTG Maximum Temperature Soldering Leads 0.063in (1.6mm) from Case Package Body 10s, Techbrief TB334. Tpkg NOTES: 25oC 150oC. 50oC/W measured using FR-4 board with 0.76 (490.3 mm2) copper second. 152oC/W measured using FR-4 board with 0.054 (34.8 mm2) copper 1000 seconds 189oC/W measured using FR-4 board with 0.0115 (7.42 mm2) copper 1000 seconds
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
Product reliability information found severe environments, Automotive HUFA series. Fairchild semiconductor products manufactured, assembled tested under ISO9000 QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF75631SK8 Rev.
HUF75631SK8
Electrical Specifications
PARAMETER STATE SPECIFICATIONS Drain Source Breakdown Voltage Zero Gate Voltage Drain Current BVDSS IDSS 250µA, (Figure 95V, 90V, 150oC Gate Source Leakage Current STATE SPECIFICATIONS Gate Source Threshold Voltage Drain Source Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction Ambient Area 0.76 (490.3 mm2) (Note (Figures Area 0.054 (34.8 mm2) (Note (Figures Area 0.0115 (7.42 mm2)(Note (Figures SWITCHING SPECIFICATIONS Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge Threshold Gate Charge Gate Source Gate Charge Gate Drain "Miller" Charge CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS 25V, 1MHz (Figure 1225 Qg(TOT) Qg(10) Qg(TH) 50V, 5.5A, Ig(REF) 1.0mA (Figures 4.75 td(ON) td(OFF) tOFF 50V, 5.5A 10V, (Figures
oC/W oC/W oC/W
25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS UNITS
±100
IGSS
±20V
VGS(TH) rDS(ON)
VDS, 250µA (Figure 5.5A, (Figure
0.033
0.039
Source Drain Diode Specifications
PARAMETER Source Drain Diode Voltage SYMBOL Reverse Recovery Time Reverse Recovered Charge dISD/dt 100A/µs dISD/dt 100A/µs TEST CONDITIONS 1.25 1.00 UNITS
©2001 Fairchild Semiconductor Corporation
HUF75631SK8 Rev.
HUF75631SK8 Typical Performance Curves
POWER DISSIPATION MULTIPLIER AMBIENT TEMPERATURE (oC) 10V, 50oC/W DRAIN CURRENT
AMBIENT TEMPERATURE (oC)
FIGURE NORMALIZED POWER DISSIPATION AMBIENT TEMPERATURE
FIGURE MAXIMUM CONTINUOUS DRAIN CURRENT AMBIENT TEMPERATURE
THERMAL IMPEDANCE
ZJA, NORMALIZED
DUTY CYCLE DESCENDING ORDER 0.05 0.02 0.01
50oC/W
0.01 SINGLE PULSE 0.001 10-5 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION NOTES: DUTY FACTOR: t1/t2 PEAK
FIGURE NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
50oC/W IDM, PEAK CURRENT 25oC TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT FOLLOWS: TRANSCONDUCTANCE LIMIT CURRENT THIS REGION 10-5 10-4 10-3 10-2 10-1 PULSE WIDTH
FIGURE PEAK CURRENT CAPABILITY
©2001 Fairchild Semiconductor Corporation
HUF75631SK8 Rev.
HUF75631SK8 Typical Performance Curves
DRAIN CURRENT 50oC/W
(Continued)
IAS, AVALANCHE CURRENT (L)(IAS)/(1.3*RATED BVDSS VDD) (L/R)ln[(IAS*R)/(1.3*RATED BVDSS VDD)
100µs
OPERATION THIS AREA LIMITED rDS(ON) SINGLE PULSE RATED 25oC VDS, DRAIN SOURCE VOLTAGE
10ms
STARTING 25oC STARTING 150oC
0.01
tAV, TIME AVALANCHE (ms)
NOTE: Refer Fairchild Application Notes AN9321 AN9322. FIGURE FORWARD BIAS SAFE OPERATING AREA FIGURE UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
DRAIN CURRENT
DRAIN CURRENT
PULSE DURATION 80µs DUTY CYCLE 0.5%
150oC 25oC
PULSE DURATION 80µs DUTY CYCLE 0.5% 25oC VDS, DRAIN SOURCE VOLTAGE
-55oC VGS, GATE SOURCE VOLTAGE
FIGURE TRANSFER CHARACTERISTICS
FIGURE SATURATION CHARACTERISTICS
NORMALIZED DRAIN SOURCE RESISTANCE PULSE DURATION 80µs DUTY CYCLE 0.5% NORMALIZED GATE THRESHOLD VOLTAGE
VDS, 250µA
10V, 5.5A JUNCTION TEMPERATURE (oC)
JUNCTION TEMPERATURE (oC)
FIGURE NORMALIZED DRAIN SOURCE RESISTANCE JUNCTION TEMPERATURE
FIGURE NORMALIZED GATE THRESHOLD VOLTAGE JUNCTION TEMPERATURE
©2001 Fairchild Semiconductor Corporation
HUF75631SK8 Rev.
HUF75631SK8 Typical Performance Curves
NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE 250µA
(Continued)
3000 CISS CAPACITANCE (pF) 1000 CRSS
COSS 1MHz
JUNCTION TEMPERATURE (oC)
DRAIN SOURCE VOLTAGE
FIGURE NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE JUNCTION TEMPERATURE
GATE SOURCE VOLTAGE
FIGURE CAPACITANCE DRAIN SOURCE VOLTAGE
WAVEFORMS DESCENDING ORDER: 5.5A GATE CHARGE (nC)
NOTE: Refer Fairchild Application Notes AN7254 AN7260. FIGURE GATE CHARGE WAVEFORMS CONSTANT GATE CURRENT
Test Circuits Waveforms
BVDSS VARY OBTAIN REQUIRED PEAK
0.01
FIGURE UNCLAMPED ENERGY TEST CIRCUIT
FIGURE UNCLAMPED ENERGY WAVEFORMS
©2001 Fairchild Semiconductor Corporation
HUF75631SK8 Rev.
HUF75631SK8 Test Circuits Waveforms
(Continued)
Qg(TOT)
Qg(10) Qg(TH) Ig(REF)
Ig(REF)
FIGURE GATE CHARGE TEST CIRCUIT
FIGURE GATE CHARGE WAVEFORMS
td(ON)
tOFF td(OFF)
PULSE WIDTH
FIGURE SWITCHING TIME TEST CIRCUIT
FIGURE SWITCHING TIME WAVEFORM
Thermal Resistance Mounting Area
maximum rated junction temperature, TJM, thermal resistance heat dissipating path determines maximum allowable device power dissipation, PDM, application. Therefore application's ambient temperature, (oC), thermal resistance (oC/W) must reviewed ensure that never exceeded. Equation mathematically represents relationship serves basis establishing rating part.
Mounting area onto which device attached whether there copper side both sides board. number copper layers thickness board. external heat sinks. thermal vias. flow board orientation. steady state applications, pulse width, duty cycle transient thermal response part, board environment they Fairchild provides thermal information assist designer's preliminary application evaluation. Figure defines device function copper (component side) area. This horizontally positioned FR-4 board with copper after 1000 seconds steady state power with flow. This graph provides necessary information calculation steady state
HUF75631SK8 Rev.
(EQ.
using surface mount devices such SOP-8 package, environment which applied will have significant influence part's current maximum power dissipation ratings. Precise determination complex influenced many factors:
©2001 Fairchild Semiconductor Corporation
HUF75631SK8
junction temperature power dissipation. Pulse applications evaluated using Fairchild device Spice thermal model manually utilizing normalized maximum transient thermal impedance curve. Displayed curve values listed Electrical Specifications table. points were chosen depict compromise between copper board area, thermal resistance ultimately power dissipation, PDM. Thermal resistances corresponding other copper areas obtained from Figure calculation using Equation defined natural area times coefficient added constant. area, square inches copper area including gate source pads.
83.2 23.6
Copper area perceivable effect transient thermal impedance pulse widths less than 100ms. pulse widths less than 100ms transient thermal impedance determined package. Therefore, CTHERM1 through CTHERM5 RTHERM1 through RTHERM5 remain constant each thermal models. listing model component values available Table
83.2 23.6*ln(AREA) (oC/W) 189oC/W 0.0115in2
152oC/W 0.054in2
Area
(EQ.
transient thermal impedance (ZJA) also effected varied copper board area. Figure shows effect copper area single pulse transient thermal impedance. Each trace represents copper area square inches corresponding descending list graph. Spice SABER thermal models provided each listed areas.
COPPER BOARD AREA DESCENDING ORDER 0.04 0.28 0.52 0.76 1.00
0.01 AREA, COPPER AREA (in2)
FIGURE THERMAL RESISTANCE MOUNTING AREA
ZJA, THERMAL IMPEDANCE (oC/W)
10-1 RECTANGULAR PULSE DURATION
FIGURE THERMAL IMPEDANCE MOUNTING AREA
©2001 Fairchild Semiconductor Corporation
HUF75631SK8 Rev.
HUF75631SK8 PSPICE Electrical Model
.SUBCKT HUF75631SK8
1.88e-9 1.88e-9 1.12e-9
LDRAIN
July 1999
DBODY DBODYMOD DBREAK DBREAKMOD DPLCAP DPLCAPMOD EBREAK 114.8 EVTHRES EVTEMP LDRAIN 1.0e-9 LGATE 1.12e-9 LSOURCE 1.29e-10 MMED MMEDMOD MSTRO MSTROMOD MWEAK MWEAKMOD RBREAK RBREAKMOD RDRAIN RDRAINMOD 1.86e-2 RGATE 1.88 RLDRAIN RLGATE 11.2 RLSOURCE 1.29 RSLC1 RSLCMOD 1e-6 RSLC2 RSOURCE RSOURCEMOD 7.55e-3 RVTHRES RVTHRESMOD RVTEMP RVTEMPMOD S1AMOD S1BMOD S2AMOD S2BMOD
GATE RLGATE
DPLCAP
RLDRAIN DBREAK EBREAK MWEAK MMED MSTRO DBODY
DRAIN RSLC1 ESLC
RSLC2
LGATE EVTEMP RGATE EVTHRES
VBAT ESLC .MODEL DBODYMOD 1.02e-12 5.39e-3 TRS1 1.01e-3 TRS2 9.97e-7 1.49e-9 9.98e-8 0.58) .MODEL DBREAKMOD 3.03e- 1TRS1 2.37e- 3TRS2 .MODEL DPLCAPMOD (CJO 1.44e- 1e-3 0.80) .MODEL MMEDMOD NMOS (VTO 3.04 1.75 1e-30 1.88) .MODEL MSTROMOD NMOS (VTO 3.47 1e-30 .MODEL MWEAKMOD NMOS (VTO 2.71 0.08 1e-30 18.8 0.1) .MODEL RBREAKMOD (TC1 1.09e- 3TC2 .MODEL RDRAINMOD (TC1 9.09e-3 2.74e-5) .MODEL RSLCMOD (TC1 5.00e-3 .MODEL RSOURCEMOD (TC1 1.00e-3 .MODEL RVTHRESMOD (TC1 -2.66e-3 -1.01e-5) .MODEL RVTEMPMOD (TC1 -2.38e- 3TC2 1.39e-6) .MODEL S1AMOD VSWITCH (RON 1e-5 .MODEL S1BMOD VSWITCH (RON 1e-5 .MODEL S2AMOD VSWITCH (RON 1e-5 .MODEL S2BMOD VSWITCH (RON 1e-5 .ENDS ROFF ROFF ROFF ROFF -5.5 VOFF= -4.0) -4.0 VOFF= -5.5) -1.0 VOFF= 0.0) VOFF= -1.0)
NOTE: further discussion PSPICE model, consult PSPICE Sub-Circuit Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written William Hepp Frank Wheatley.
©2001 Fairchild Semiconductor Corporation
RDRAIN
LSOURCE RSOURCE RLSOURCE RBREAK RVTEMP SOURCE
VBAT
RVTHRES
HUF75631SK8 Rev.
HUF75631SK8 SABER Electrical Model
July 1999 template huf75631sk8 n2,n1,n3 electrical n2,n1,n3 iscl d.model dbodymod 1.02e-12, 1.49e-9, 9.98e-8, 0.58) d.model dbreakmod d.model dplcapmod (cjo 1.44e-9, 1e-30, 0.80 m.model mmedmod (type=_n, 3.04, 1.75, 1e-30, m.model mstrongmod (type=_n, 3.47, 1e-30, m.model mweakmod (type=_n, 2.71, 0.08, 1e-30, sw_vcsp.model s1amod (ron 1e-5, roff 0.1, -5.5, voff sw_vcsp.model s1bmod (ron =1e-5, roff 0.1, voff -5.5) sw_vcsp.model s2amod (ron 1e-5, roff 0.1, voff sw_vcsp.model s2bmod (ron 1e-5, roff 0.1, voff c.ca 1.88e-9 c.cb 1.88e-9 c.cin 1.12e-9 d.dbody model=dbodymod d.dbreak model=dbreakmod d.dplcap model=dplcapmod i.it l.ldrain 1e-9 l.lgate 1.12e-9 l.lsource 1.29e-10
GATE RLGATE LGATE EVTEMP RGATE MSTRO
LDRAIN DPLCAP RSLC1 RSLC2 ISCL RLDRAIN RDBREAK DBREAK MWEAK MMED EBREAK RDBODY DRAIN
EVTHRES
RDRAIN
DBODY
LSOURCE RLSOURCE
SOURCE
m.mmed model=mmedmod, l=1u, w=1u m.mstrong model=mstrongmod, l=1u, w=1u m.mweak model=mweakmod, l=1u, w=1u res.rbreak 1.09e-3, res.rdbody 5.39e-3, 1.01e-3, 9.97e-7 res.rdbreak 3.03e-1, 2.37e-3, res.rdrain 1.86e-2, 9.09e-3, 2.74e-5 res.rgate 1.88 res.rldrain res.rlgate 11.2 res.rlsource 1.29 res.rslc1 1e-6, 5.00e-3, res.rslc2 res.rsource 7.55e-3, 1.00e-3, res.rvtemp -2.38e-3, 1.39e-6 res.rvthres -2.66e-3, -1.01e-5 spe.ebreak 114.8 spe.eds spe.egs spe.esg spe.evtemp spe.evthres sw_vcsp.s1a model=s1amod sw_vcsp.s1b model=s1bmod sw_vcsp.s2a model=s2amod sw_vcsp.s2b model=s2bmod v.vbat dc=1
RSOURCE RBREAK RVTEMP
VBAT
RVTHRES
equations (n51->n50) +=iscl iscl: v(n51,n50)
©2001 Fairchild Semiconductor Corporation
HUF75631SK8 Rev.
HUF75631SK8 SPICE Thermal Model
July 1999 HUF75631SK8 Copper Area 0.04 CTHERM1 2.0e-3 CTHERM2 5.0e-3 CTHERM3 1.0e-2 CTHERM4 4.0e-2 CTHERM5 9.0e-2 CTHERM6 1.2e-1 CTHERM7 CTHERM8 RTHERM1 RTHERM2 RTHERM3 RTHERM4 RTHERM5 RTHERM6 RTHERM7 RTHERM8
RTHERM1 CTHERM1 JUNCTION
RTHERM2
CTHERM2
RTHERM3
CTHERM3
RTHERM4
CTHERM4
RTHERM5
CTHERM5
SABER Thermal Model
Copper Area 0.04 template thermal_model thermal_c ctherm.ctherm1 2.0e-3 ctherm.ctherm2 5.0e-3 ctherm.ctherm3 1.0e-2 ctherm.ctherm4 4.0e-2 ctherm.ctherm5 9.0e-2 ctherm.ctherm6 1.2e-1 ctherm.ctherm7 ctherm.ctherm8 rtherm.rtherm1 rtherm.rtherm2 rtherm.rtherm3 rtherm.rtherm4 rtherm.rtherm5 rtherm.rtherm6 rtherm.rtherm7
RTHERM6
CTHERM6
RTHERM7
CTHERM7
RTHERM8
CTHERM8
CASE
rtherm.rtherm8
TABLE THERMAL MODELS COMPONENT CTHERM6 CTHERM7 CTHERM8 RTHERM6 RTHERM7 RTHERM8 0.04 1.2e-1 0.28 1.5e-1 38.7 0.52 2.0e-1 31.3 0.76 2.0e-1 29.7 2.0e-1
©2001 Fairchild Semiconductor Corporation
HUF75631SK8 Rev.
TRADEMARKS
following registered unregistered trademarks Fairchild Semiconductor owns authorized intended exhaustive list such trademarks.
Quiet SeriesDISCLAIMER
FAST
QFETQSQT OptoelectronicsQuiet SeriesSILENT SWITCHER
SMART SuperSOTTM-6 SuperSOTTM-8
VCX
STAR*POWER used under license
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Preliminary
First Production
Identification Needed
Full Production
Obsolete
Production
This datasheet contains specifications product that been discontinued Fairchild semiconductor. datasheet printed reference information only.
Rev.

5.5A, 100V, 0.039 Ohm, N-Channel, UltraFET® Power MOSFET Packaging

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