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Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetri
Top Searches for this datasheetACT-7000ASC 64-Bit Superscaler Microprocessor Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized system level price/performance Integrated memory management unit (ACT52xx compatible) 225, 300, operating frequency Consult Factory latest speeds MIPS Superset Instruction Architecture second peak throughput max. freq., multiplexed address/data Supports clock multipliers 2.5, 3.5, 4.5, IEEE 1149.1 JTAG (TAP) boundary scan Fully associative joint (shared translations) dual entries pages entry DTLB entry ITLB Variable page size (4KB 16MB increments) Specialized integer Multiply-Accumulate instruction, (MAD/MADU) three-operand multiply instruction (MUL/U) line cache locking primaries secondary Bypass secondary cache option Test/Break-point (Watch) registers emulation debug Performance counter system software tuning debug fully prioritized vectored interrupts external, internal, software Fast Hit-Writeback-Invalidate Hit-Invalidate cache operations efficient cache management Embedded application enhancements High performance interface (RM52xx compatible) Integrated primary secondary caches 4-way associative with byte line size 16KB instruction 16KB data: non-blocking write-back write-through 256KB on-chip secondary: unified, non-blocking, block writeback Data PREFETCH instruction allows processor overlap cache miss latency instruction execution Floating point combined multiply-add instruction increases performance signal processing graphics applications Conditional moves reduce branch frequency Index address modes (register register) High-performance floating point unit FLOPS maximum MIPS instruction Single cycle repeat rate common single-precision operations some double-precision operations Single cycle repeat rate single-precision combined multiplyadd operations cycle repeat rate double-precision multiply double-precision combined multiply-add operations Standby reduced power mode with WAIT instruction watts typical 1.65V Int., 3.3V I/O, 300MHz Fully static CMOS design with dynamic power down logic Embedded supply de-coupling capacitors additional filter components 208-lead CQFP, cavity-up package (F17) 208-lead CQFP, inverted footprint (F24), with same rotation commercial PMC-Sierra RM5261A BLOCK DIAGRAM Chip 256K Byte Secondary Cache, Associative Secondary Tags Primary Data Cache Associative Secondary Tags DTag DTLB Secondary Tags ITag ITLB Secondary Tags Primary Instruction Cache Associative Store Buffer Write Buffer Read Buffer Buffer Address Buffer Prefetch Buffer Instruction Dispatch Unit Pipe Register Pipe Register F-Pipe M-Pipe Floating-Point Load Align Floating-Point Register File Packer Unpacker Comparator Floating-Point MultAdd, Add, Sub, Cvt, Div, Sqrt Multiplier Array Floating Point Control Joint Coprocessor System Memory Control Incrementer Branch Adder ITLB Virtuals Program Counter Load Aligner Integer Register File Pipe Adder StAin/Sh Logicals Pipe Adder Shifter Logicals DTLB Virtuals PLL/Clocks Mult. Div. Madd eroflex Circuit Technology MIPS RISC Microprocessors SCD7000A 1/29/02 Integer Control Package Information "F17" CQFP Leads 1.131 (28.727) 1.109 (28.169) .0236 (.51) .0158 (.49) .010R .010R .015 (.381) .009 (.229) 1.009 (25.63) .9998 (25.37) Spaces .0197 Spaces .50) .130 (3.302) 0°±5° .100 (2.540) .080 (2.032) .035 (.889) .025 (.635) .010 (.253) .007 (.178) Detail Chamfer Detail .960 (24.384) .055 (1.397) .115 (2.921) Units: Inches (Millimeters) .005 (.127) .008 (.202) 1.331 (33.807) 1.269 (32.233) .055 (1.397) .045 (1.143) Note: rotation opposite PMC-Sierra PQUAD cavity-up construction. Package Information "F24" Inverted CQFP Leads 1.131 (28.727) 1.109 (28.169) .0236 (.51) .0158 (.49) .012R .012R .055 (1.397) .100 (2.540) .080 (2.032) .060 (1.524) .040 (1.016) .010 (.253) .007 (.178) .055 (1.397) .045 (1.143) 1.009 (25.63) .9998 (25.37) Spaces .0197 Spaces .50) .115 (2.921) 0°±5° Chamfer Detail .139 (3.531) Detail Units: Inches (Millimeters) .005 (.127) .008 (.202) .960 (24.384) 1.331 (33.807) 1.291 (32.791) .024 (.610) .010 (.253) Note: rotation Identical PMC-Sierra PQUAD cavity-down construction. Aeroflex Circuit Technology SCD7000A 2/29/02 Plainview (516) 694-6700 ACT- 7000ASC Microprocessor CQFP Pinouts "F17" "F24" Aeroflex Circuit Technology Function VccIO VccIO SysAD4 SysAD36 SysAD5 SysAD37 VccInt SysAD6 SysAD38 VccIO SysAD7 SysAD39 SysAD8 SysAD40 VccInt SysAD9 SysAD41 VccIO SysAD10 SysAD42 SysAD11 SysAD43 VccInt SysAD12 SysAD44 VccIO SysAD13 SysAD45 SysAD14 SysAD46 VccInt SysAD15 SysAD47 VccIO ModeClock JTDO JTDI JTCK JTMS VccIO Function VccIO ModeIn RdRdy* WrRdy* ValidIn* ValidOut* Release* VccP VssP SysClock VccInt VccIO VccInt SysCmd0 SysCmd1 SysCmd2 SysCmd3 VccIO SysCmd4 SysCmd5 VccIO SysCmd6 SysCmd7 SysCmd8 SysCmdP VccInt VccInt VccIO Int0* Int1* Int2* Int3* Int4* Int5* VccIO Function VccIO NMI* ExtRqst* Reset* ColdReset* VccOK BigEndian VccIO SysAD16 SysAD48 VccInt SysAD17 SysAD49 SysAD18 SysAD50 VccIO SysAD19 SysAD51 VccInt SysAD20 SysAD52 SysAD21 SysAD53 VccIO SysAD22 SysAD54 VccInt SysAD23 SysAD55 SysAD24 SysAD56 VccIO SysAD25 SysAD57 VccInt SysAD26 SysAD58 SysAD27 SysAD59 VccIO Function VccIO SysAD28 SysAD60 SysAD29 SysAD61 VccInt SysAD30 SysAD62 VccIO SysAD31 SysAD63 SysADC2 SysADC6 VccInt SysADC3 SysADC7 VccIO SysADC0 SysADC4 VccInt SysADC1 SysADC5 SysAD0 SysAD32 VccIO SysAD1 SysAD33 VccInt SysAD2 SysAD34 SysAD3 SysAD35 VccIO VccIO SCD7000A 2/29/02 Plainview (516) 694-6700 CIRCUIT TECHNOLOGY Sample Ordering Information Part Number ACT-7000ASC-300F17I ACT-7000ASC-300F17C ACT-7000ASC-300F17T ACT-7000ASC-300F17M Screening Industrial Temperature Commercial Temperature Military Temperature Military Screening Speed (MHz) Package Lead CQFP Lead CQFP Lead CQFP Lead CQFP Part Number Breakdown ACT- 7000A Aeroflex Circuit Technology Base Processor Type Cache Style Secondary Cache Screening Commercial Temp, +70°C Industrial Temp, -40°C +85°C Military Temp, -55°C +125°C Military Temp, -55°C +125°C, Screened MIL-PRF-38534 Compliant/SMD applicable Maximum Pipeline Freq. 225MHz 300MHz 350MHz 400MHz (Future Option) Package Type Size Surface Mount Package 1.120" Lead CQFP 1.120" Inverted Lead CQFP Screened individual test methods MIL-STD-883 This document may, wholly partially, subject change without notice. Aeroflex reserves right make changes products specifications time without notice. Aeroflex will held responsible damage user property that result from accidents, misuse, other causes arising during operation user's unit. Aeroflex does assume responsibility circuitry described other than circuitry embodied Aeroflex product. company makes representations that circuitry described herein free from patent infringement other rights third parties, which result from use. license granted implication otherwise under patent, patent rights, other rights, Aeroflex. logo RISCMark trademarks PMC-Sierra, Inc. MIPS registered trademark MIPS Technologies, Inc. other trademarks respective property trademark holders. Aeroflex Circuit Technology South Service Road Plainview York 11803 www.aeroflex.com Aeroflex Circuit Technology Telephone: (516) 694-6700 FAX: (516) 694-6715 Toll Free Inquiries: (800) 843-1553 E-Mail: sales-mcm@aeroflex.com SCD7000A 2/29/02 Plainview (516) 694-6700 Other recent searchesSGA-6386 - SGA-6386 SGA-6386 Datasheet MAX4518 - MAX4518 MAX4518 Datasheet MAX4519 - MAX4519 MAX4519 Datasheet MABACT0047 - MABACT0047 MABACT0047 Datasheet LTC2053 - LTC2053 LTC2053 Datasheet KTC4075 - KTC4075 KTC4075 Datasheet
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