80CH COMMON SEGMENT DRIVER MATRIX INTRODUCTION QFP-1420C KS0086 d

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80CH COMMON SEGMENT DRIVER MATRIX INTRODUCTION QFP-1420C KS0086 d

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KS0086
80CH COMMON SEGMENT DRIVER MATRIX
INTRODUCTION QFP-1420C KS0086 driver which fabricated power CMOS high voltage process technology. segment driver mode, interfaced 1-bit serial 4-bit parallel method controller. common driver mode, dual type mode applicable. segment mode application, power down function reduces power consumption.
FEATURES Power supply voltage Supply voltage display (VDD-VEE) 4-bit parallel/1-bit serial data processing segment mode). Single mode operation dual mode operation common mode). Power down function segment mode). Applicable duty 1/64 1/256 Interface DRIVER (cascade) KS0086 (cascade) KS0086 TQFP-1414
High voltage CMOS process Available type bare chip, 100-QFP, 100-TQFP 100-TAB.
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
PACKAGE INFORMATION KS0086 TYPE 100QFP PACKAGE
SC30 SC29 SC28 SC27 SC26 SC25 SC24 SC23 SC22 SC21 SC20 SC19 SC18 SC17 SC16 SC15 SC14 SC13 SC12 SC11 SC10
SC31 SC32 SC33 SC34 SC35 SC36 SC37 SC38 SC39 SC40 SC41 SC42 SC43 SC44 SC45
D1_SID D2_DL D3_DM D4_DR DISP0FFB
KS0086
SC46 SC47 SC48 SC49 SC50 SC51 SC52 SC53 SC54 SC55 SC56 SC57 SC58 SC59 SC60 SC61 SC62 SC63 SC64 SC65 SC66 SC67 SC68 SC69 SC70 SC71 SC72 SC73 SC74 SC75 SC76 SC77 SC78 SC79 SC80
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
KS0086TB TYPE 100TCP PACKAGE
KS0086
TYPE INPUT LEAD PITCH 0.80
OUTPUT LEAD PITCH 0.22
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
DIAGRAM (KS0086/KS0086TB))
SC52 SC53 SC54 SC55 SC56 SC57 SC58 SC59 SC60 SC61 SC62 SC63 SC64 SC65 SC66 SC67 SC68 SC69 SC70 SC71 SC72 SC73 SC74 SC75 SC76 SC77 SC78 SC79 SC80
SC40 SC39 SC38 SC37 SC36 SC35 SC34 SC33 SC32 SC31 SC30
SC51 SC50 SC59 SC48 SC47 SC46 SC45 SC44 SC43 SC42 SC41
(0,0)
CHIP SIZE 4530 4390 SIZE UNIT
KS0086
SC29 SC28 SC27 SC26 SC25 SC24 SC23 SC22 SC21 SC20 SC19 SC18 SC17 SC16 SC15 SC14 SC13 SC12 SC11 SC10
D4_DR
D3_DM
DISPOFFB
D2_DL
D1_SID
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
LOCATION (KS0086/KS0086TB)
NAME SC51 SC52 SC53 SC54 SC55 SC56 SC57 SC58 SC59 SC60 SC61 SC62 SC63 SC64 SC65 SC66 SC67 SC68 SC69 SC70 SC71 SC72 SC73 SC74 SC75 SC76 SC77 SC78 SC79 SC80 COORDINATES -1690 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -1479 -1275 -1150 -1025 1959 1884 1750 1616 1482 1348 1214 1080 -126 -260 -394 -528 -662 -797 -931 -1065 -1199 -1333 -1467 -1601 -1735 -1884 -1959 -1959 -1959 -1959 NAME DISPOFFB D4_DR D3_DM D2_DL D1_SID SC10 SC11 SC12 SC13 SC14 SC15 SC16 SC17 SC18 COORDINATES -900 -775 -600 -475 -350 -225 -100 1040 1165 1290 1496 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1884 -1735 -1601 -1467 -1333 -1199 -1065 -931 -797 -662 -528 -394 -260 -126 NAME SC19 SC20 SC21 SC22 SC23 SC24 SC25 SC26 SC27 SC28 SC29 SC30 SC31 SC32 SC33 SC34 SC35 SC36 SC37 SC38 SC39 SC40 SC41 SC42 SC43 SC44 SC45 SC46 SC47 SC48 SC49 SC50 COORDINATES 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 1690 1529 1368 1207 1046 -241 -402 -563 -724 -885 -1046 -1207 -1368 -1529 1080 1214 1348 1482 1616 1750 1884 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
KS0086TQ TYPE 100TQFP PACKAGE
D1_SID D2_DL D3_DM D4_DR DISPOFFB SC80 SC79 SC78 SC10 SC11 SC12 SC13 SC14 SC15 SC16 SC17 SC18 SC19 SC20 SC21 SC22
SC77 SC76 SC75 SC74 SC73 SC72 SC71 SC70 SC69 SC68 SC67 SC66 SC65 SC64 SC63 SC62 SC61 SC60 SC59 SC58 SC57 SC56 SC55 SC54 SC53
KS0086
SC23 SC24 SC25 SC26 SC27
SC28 SC29 SC30 SC31 SC32 SC33 SC34 SC35 SC36 SC37 SC38 SC39 SC40 SC41 SC42 SC43 SC44 SC45 SC46 SC47 SC48 SC49 SC50 SC51 SC52
TYPE TQFP 1414 THICKNESS 1.00 0.05) SIZE 14.00 0.10) 14.00 0.10) PITCH WIDTH 0.20 -0.03) LENGTH 1.00 0.1)
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
DIAGRAM (KS0086TQ)
SC52 SC51 SC50 SC59 SC48 SC47 SC46 SC45 SC44 SC43 SC42 SC41 SC53 SC54 SC55 SC56 SC57 SC58 SC59 SC60 SC61 SC62 SC63 SC64 SC65 SC66 SC67 SC68 SC69 SC70 SC71 SC72 SC73 SC74 SC75 SC76 SC77
SC40 SC39 SC38 SC37 SC36 SC35 SC34 SC33 SC32 SC31 SC30 SC29 SC28
(0,0)
CHIP SIZE 4410 4600 SIZE UNIT BN2086X
SC27 SC26 SC25 SC24 SC23 SC22 SC21 SC20 SC19 SC18 SC17 SC16 SC15 SC14 SC13 SC12 SC11 SC10
D1_SID
SC78 SC79 SC80
D4_DR
D3_DM
DISPOFFB
D2_DL
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
LOCATION (KS0086TQ)
NAME SC28 SC29 SC30 SC31 SC32 SC33 SC34 SC35 SC36 SC37 SC38 SC39 SC40 SC41 SC42 SC43 SC44 SC45 SC46 SC47 SC48 SC49 SC50 SC51 SC52 SC53 SC54 SC55 SC56 SC57 SC58 SC59 SC60 SC61
COORDINATES -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1969 -1640 -1515 -1390 -1265 -1140 -1015 -890 -765 -640 1691 1551 1411 1271 1131 -151 -291 -431 -571 -711 -851 -991 -1131 -1271 -1411 -1551 -1691 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064
NAME SC62 SC63 SC64 SC65 SC66 SC67 SC68 SC69 SC70 SC71 SC72 SC73 SC74 SC75 SC76 SC77 SC78 SC79 SC80 DISPOFFB D4_DR D3_DM D2_DL
COORDINATES -515 -390 -265 -140 1110 1235 1360 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2064 -2029 -1904 -1779 -1475 -1270 -1145 -1020 -895 -770 -595 -470 -345 -220
NAME D1_SID SC10 SC11 SC12 SC13 SC14 SC15 SC16 SC17 SC18 SC19 SC20 SC21 SC22 SC23 SC24 SC25 SC26 SC27
COORDINATES 1969 1969 1969 1969 1969 1969 1969 1360 1235 1110 -140 -265 -390 -515 -640 -765 -890 -1015 -1140 -1265 -1390 -1515 -1640 1049 1174 1299 1504 1904 2029 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064 2064
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
BLOCK DIAGRAM
SC31
SC78 SC79 SC80
80-bit 4-level driver
DISPOFFB
Output level selector
80-bit level driver
80-bit data latch common data bi-directional shift register
D1_SID D2_DL D3_DM D4_DR
4-bit segment data bi-directional shift register
Data latch control Clock control Power down function
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
BLOCK DESCRIPTION
Name
Function Generates latch clock (LCK), shift clock (SCK) control clock timing according input CL1, control inputs (CS, AMS). common driver application mode, this block generates shift clock (LCK) common data I-directional shift register. Determines direction segment data shift, input data each Idirectional shift register. 4-bit segment data parallel transfer mode, data shifted 4-bit unit. common driver application mode, data transferred common data shift register directly, which disables this block. Controls clock enable state current driver according input value enable (ELB ERB). enable input value "Low", every clock current driver enabled clock control block works. enable input "High", current driver disabled input data value effect output level. power consumption lowered. Controls output voltage level according input control DISPOFFB) (refer DESCRIPTION). Stores output data value shifting input values. 1-bit serial interface mode application, shift clocks (SCK) needed store display data. 4-bit parallel transfer mode application, only clocks needed. common driver application mode, this block does work. segment driver application mode, data from 20x4-bit segment data shift register latched segment driver output. single-type common driver application,1-bit input data (from pin) shifted latched direction according signal input. dual-type common application mode, 80-bit registers divided blocks controlled independently (refer NOTE Voltage level shifter block high voltage part. inputs this block logical voltage level outputs this block high voltage level value. These values input driver. Selects output voltage level according latched data value. data value "High" driver output selected voltage level V5), reverse case driver output value nonselected level (V12 V43). segment driver application mode, nonselected output value when common driver application, this value becomes
COM/ COM/
Clock control
Data latch control
Power down function
Output level selector
COM/
20x4-bit segment data I-directional shift register
80-bit data latch/common data I-directional shift register
COM/
80-bit level shifter
80-bit 4-level driver
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
DESCRIPTION
V12, V43, Input driver output voltage level Power supply
Input Output
Name
Function
Logical "High" input port 10%, 10%) (GND) Logical "Low" high voltage part Bias supply voltage input drive LCD. Bias voltage divided resistance usually used supply voltage source (refer NOTE Display data output which corresponds respective latch contents. V12, selected display driving voltage source according combination latched data level signal (refer NOTE Clock pulse input bi-directional shift register. segment driver application mode, data shifted 4bit segment data shift register falling edge this clock pulse. clock pulse, which input when enable (ELB/ERB) active condition, invalid. common driver application mode, data shifted 80-bit common data bi-directional shift register clock. Hence, this clock used (Open connect this VDD). Alternate signal input driving. Normal frame inversion signal input this pin. segment driver application mode, this signal used latching shift register contents falling edge this clock pulse. pulse "High" level initializes power-down function block. common driver application mode, used shifting clock common output data. Control input driver output (SC1~SC80) level, during "Low" value input. becomes non-selected level output from every output segment drivers every output common drivers. When "Low", KS0086 used 80-bit segment driver. When "High", KS0086 80-bit common driver According input value pin, application mode KS0086 differs shown below. Application mode 4-bit parallel interface mode 1-bit serial interface mode single-type application mode dual-type application mode COM/SEG
Interface
Power
Power
SC80
Output
driver output
Input
Data shift clock
Controller
Input
signal driver output
Controller
Input
Data latch clock
Controller
DISPOFFB
Input
Display control COM/SEG mode control
Controller
Input
VDD/VSS
Input
Application mode select
VDD/VSS
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
DESCRIPTION (continued) Input Output Name Function
segment driver application mode, these pins used 4-bit data input (when 4-bit parallel interface mode "Low"), D1_SID used serial data input other pins used (connect these VDD) (when 1-bit serial interface mode "High"). common driver application mode, data shifted from D2_DL(D4_DR) D4_DR(D2_DL), when single type interface mode (AMS "Low"). dual-type application case, data shifted from D2_DL D3_DM (D4_DR D3_DM) D4_DR(D2_DL). each case direction data shift connection data pins determined input (refer NOTE NOTE When "Low", data shifted from left right. When "High", direction reversed. (refer NOTE3) segment driver application mode, internal operation enabled only when enable input (ELB ERB) "Low" (power down function). When several drivers serially connected, enable state each driver shifted according input. Connect these pins below. common driver application mode, power down function used. Open these pins.
Interface
D1_SID, D2_DL, D3_DM, D4_DR
Input/ Output
Display data input serial input data left, right data input output
Controller
Input Input/ Output
Shift direction control Enable data input/output
VDD/VSS
ELB,
SEGMENT DRIVER Output (open) Input (VSS) Input (VSS) Output (open)
NOTE Output level control don't care Latched data DISPOFFB Output level (SC1 SC80) Mode V12(V2) V43(V3) Mode V12(V1) V43(V4)
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
NOTE driving voltage application circuit Segment driver application "Low") (n-4)R
driver driver
SEG1 SEG80 Panel
KS0086
V0,V5 V2,V3
Selection level Non-selection level
(when 1/64 duty) (when 1/256 duty)
Common driver application "High") (n-4)R
driver
SEG1 SEG80 Panel
KS0086
V0,V5 V1,V4 Selection level Non-selection level
(when 1/64 duty) (when 1/256 duty)
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
NOTE Data shift direction according control signals When "Low" (segment driver application)
Application mode Data direction Input
4-bit parallel data transfer mode (SEG)
last data
Shift direction first data D1_SID, D2_DL, D3_DM, D4_DR
Shift direction first data
last data
1-bit serial data transfer mode (SEG)
last data (D1_SID)
Shift direction
first data _SID
first data
Shift direction
last data
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
When "High" (common driver application)
Application mode Input
Data direction
Shift direction
D2_DL
single-type application mode (COM)
Input data (D2_DL)
Output data (D4_DR)
Shift direction
D4_DR
Output data (D2_DL)
Input data (D4_DR)
Shift direction
D2_DL, D3_DM
dual-type application mode (COM)
Input data1 (D2_DL)
Input data2 (D3_DM)
Output data (D4_DR)
Shift direction
D4_DR, D3_DM
Output data (D2_DL)
Input data2 (D3_DM)
Input data1 (D4_DR)
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
NOTE Usage data pins don't care COM/SEG pin) Application mode (AMS pin) 4-bit parallel interface mode (AMS "Low") 1-bit serial interface mode (AMS "High") single-type application mode (AMS "Low") "High") dual-type application mode (AMS "High") Data interface D1_SID (input) (input) (input) (output) (input1) (output2) D2_DL (input2) D3_DM (input3) D4_DR (input4)
"Low")
Connect (output) (input) (output2) (input1)
open open
open
(input2) (input2)
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
MAXIMUM ABSOLUTE LIMIT Characteristic Power supply voltage Driver supply voltage Input voltage Operating temperature Storage temperature Symbol VLCD Topr Tstg Value -0.3 +7.0 -0.3 +150
Unit
NOTE: Voltage greater than above damage circuit.
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
ELECTRICAL CHARACTERISTICS CHARACTERISTICS SEGMENT DRIVER APPLICATION Characteristic Operating voltage1 Input voltage (*1) Output voltage (*2) Input leakage current 1(*1) Input leakage current 2(*3) resistance (*4) Symbol VLCD IIL1 IIL2 ISTBY Supply current (*5) Test Condition -0.4 VDDto fCL1=32 M=VSS fCL1=32 fM=80 VDD=5 VDD=3 VDD=5 0.8VDD VDD-0.4 (Vss +85oC) 0.2VDD Unit
NOTES (*1) Applied CL1, CL2, ELB, ERB, D1_SID D4_DR, SHL, DISPOFFB, (*2) ELB, (*3) V12, V43, (*4) VLCD=VDD-VEE, V0=VDD=5 V5=VEE=-23 V12=VDD-2/n(VLCD), V43=VEE+2/n(VLCD), (1/256 duty, 1/17 bias) (*5) V0=VDD, V12=1.71 V(VDD=5V) -0.06 V(VDD=3 V43=-19.71 V(VDD=5 -19.94 V(VDD=3 V5=VEE=-23 no-load condition (1/256 duty, 1/17 bias) 4-bit parallel interface mode ISTBY VDD=5 fCL2=5.12 MHz, SHL=VSS, DISPOFFB=VDD, M=VSS, display data pattern 0000 VDD=3 CL2=4 MHz, display data pattern 0101 VDD=5 fCL2=5.12 MHz, display data pattern 0101 VDD=5 CL2=5.12 MHz, display data pattern 0101,
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
CHARACTERISTICS (continued) COMMON DRIVER APPLICATION Characteristic Operating voltage Input voltage (*1) Output voltage (*3) Input leakage current 1(*1) Input leakage current 2(*2) Input leakage current 3(*4) resistance (*5) Symbol VLCD IIL1 IIL2 IIL3 ISTBY Supply current (*6) Test Condition -0.4 (PULL fCL1=32 fCL1=32 fM=80 VDD=5 VDD=3 VDD=5 0.8VDD VDD-0.4
(Vss +85oC) -125 0.2VDD -250 Unit
NOTES (*1) Applied CL1, D2_DL (SHL=LOW), D4_DR (SHL=HIGH), SHL, DISPOFFB, (*2) Pull-up input pins CL2, D1_SID, D3_DM (AMS=HIGH), (SHL=LOW), (SHL=HIGH) (*3) D2_DL (SHL=HIGH) ,D4_DR (SHL=LOW) (*4) V12, V43, (*5) VLCD=VDD-VEE, V0=VDD=5 V5=VEE=-23 V12=VDD-1/n(VLCD), V43=VEE+1/n(VLCD), 17(1/256 duty, 1/17 bias) (*6) V0=VDD, V12=3.35 V(VDD=5 1.47 V(VDD=3 V43=-21.35 V(VDD=5 -21.47 V(VDD=3 V5=VEE=-23 no-load condition (1/256 duty, 1/17 bias) single-type mode operation AMS=VSS, SHL=VSS, DISPOFFB=VDD D1_SID=D3_DM=VDD, D4_DR=OPEN, ELB=ERB=OPEN, ISTBY VDD=5 M=VSS, D2_DL=VSS fM=80 D2_DL=VDD VDD=3 display data pattern 10000000., 01000000., 00100000., 00010000., VDD=5 display data pattern 10000000., 01000000., 00100000., 00010000., fM=80Hz, D2_DL=VDD VDD=5 current through Pin, display data pattern 10000000., 01000000., 00100000., 00010000.
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
CHARACTERISTICS SEGMENT DRIVER APPLICATION
Test Condition VDD=5
(Vss +85oC)
VDD=3 Unit
Characteristic
Symbol
Clock cycle time Clock pulse width Clock rise/fall time Data set-up time Data hold time Clock set-up time Clock hold time Propagation delay time
tWCK tR/tF tPHL
Duty=50% Output Output Input Input
ELB,ERB set-up time DISPOFFB pulse width DISPOFFB clear time propagation delay time propagation delay time DISPOFFB propagation delay time
tPSU tWDL tPD1 tPD2 tPD3
CL=15
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
CHARACTERISTICS (continued) COMMON DRIVER APPLICATION
Test Condition VDD=5
(Vss +85oC)
VDD=3V±10% Unit
Characteristic
Symbol
Clock cycle time Clock pulse width Clock rise/fall time Data set-up time Data hold time DISPOFFB pulse width DISPOFFB clear time Output delay time propagation delay time propagation delay time DISPOFFB propagation delay time
tWCK tR/tF tWDL tPD1 tPD2 tPD3
Duty=50%
CL=15
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
CHARACTERISTICS (continued) SEGMENT DRIVER APPLICATION TIMING
0.8VDD 0.8VDD
0.2VDD
tWCK
0.2VDD
0.8VDD 0.2VDD
0.8VDD
0.8VDD
0.2VDD
0.8VDD
0.2VDD
tWCK
0.8VDD 0.2VDD
D1_SID~D4_DR tWDL DISPOFFB
0.2VDD
0.2VDD
0.8VDD
tPHL ELB,ERB (Output1) ELB,ERB (Input2)
0.2VDD
tPSU
0.2VDD
0.8VDD
0.2VDD
tPD1 tPD2
0.2VDD
DISPOFFB
0.8VDD 0.2VDD
tPD3 SC1~SC80 (Latched data)
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
CHARACTERISTICS (continued) COMMON DRIVER APPLICATION TIMING
0.8VDD 0.8VDD
0.2VDD
tWCKH
0.8VDD
0.2VDD
0.8VDD 0.2VDD
(*1)
0.2VDD
0.8VDD
(*1)
0.2VDD
DISPOFFB
(*1) When single-type interface mode D2_DL(SHL="L"), D4_DR(SHL="H") D4_DR(SHL="L"), D2_DL(SHL="H") When dual-type interface mode D2_DL D3_DM(SHL="L"), D4_DR D3_DM(SHL="H") D4_DR(SHL="L"), D2_DL(SHL="H")
0.8VDD
0.2VDD
0.2VDD
0.8VDD
DISPOFFB
0.2VDD
tPD3 SC1~SC80 (Latched data)
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
POWER DOWN FUNCTION case cascade connection segment mode drivers, KS0086 "power down function" order reduce power consumption.
Enable input
Enable output
Current driver status While ERB="Low", current driver enabled. While ELB="Low", current driver enabled.
other drivers status Disabled Disabled
case common driver application, power down function does work.
ELB1(Input1) ERB1/ELB2 (Output1/Input2) ERB2/ELB3 (Output2/Input3) ERB3/ELB4 (Output3/Input4)
ELB4(Output4)
NOTE "High" (ELB Input, Output) Current KS0086's must connected next KS0086's ELB. When 4-bit parallel interface mode When 1-bit serial interface mode
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
OPERATION TIMING DIAGRAM 4-BIT PARALLEL MODE INTERFACE SEGMENT DRIVER When "Low"
D1_SID D2_DL D3_DM
SC77
SC73
SC69
SC77
SC73
SC78
SC74
SC70
SC78
SC74
SC79
SC75
SC71
SC79
SC75
D4_DR
SC80
SC76
SC72
SC80
SC76
(Input) (Output)
SC1~SC80
When "High"
D1_SID D2_DL D3_DM D4_DR
SC76
SC80
SC12
SC76
SC80
SC75
SC79
SC11
SC75
SC79
SC74
SC78
SC10
SC74
SC78
SC73
SC77
SC73
SC77
(Input) (Output)
SC1~SC80
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
1-BIT SERIAL MODE INTERFACE SEGMENT DRIVER When "Low"
D1_SID
SC80
SC79
SC78
SC80
SC79
(Input) (Output)
SC1~SC80
When "High"
D1_SID
SC79
SC80
SC79
SC80
(Input) (Output)
SC1~SC80
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
SINGLE-TYPE INTERFACE MODE COMMON DRIVER When "Low"
D2_DL D4_DR COM_DATA1 COM_DATA2 COM_DATA3
COM_DATA79 COM_DATA80
Current driver's COMMON area
When "High"
D4_DR D2_DL
COM_DATA1 COM_DATA2 COM_DATA3
COM_DATA79 COM_DATA80
Current driver's COMMON area
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
DUAL-TYPE INTERFACE MODE COMMON DRIVER When "Low"
D2_DL D3_DM D4_DR COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA39 COM_DATA40 COM_DATA41 COM_DATA42 COM_DATA43 COM_DATA79 COM_DATA80
When "High"
D2_DL D3_DM D4_DR COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA39 COM_DATA40 COM_DATA41 COM_DATA42 COM_DATA43 COM_DATA79 COM_DATA80
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
COMMON SEGMENT DRIVER TIMING (1/200 DUTY)
LATCHED DATA(SEG) COM_DATA1 COM_DATA199 COM_DATA200
COM1
COM199
COM200
SEG_DATA1
SEG1
D1~D4 LATCHED _DATA ENABLE
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
APPLICATION INFORMATION 1-BIT SERIAL INTERFACE MODE (80-CH SEGMENT DRIVER) Lower View (SHL
PANEL
-S80 S81- -S160 Sn+80
SC80 D2_DL~ D1_SID D4_DR
SC80 D2_DL~ D1_SID D4_DR
SC80 D2_DL~ D1_SID D4_DR
1-bit serial data input
Upper View (SHL 1-bit serial data input
D4_DR D1_SID D2_DL~ SC80 D1_SID D4_DR D2_DL~ SC80 D4_DR D1_SID D2_DL~ SC80
S160
Sn+80
PANEL
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
4-BIT PARALLEL INTERFACE MODE (80-CH SEGMENT DRIVER) Lower View (SHL
PANEL
-S80 S81- -S160 Sn+80
SC80 D1_SID~D4_DR
SC80 D1_SID~D4_DR
SC80 D1_SID~D4_DR
4-bit parallel data input
Upper View (SHL 4-bit parallel data input
D1_SID~D4_DR SC80
D1_SID~D4_DR SC80
D1_SID~D4_DR SC80
-S80
S81- -S160
Sn+80
PANEL
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
DUAL-TYPE INTERFACE MODE (40CH COMMON DRIVER)
input data
D4_DR D2_DL SC80
D4_DR D2_DL
SC80
PANEL (1/2)
C160
input data
D4_DR D3_DM D2_DL
SC80 SC41 SC40
C161 C200 C201 C240
D4_DR D2_DL
SC80
C241
PANEL (2/2)
C320
D4_DR D2_DL
SC80
C321
C400
NOTE: Using this application mode (dual-type common mode), duty ratio reduced half. case abale, 1/200 duty used drive common panel.
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
SINGLE-TYPE INTERFACE MODE (80-CH COMMON DRIVER)
input data
D4_DR D2_DL SC80
PANEL
D4_DR D2_DL SC80
C160
D4_DR D2_DL
SC80
C161
C240
KS0086
80CH COMMON SEGMENT DRIVER MATRIX
APPLICATION CIRCUIT EXAMPLE
(n-4)R
COM/
V0~V5 D1_SID~D4_DR DISPOFFB KS0086 SC80 SEG1 SEG80
V0~V5 D1_SID~D4_DR DISPOFFB KS0086 SC80 SEG1 SEG80
V0~V5 D1_SID~D4_DR DISPOFFB KS0086 SC80 SEG1 SEG80 S161 S240
D4_DR DISPOFFB SC80 COM1 KS0086 COM80 V0~V5 CL1D2_DL
S160
COM/
D4_DR DISPOFFB SC80 KS0086 V0~V5 CL1D2_DL D4_DR DISPOFFB SC80 KS0086 V0~V5 CL1D2_DL COM1 COM80 C240 COM1 COM80 C160
MODULE
Controller
DISPOFFB FRAME(M) COM_DATA D1~D4
C161

80CH COMMON SEGMENT DRIVER MATRIX INTRODUCTION QFP-1420C KS0086 d

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