34COM 60SEG DRIVER CONTROLLER MATRIX INTRODUCTION KS0073 matrix d

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

34COM 60SEG DRIVER CONTROLLER MATRIX INTRODUCTION KS0073 matrix d

Datasheet Thumbnail

Top Searches for this datasheet

KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
INTRODUCTION KS0073 matrix driver controller which fabricated power CMOS technology. capable displaying 4-lines with dots format.
FUNCTIONS Character type matrix driver controller Internal driver: common segment signal output Easy interface with 4-bit 8-bit Clock synchronized serial Interface matrix possible Extension driver interface possible Bidirectional shift function character reverse display Display shift line Voltage converter drive voltage: times times) Various instruction functions Automatic power reset
FEATURES Internal Memory Character Generator (CGROM): 9600 bits. (240 characters dot) Character Generator (CGRAM): bits. characters dot) Segment Icon (SEGRAM): bits. icons max.) Display Data (DDRAM): bits. characters max.) power operation Power supply voltage range: (VDD) Drive voltage range: 13.0 (VDD CMOS process Programmable duty cycle: 1/17, 1/33 (Refer Table Internal oscillator with external resistor power consumptio Bare chip available
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Table Programmable duty cycles 5-dot font width Display Line Numbers Single-chip Operation Duty Ratio Displayable characters line characters lines characters lines characters Possible icons With Extension Driver Displayable characters line characters lines characters lines characters Possible icons
1/17 1/33 1/33
6-dot font width Display Line Numbers Single-chip Operation Duty Ratio Displayable characters line characters lines characters lines characters Possible icons With Extension Driver Displayable characters line characters lines characters lines characters Possible icons
1/17 1/33 1/33
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
BLOCK DIAGRAM
OSC1 Power Reset (POR) RESET
OSC2
Oscillator Timing Generator CLK1 CLK2
SCLK System Interface Serial 4-bit/ 8-bit Instruction register (IR) Instruction Decoder Display data (DDRAM) 80x8 bits Input /Output Buffer Data Register (DR) Busy Flag Segment (SEGRAM) bytes Voltage Converter Character Generator (CGROM) bytes Character Generator (CGROM) 9600 bits Cursor Blink Controller Driver Voltage Selector 60-bit Shift Register 60-bit Latch Circuit Segment Driver SEG1 SEG60 34-bit Shift Register Common Driver COM0 COM33
Address Counter
V5OUT2 V5OUT3 (VSS)
Parallel Serial converter Smooth Scroll Circuit
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
CONFIGURATIO
SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32 COM33 OSC2
SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24
CHIP SIZE: 4870 5770 SIZE: UNIT:
OSC1 CLK1 CLK2 RESET VSS1 RS/CS RW/SID E/SCLK DB0/SOD VSS2 V5OUT2 V5OUT3
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
COORDINATE
COORDINATE NAME SEG44 -1687 SEG45 -1812 SEG46 -2269 SEG47 -2269 SEG48 -2269 SEG49 -2269 SEG50 -2269 SEG51 -2269 SEG52 -2269 SEG53 -2269 SEG54 -2269 SEG55 -2269 SEG56 -2269 SEG57 -2269 SEG58 -2269 SEG59 -2269 SEG60 -2269 COM9 -2269 2719 2719 2122 1997 1872 1747 1622 1497 1372 1247 1122 -116 -241 -366 -491 COORDINATE NAME COM15 -2269 COM16 -2269 COM25 -2269 COM26 -2269 -616 -741 -866 -991 NAME RS/CS RW/SID E/SCLK DB0/SOD VSS2 OUT2 OUT3 COORDINATE COORDINATE NAME -611 -486 -361 -236 -111 1014 1139 1264 1389 1514 1639 1764 2269 2269 2269 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2719 -2116 -1991 -1866 COM23 2269 COM22 2269 COM21 2269 COM20 2269 COM19 2269 COM18 2269 COM17 2269 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 COM0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 2269 2269 2269 2269 2269 2269 2269 2269 2269 2269 2269 2269 2269 2269 2269 2269 -1741 -1616 -1491 -1366 -1241 -1116 -991 -866 -741 -616 -491 -366 -241 -116 1122
COM27 -2269 -1116 COM28 -2269 -1241 COM29 -2269 -1336 COM30 -2269 -1491 COM31 -2269 -1616 COM32 -2269 -1741 COM33 -2269 -1866 OSC2 OSC1 CLK1 CLK2 RESET VSS1 -2269 -1991 -2269 -2116 -1816 -2719 -1736 -2719 -1611 -2719 -1486 -2719 -1361 -2719 -1236 -2719 -1111 -2719 -986 -861 -736 -2719 -2719 -2719
COM10 -2269 COM11 -2269 COM12 -2269 COM13 -2269 COM14 -2269
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
(PAD COORDINATE CONTINUED)
NAME SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14
COORDINATE 2269 2269 2269 2269 2269 2269 2269 2269 1813 1247 1372 1497 1622 1747 1872 1997 2122 2719
NAME SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25
COORDINATE 1688 1563 1438 1313 1188 1063 2719 2719 2719 2719 2719 2719 2719 2719 2719
NAME SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34
COORDINATE -187 -312 -437 2719 2719 2719 2719 2719 2719 2719 2719 2719
NAME SEG35 SEG36 SEG37 SEG38
COORDINATE -562 -687 -812 -937 2719 2719 2719 2719 2719 2719 2719 2719 2719
SEG39 -1062 SEG40 -1187 SEG41 -1312 SEG42 -1437 SEG43 -1562
SEG15 SEG16
CONFIGURATION OUTLINE OUTPUT SIDE
KS0073
RESET VSS1 RS/CS RW/SID E/SCLK DBO/SOD
VSS2 V5OUT2 V5OUT3
OSC2 OSC1 CLK1 CLK2
KS0073
COM33
OSC2 OSC1 CLK1 CLK2
COM9 SEG60
RESET VSS1 RS/CS RW/SID E/SCLK DBO/SOD
KS0073 DIAGRAM 134-TAB-35mm
SEG1 COM0 COM24
34COM 60SEG DRIVER CONTROLLER MATRIX
VSS2 V5OUT2 V5OUT3
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
DESCRIPTION Input/ Output
Pin(No) (35) VSS1, VSS2 (46, (68~64) (58) SEG1 SEG6 (86~128, 1~17) COM0 COM33 (85~69,18~34) OSC1,OSC2 (37,36)
Name
Description logical circuit
Interface
Power supply
(GND) Bias voltage level driving. Input voltage voltage converter generate drive voltage (Vci Segment output Common output Segment signal output drive. Common signal output drive. When using internal oscillator, connect external resistor external clock used, connect OSC1. When "High", each outputs latch clock shift clock extension driver. voltage converter times times), these pins must connected external capacitance. When "High", outputs alternating signal convert driver waveform extension driver. When "High", outputs extension driver data (the 61th dot's data) When "High", enables extension diver control signal, When "Low", suppresses extra current consumption CLK1/CLK2/M/D should open. Initialized When "Low", instruction selected Table When "High", instruction selected Table External resistor oscillator (OSC1) Extensio driver External capacitor Extensio driver Extensio driver Power Supply
Input
Output Output Input (OSC1), Output (OSC2) Input
Oscillator
CLK1,CLK2 (38,39) C1,C2 (60,59)
Latch(CLK1) Shift(CLK2) clock External capacitance input Alternated signal driver output Display data interface Extension driver control signal Reset Selection instruction
Input
(41)
Output
(40)
Output
(44)
Input
RESET (42)
Input
(45)
Input
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
(Continued)
Pin(No)
Input/ Output
Name times converter output Three times converter output
Description value converted twice. three times converter, same capacitance that C1-C2 should connected here. value converted three times. Select Interface mode with MPU. When "Low": Serial mode, When "High": 4-bit/8-bit mode. mode, used register selection input. When RS/CS "High", Data register selected. When RS/CS "Low", Instruction register selected. serial mode, used chip selection input. When RS/CS "Low", selected. When RS/CS "High", selected (Low access enable). mode, used read/write selection input. When RW/SID "High", read operation. When RW/SID "Low", write operation. serial mode, used data input pin. mode, used read/write enable signal. serial mode, used serial clock input pin. 8-bit mode, used lowest bidirectional data bit. During 4-bit mode, open this pin. serial mode, used serial data output pin. read operation, open this pin. 8-bit mode, used order bidirectional data bus. During 4-bit mode serial mode, open these pins.
Interfac
V5OUT2 (62) Output V5OUT3 (63)
pin/ capacitance
(43)
Input
Interface mode selection
RS/CS (47)
Input
Register select Chip select
RW/SID (48)
Input
Read, write Serial input data Read, write enable/Serial clock Data Serial output data
E/SCLK (49)
Input
DB0/SOD (50)
Input Output Output
Input, Output Data
8-bit mode, used high order bidirectional data bus. 4-bit mode, used both high order. used Busy Flag output. During serial mode, open these pins.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
FUNCTION DESCRIPTION
System Interface This chip three kinds interface type with MPU: serial, 4-bit 8-bit bus. Serial bus(4-bit/8-bit) selected input, 4-bit 8-bit selected instruction register. During read write operation, 8-bit registers used. data register (DR), other instruction register(IR). data register(DR) used temporary data storage place being written into read from DDRAM/CGRAM/SEGRAM. Target selected address setting instruction. Each internal operation, reading from writing into RAM, done automatically. Hence, after reads data, data next DDRAM/CGRAM/SEGRAM address transferred into automatically. Also, after writes data data transferred into DDRAM/CGRAM/ SEGRAM automatically. Instruction register (IR) used only store instruction code transferred from MPU. cannot read instruction data. select register, RS/CS input 4-bit/8-bit mode "High") serial mode "Low"). Table Various kinds operations according bits. Busy Flag (BF) When "High", indicates that internal operation being processed. during this time next instruction cannot accepted. read, when "Low" "High" (Read Instruction Operation), through port. Before executing next instruction, sure that High. Display Data (DDRAM) DDRAM stores display data maximum bits characters). DDRAM address address counter (AC) hexadecimal number (Refer Fig-1). Operation Instruction Write operation (MPU writes Instruction code into Read Busy flag (DB7) address counter (DB0 DB6) Data Write operation (MPU writes data into Data Read operation (MPU reads data from
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Fig-1. DDRAM Addres Display 5-dot font width character 5-dot line display case 1-line display with 5-dot font, address range DDRAM (Refer Fig-2). When "High", extension driver will used. Fig-3 shows example with segment extension drivers added.
Display position
COM1
COM9
COM8 SEG1
SEG1
KS0073
SEG60
KS0073
SEG60
COM16
DDRAM address
COM9
COM1
COM16
COM8
(After Shift Left)
COM1 COM9
COM8
COM16
(After Shift Right)
Fig-2. 1-line display (5-dot font width)
COM1 COM8
SEG1
SEG1 SEG40 COM9 COM16
SEG1
KS0073
SEG60
KS0073
SEG60
Extension Driver (40SEG)
COM1 COM8
COM9 COM16
(After Shift Left)
COM1 COM8 COM9
COM16
(After Shift Right)
Fig-3. 1-line display with SEG. extension driver (5-dot font width)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
5-dot 2-line display case 2-line display with 5-dot font, address range DDRAM 00H-27H, 40H-67H (Refer Fig-4). When "High", extension driver will used. Fig-5 shows example with segment extension drivers added.
Display position
COM1
COM9
COM8 COM17 COM24
KS0073
COM16 COM25 COM32
SEG1 KS0073
SEG60 SEG1
SEG60
DDRAM address
COM9
COM16 COM25
COM1 COM8 COM17
COM32
COM24
(After Shift Left)
COM1 COM8 COM17 COM24
COM9 COM16 COM25 COM32
(After Shift Right)
Fig-4. 2-line char. display (5-dot font width)
COM1 COM8 COM17
KS0073
COM32 COM9 COM16 COM25
COM24
SEG1
COM1 COM8 COM17
KS0073
SEG60 SEG1
SEG1
SEG40
Extension Driver (40SEG)
COM9 COM16
COM25 COM32
COM24
(After Shift Left)
COM1 COM8 COM17 COM9
COM16 COM25 COM32
COM24
(After Shift Right)
Fig-5. 2-line char. display with SEG. extension driver (5-dot font width)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
5-dot 4-line display case 4-line display with 5-dot font, address range DDRAM 00H-13H, 20H-33H, 40H-53H, 60H-73H (Refer Fig-6). When EXT="High", extension driver will used. Fig-7 shows example with segment extension drivers added.
COM1
Display position DDRAM address
COM8 COM9 COM16 COM17
COM24 COM25 COM32 SEG1
KS0073
SEG60
COM1
COM8 COM9
COM16 COM17
COM24 COM25 COM32
(After Shift Left)
COM1
COM8 COM9
COM16 COM17 COM24 COM25 COM32
(After Shift Right)
Fig-6. 4-line char. display (5-dot font width)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
COM1
SEG1 SEG40
Display position DDRAM address
COM8 COM9 COM16 COM17
COM24 COM25 COM32 SEG1
KS0073
SEG60
Extension Driver (40SEG)
COM1
COM8 COM9
COM16 COM17
COM24 COM25 COM32
(After Shift Left)
COM1
COM8 COM9
COM16 COM17 COM24 COM25 COM32
(After Shift Right)
Fig-7. 4-line char. display with SEG. extension driver (5-dot font width)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Display 6-dot font width character 6-dot 1-line display case 1-line display with 6-dot font, address range DDRAM 00H-4FH (Refer Fig-8) When "High", extension driver will used. Fig-9 shows example with segment extension driver added.
Display position
COM1
COM9
COM8 SEG1
SEG1
KS0073
SEG60
KS0073
SEG60
COM16
DDRAM address
COM9
COM1
COM16
COM8
(After Shift Left)
COM1 COM9
COM8
COM16
(After Shift Right)
Fig-8. 1-line char. display (6-dot font width)
COM1 COM8
KS0073 SEG60
SEG1 SEG36
COM9 COM16
SEG1 KS0073
SEG60 SEG1
Extension Driver (40SEG)
COM1 COM8
COM9 COM16
(After Shift Left)
COM1 COM8 COM9
COM16
(After Shift Right) Fig-9. 1-line 26char. display with SEG. extension driver (6-dot font width)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
6-dot 2-line display case 2-line display with 6-dot font, address range DDRAM 00H-27H, 40H-67H (Refer Fig-10). When "High", extension driver will used. Fig-11 shows example with segment extension drivers added.
Display position
COM1
COM9
COM8 COM17
SEG1 COM16 COM25
COM24 SEG1
KS0073
SEG60
KS0073
COM32 SEG60
DDRAM address
COM1 COM8 COM17
COM9
COM16 COM25
COM32
COM24
(After Shift Left)
COM1 COM8 COM17 COM24
COM9 COM16 COM25 COM32
(After Shift Right)
Fig-10. 2-line 20char. display (6-dot font width)
COM1 COM8 COM17
SEG1 KS0073 SEG60
COM32 COM9 COM16 COM25
COM24
SEG1
COM1 COM8 COM17
KS0073
SEG1
SEG36
Extension Driver (40SEG)
COM32 COM9 COM16 COM25
COM24
(After Shift Left)
COM1 COM8 COM17 COM9
COM16 COM25 COM32
COM24
(After Shift Right) Fig-11. 2-line char. display with SEG. extension driver (6-dot font width)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
6-dot 4-line display case 4-line display with 6-dot font, address range DDRAM 00H-13H, 20H-33H, 40H-53H, 60H-73H (Refer Fig-12) When "High", extension driver will used. Fig-13 shows example with segment extension drivers added.
COM1
Display position DDRAM address
COM8 COM9 COM16 COM17
COM24 COM25 COM32 SEG1
KS0073
SEG60
COM1
COM8 COM9
COM16 COM17
COM24 COM25 COM32
(After Shift Left)
COM1
COM8 COM9
COM16 COM17 COM24 COM25 COM32
(After Shift Right)
Fig-12. 4-line 10char. display (6-dot font width)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
COM1
SEG1 SEG36
Display position DDRAM address
COM8 COM9 COM16 COM17
COM24 COM25 COM32 SEG1
KS0073
SEG60
Extension Driver (40SEG)
COM1
COM8 COM9
COM16 COM17
COM24 COM25 COM32
(After Shift Left)
COM1
COM8 COM9
COM16 COM17 COM24 COM25 COM32
(After Shift Right)
Fig-13. 4-line char. display with SEG. extension driver (6-dot font width)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Timing Generation Circuit timing generation circuit generates clock signals internal operations. Address Counter (AC) address Counter (AC) stores DDRAM/CGRAM/SEGRAM address, transferred from After writing into (reading from) DDRAM/CGRAM/SEGRAM, automatically increased (decreased) When "Low" "High", read through DB0-DB6 ports. Cursor/Blink Control Circuit controls cursor/blink ON/OFF black/white inversion cursor position. Driver Circuit Driver circuit common segment signals driving. Data from SEGRAM/CGRAM/CGROM transferred 60-bit segment latch serially, which then stored 60-bit shift latch. When each common selected 34-bit common register, segment data also outputs throug segment driver from 100-bit segment latch. 1-line display mode, COM0 COM17 have 1/17 duty ratio, 2-line 4-line mode, COM0 COM33 1/33 duty ratio.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
CGROM (Character Generator ROM) CGROM 8-dot characters pattern (Refer Table Table CGROM Character Code Table
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
CGRAM (Character Generator RAM) CGRAM eight characters. writing font data CGRAM, user defined character (Refer Table Table Relationship between Character Code (DDRAM) Character Pattern (CGRAM) Character pattern Character Code (DDRAM data) CGRAM address CGRAM data Pattern Number pattern
pattern
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Character pattern Character Code (DDRAM data) CGRAM address CGRAM data Pattern Number pattern
pattern
NOTE: When (Blink Enable bit) "High", blink controlled bit. displaying 5-dot font width, when "1", enabled dots ports will blink, when "1", enabled dots port will blink. When "0", blinking will occur. displaying 6-dot font width, when "1", enabled dots ports will blink, when "1", enabled dots port will blink. When "0", blinking will occur. "X": Don't care
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
SEGRAM (Segment lcon RAM) SEGRAM segment control data segment pattern data. During 1-line display mode, COM0(COM17) enables data SEGRAM display icons. When used 2/4-line display mode COM0(COM33) does that. higher 2-bits blinking control data, lower 6-bits pattern data (Refer Table Fig-14). Table Relationship between SEGRAM address display pattern SEGRAM address SEGRAM data display pattern 5-dot font width 6-dot font width
NOTE: Blinking control Control 5-dot font width blink blink Blinking Port 6-dot font width blink blink
S80: Icon pattern ON/OFF 5-dot font width S96: Icon pattern ON/OFF 6-dot font width "X": Don't care
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
5-dot font width
Extension Driver 6-dot font width
S12S13 S14S15 S55S56 S57S58 S61S62S63
Extension Driver Fig-14. Relationship between SEGRAM segment display
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
INSTRUCTION DESCRIPTION OUTLINE overcome speed difference between internal clock KS0073 clock, KS0073 performs internal operation storing control information internal operation determined according signal from MPU, composed read/write data (Refer Table Table 10). Instruction divided largely into four kinds, KS0073 function instructions (set display methods, data length, etc.) address instructions internal data transfer instructions with internal others. address internal automatically increased decreased When "High", KS0073 operated according Instruction (Table when "Low", KS0073 operated according Instruction (Table 10).
NOTE: During internal operation, Busy Flag (DB7) reads High. Busy Flag check must precede next instruction. When program with Busy Flag (DB7) checking made, 1/2Fosc necessary executing next instruction falling edge signal after Busy Flag (DB7) goes "Low".
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
INSTRUCTION DESCRIPTION "High") Table Instruction "High") Instruction Code Instruction RSR/WDB7DB6DB5DB4DB3DB2DB1DB0 Clear Display Return Home Power Down Mode Write "20H" DDRAM. DDRAM address "00H" from Description Execution Time (fosc kHz) 1.53
DDRAM address "00H" from return cursor original position shifted. contents DDRAM changed. power down mode bit. "1":power down mode set, "0":power down mode disable) Assign cursor moving direction. (I/D "1": increment, "0": decrement). display shift enable bit. "1": make display shift enabled lines DS4-DS1 bits Shift Enable instruction. "0":display shift disable)
1.53
Entry Mode
Segment bidirectional function. (BID "1": Seg60Seg1, "0": Seg1Seg60) display/cursor/blink on/off "1": display "0": display off, "1": cursor "0": cursor off, "1": blink "0": blink off).
Display ON/OFF Control
Extended function
Assign font width, black/white inverting cursor, 4-line display mode control bit. "1": 6-dot font width, "0": 5-dot font width, "1": black/white inverting cursor enable, "0": black/white inverting cursor disable "1": 4-line display mode, "0": 1-line 2-line display mode)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
(Table continued)
Instruction Code InstrucRE tion
Description
Execution Time (fosc kHz)
Cursor Display Shift
Cursor display shift. (S/C "1": display shift, "0": cursor shift, "1": shift right, "0": shift left)
Shift Enable
(When "1") Determine line display shift. (DS1 "1/0": line display shift enable/disable "1/0": line display shift enable/disable "1/0": line display shift enable/disable "1/0": line display shift enable/disable) (when "0") Determine line horizontal smooth scroll. (HS1 "1/0": line scroll enable/disable "1/0": line scroll enable/disable "1/0": line scroll enable/disable "1/0": line scroll enable/disable). interface data length, "1": 8-bit, "0": 4-bit), numbers display line when "0", "1": 2-line, "0": 1-line), extension register, RE("0"), shift/scroll enable, "1": display shift enable "0": scroll enable), reverse (REV "1": reverse display, "0": normal display) RE("1") CGRAM/SEGRAM blink enable (BE) "1/0": CGRAM/SEGRAM blink enable/disable "1": power mode, "0": normal operation mode)
Scroll Enable
Function
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
(Table continued)
Instruction Code Instruction CGRAM Address SEGRAM Address Description
Execution Time (fosc kHz)
CGRAM address address counter. SEGRAM address address counter.
DDRAM Address Scroll Quantity
DDRAM address address counter.
quantity horizontal scroll.
Read Busy Flag Address
known whether during internal operation reading contents address counter also read. "1": busy state, "0": ready state) Write data into internal (DDRAM/CGRAM/SEGRAM) Read data from internal (DDRAM/CGRAM/SEGRAM)
Write Data Read Data
NOTE: When program with Busy Flag (DB7) checking made, 1/2Fosc necessary executing next instruction falling edge signal after Busy Flag (DB7) goes "Low". Don't care
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Display Clear
Clear display data writing "20H" (space code) DDRAM address, DDRAM address "00H" into (address counter). Return cursor original status, bringing cursor left edge first line display. Make entry mode increment (I/D "1").
Return Home:
Return Home cursor return home instruction. DDRAM address "00H" into address counter. Return cursor original site return display original status, shifted. Contents DDRAM does change.
Power Down Mode Set:
Power down mode enable instruction. "High", makes KS0073 suppress current consumption except current needed data storage executing next three functions. make output value COM/SEG ports make COM/SEG output value extension driver setting output "High" output "Low" disable voltage converter remove current through divide resistor power supply. This instruction used power sleep mode. When "Low", power down mode becomes disabled.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Entry Mode
moving direction cursor display. I/D: Increment decrement DDRAM address (cursor blink) When "High", cursor/blink moves right DDRAM address increased When "Low", cursor/blink moves left DDRAM address decreased CGRAM/SEGRAM operates same DDRAM, when reading from writing CGRAM/SEGRAM. When "High", after DDRAM write, display enabled line bits Shift Enabl instruction shifted right (I/D "0") left (I/D "1"). will seem cursor does move. When "Low", DDRAM read, CGRAM/SEGRAM read/write operation, shift display above function performed.
data shift direction segment application set. BID: Data Shift Direction Segment When "Low", segment data shift direction normal order, from SEG1 SEG60. When "High", segment data shift direction reversely. from SEG60 SEG1. using this instruction, efficiency application board area raised. setting instruction recommended same time level function instruction. must "1".
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Display ON/OFF Control
Control display/cursor/blink ON/OFF register. Display ON/OFF control When "High", entire display turned When "Low", display turned off, display data remains DDRAM. Cursor ON/OFF control When "High", cursor turned When "Low", cursor disappeared current display, register preserves data. Cursor Blink ON/OFF control When "High", cursor blink that performs alternately between high data display character cursor position. fosc frequency kHz, blinking interval. When "Low", blink off.
Extended Function
Font Width control When "High", display character font width assigned 6-dot, execution time becomes times than that 5-dot font width. user font, specified CGRAM, displayed into 6-dot font width, bit-5 bit-0, including left space CGRAM (Refer Fig-15). When "Low", 5-dot font width set. B/W: Black/White Inversion enable When "High", black/white inversion cursor position set. this case, display ON/OFF control instruction becomes "don't care" condition. fosc frequency kHz, inversion intervals. Line mode enable When "High", 4-line display mode set. this case, function instruction becomes care" condition.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
6-bit
6-bit
CGROM character font (5-dot) (CGROM)
CGRAM character font (6-dot) (CGRAM)
Fig-15. 6-dot font width CGROM/CGRAM
Cursor Display Shift
Shifts right/left cursor position display without writing reading display data. This instruction used correct search display data (Refer Table During 2-line mode display, cursor moves line after 40th digit line. 4-line mode, cursor moves next line, only after every 20th digit current line. Note that display shift performed simultaneously lines enabled Shift Enable instruction. When displayed data shifted repeatedly, each line shifted individually. When display shift performed, contents address counter changed. During power consumption mode, display shift performed normally.
Table Shift patterns according bits Operation Shift cursor left, ADDRESS COUNTER decreased Shift cursor right, ADDRESS COUNTER increased Shift display left, cursor moves according display Shift display right, cursor moves according display
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Shift/Scroll Enable
Horizontal Scroll Line Enable This instruction makes valid shifts display line unit. HS1, HS2, indicate each line scrolled, each scroll performed individually each line. line, 1-line display mode line 2-line display mode scrolled, "High". line scroll needed 2-line mode, "High" (Refer Table
Display Shift Line Enable This instruction selects line shifted according each line mode display shift right/left instruction. DS1, DS2, indicate each line shifted, each shift performed individually each line. "High" (enable) 2-line mode, only line shifted, line shifted. When only "High", only half line shifted. bits (DS1 DS4) "Low" (disable), display shifted.
Table Relationship between signal Enable HS1/DS1 HS2/DS2 HS3/DS3 HS4/DS4 Enabled common signals during shift COM1 COM8 COM9 COM16 COM17 COM24 COM25 COM32 part display line that corresponds enabled common signal shifted. Description
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Function
Interface data length control When "High", means 8-bit mode with MPU. When "Low", means 4-bit mode with MPU. Hence, signal select 8-bit 4-bit mode. 4-bit mode, required transfer 4-bit data twice.
Display line number control variable only when extended function instruction Low. When "Low", 1-line display mode set. When "High", 2-line display mode set. When "High", invalid, 4-line mode independent bit.
Extended function registers enable this instruction, must "Low".
Display shift enable selection bit. When "High", enables display shift line. When "Low", enables smooth scroll. This accessed only when input "High".
REV: Reverse enable When "High", display data reversed. i.e., white dots become black black dots become white. When "Low", display mode normal display.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Interface data length control When "High", means 8-bit mode with MPU. When "Low", means 4-bit mode with MPU. Hence, signal select 8-bit 4-bit mode. When 4-bit mode, required transfer 4-bit data twice. Display line number control variable only when extended function instruction Low. When "Low", 1-line display mode set. When "High", 2-line display mode set. When "High", invalid, 4-line mode independent bit. Extended function registers enable When "High", extended function registers, SEGRAM address registers, bit, HS/DS bits shift/scroll enable instruction bits function register accessed. CGRAM/SEGRAM data blink enable "High", makes user font CGRAM segment SEGRAM blinking. quantity blink assigned highest CGRAM/SEGRAM. power consumption mode enable When port input "Low" (without extension driver) "High", KS0073 operates power consumption mode. During 1-line mode KS0073 operates 4-division clock, 2-line 4-line mode operates 2-division clock. According this instruction, execution time becomes times longer. Note display shift instruction, result incorrect operation. frame frequency times lower than that normal operation.
CGRAM Address
CGRAM address This instruction makes CGRAM data available from MPU.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
SEGRAM Address
SEGRAM address This instruction makes SEGRAM data available from MPU. DDRAM Address
DDRAM address This instruction makes DDRAM data available from MPU. 1-line display mode DDRAM address from "00H" "4FH". 2-line display mode DDRAM address line from "00H" "27H", DDRAM address line from "40H" "67H". 4-line display mode DDRAM address from "00H" "13H" line, from "20H" "33H" line, from "40H" "53H" line from "60H" "73H" line.
Scroll Quantity
Setting SQ0, horizontal scroll quantity controlled units. (Refer Table this case KS0073 show hidden areas DDRAM executing smooth scroll from dots. Table Scroll quantity according bits Function shift shift left 1-dot shift left 2-dot shift left 3-dot shift left 47-dot shift left 48-dot
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Read Busy Flag Address
This instruction shows whether KS0073 internal operation not. resultant High, internal operation progress should wait until Low, which then next instruction performed. this instruction value address counter also read.
Write data
Write binary 8-bit data DDRAM/CGRAM/SEGRAM. selection from DDRAM, CGRAM, SEGRAM, previous address instruction: DDRAM address set, CGRAM address set, SEGRAM address set. instruction also determine direction RAM. After write operation, address automatically increased/decreased according entry mode.
Read data from
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM. selection previous address instruction. address instruction performed before this instruction, data that read first invalid, direction determined. data read several times without address instructions before read operation, correct data obtained from second, first data would incorrect, there time margin transfer data. DDRAM read operation, cursor shift instruction plays same role DDRAM address instruction: also transfers data output data register. After read operation address counter automatically increased/decreased according entry mode. After CGRAM/SEGRAM read operation, display shift executed correctly.
case write operation, increased/decreased read operation after this. this time, indicates next address position, previous data only read read instruction.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
INSTRUCTION DESCRIPTION ="Low" Table Instruction "Low") Instruction Code Instruction RSR/WDB7DB6DB5DB4DB3DB2DB1DB0 Clear Display Return Home Description Execution Time (fosc kHz)
Write "20H" DDRAM 1.53 DDRAM address "00H" from
DDRAM address "00H" from return cursor original position shifted. contents DDRAM changed. Assign cursor moving direction, (I/D "1": increment, "0": decrement) display shift enable bit. "1": make entire display shift lines our- DDRAM write, "0": display shift disable) display/cursor/blink on/off "1": display display off, cursor cursor off, blink blink off).
1.53
Entry Mode
Display ON/OFF Control
Extended function
Assign font width, black/white inverting cursor, 4-line display mode control bit. "1": 6-dot font width, "0": 5-dot font width, "1": black/white inverting cursor enable, "0": black/white inverting cursor disable "1": 4-line display mode, "0": 1-line 2-line display mode) Cursor display shift. (S/C display shift, cursor shift, shift right, shift left).
Cursor Display Shift
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
(Table continued) Instruction Code Instruction Description Execution Time (fosc kHz)
Scroll Enable
Determine line horizontal smooth scroll. (HS1 "1/0" line scroll enable/disabl "1/0" line scroll enable/disable "1/0" line scroll enable/disable "1/0" line scroll enable/disable). interface data length 8-bit, 4-bit), numbers display line when "0", 2-line, 1-line), extension register, RE("0")
Function
RE("1") CGRAM/SEGRAM blink enable (BE) "1/0" CGRAM/SEGRAM blink enable/disabl power mode, normal operation mode)
CGRAM Address
CGRAM address address counter. SEGRAM address address counter.
SEGRAM Address
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Instruction Code Instruction Description
Execution Time (fosc kHz)
DDRAM Address Scroll Quantity
DDRAM address address counter. quantity horizontal scroll.
Read Busy flag Address
known whether during internal operation reading contents address counter also read. "1": busy state, "0": ready state) Write data into internal (DDRAM/CGRAM/SEGRAM) Read data from internal (DDRAM/CGRAM/SEGRAM)
Write Data Read Data
NOTE: When program with Busy Flag(DB7) checking made, 1/2Fosc necessary) executing next instruction falling edge signal after Busy Flag(DB7) goes "Low".
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Display Clear
Clear display data writing "20H" (space code) DDRAM address, DDRAM address "00H" into (address counter). Return cursor original status, namely, bring cursor left edge first line display. entry mode increment mode (I/D "High").
Return Home
Return Home cursor return home instruction. DDRAM address "00H" into address counter. Return cursor original site return display original status, shifted. Contents DDRAM does change.
Entry Mode
moving direction cursor display. Increment decrement DDRAM address (cursor blink) When "High", cursor/blink moves right DDRAM address incr ased When "Low", cursor/blink moves left DDRAM address decreased CGRAM/SEGRAM operates identically DDRAM, when reading from writing CGRAM/SEGRAM. When "High", after DDRAM write, entire display lines shifted right (I/D "Low") left (I/D "High"). will seem cursor moving. When "Low", DDRAM read, CGRAM/SEGRAM read/write operation, shift entire display performed.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Display ON/OFF Control
Control display/cursor/blink ON/OFF register. Display ON/OFF control When "High", entire display turned When "Low", display turned off, display data remains DDRAM. Cursor ON/OFF control When "High", cursor turned When "Low", cursor disappeared current display, register preserves data. Cursor Blink ON/OFF control When "High", cursor blink which performs alternately between high data display character cursor position. fosc frequency, blinking interval. When "Low", blink off.
Extended Function
Font Width control When "High", display character font width assigned 6-dot execution time becomes times than that 5-dot font width. user font, specified CGRAM, displayed into 6-dot font width, bit-5 bit-0,including left space CGRAM.(Refer Fig-16) When "Low", 5-dot font width set. Black/White Inversion enable When "High", black/white inversion cursor position set. this case display ON/OFF control instruction becomes don't condition. fosc frequency kHz, inversion intervals. Line mode enable When "High", line display mode set. this case function instruction becomes "don't care" condition.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
6-bit
6-bit
CGROM character font (5-dot) (CGROM)
CGRAM character font (6-dot) (CGRAM)
Fig-16. 6-dot font width CGROM/CGRAM
Cursor Display Shift
Shifting right/left cursor position display without writing reading display data. This instruction used correct search display data.(Refer Table During 2-line mode display, cursor moves line after 40th digit line. 4-line mode, cursor moves next line, only after every 20th digit current line. Note that display shift performed simultaneously lines. When displayed data shifted repeatedly, each line shifted individually. When display shift performed, contents address counter changed.
Table Shift patterns according bits Operation Shift cursor left, ADDRESS COUNTER decreased Shift cursor right, ADDRESS COUNTER increased Shift entire display left, cursor moves according display Shift entire display right, cursor moves according display
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Scroll Enable
Horizontal Scroll Line Enable This instruction makes valid shift display line unit. HS1, HS2, indicate each line scrolled, each scroll performed individually each line. line 1-line display mode line 2-line display mode scrolled, "High". line scroll needed 2-line mode, "High". (Refer Table
Function
Interface data length control When "High", means 8-bit mode with MPU. When ="Low", means 4-bit mode with MPU. Hence, signal select 8-bit 4-bit mode. 4-bit mode, required transfer 4-bit data twice. Display line number control variable only when extended function instruction Low. When "Low", 1-line display mode set. When "High", 2-line display mode set. When "High", invalid, 4-line mode independent bit. Extended function registers enable this instruction, must "Low".
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Interface data length control When "High", means 8-bit mode with MPU. When "Low", means 4-bit mode with MPU. Hence, signal select 8-bit 4-bit mode. 4-bit mode, required transfer 4-bit data twice. Display line number control variable only when extended function instruction Low. When "Low", 1-line display mode set. When "High", 2-line display mode set. When "High", invalid, 4-line mode independent bit. Extended function registers enable When "High", extended function registers, SEGRAM address registers, bits scroll enable instruction bits function register accessed. CGRAM/SEGRAM data blink enable "High", makes user font CGRAM segment SEGRAM blinking. quantity blink assigned highest CGRAM/SEGRAM. power consumption mode enable When port input "Low" (without extension driver) "High", KS0073 operates power consumption mode. During 1-line mode KS0073 operates 4-division clock, 2-line 4-line mode operates 2-division clock. According this instruction, execution time becomes times longer. Note display shift instruction, result incorrect operation. frame frequency times lower than that normal operation.
CGRAM Address
CGRAM address This instruction makes CGRAM data available from MPU.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
SEGRAM Address
SEGRAM address This instruction makes SEGRAM data available from MPU. DDRAM Address
DDRAM address This instruction makes DDRAM data available from MPU. 1-line display mode DDRAM address from "00H" "4FH". 2-line display mode DDRAM address line from "00H" "27H", DDRAM address line from "40H" "67H". 4-line display mode DDRAM address from "00H" "13H" line, from "20H" "33H" line, from "40H" "53H" line from "60H" "73H" line.
Scroll Quantity
Setting SQ0, horizontal scroll quantity controlled units. (Refer Table 12). this case KS0073 executes smooth scroll from dots. Table Scroll quantity according bits Function shift shift left 1-dot shift left 2-dot shift left 3-dot shift left 47-dot shift left 48-dot
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Read Busy Flag Address
This instruction shows whether KS0073 internal operation not. resultant High, internal operation progress should wait until becomes "Low", which then next instruction performed. this instruction value address counter also read.
Write data
Write binary 8-bit data DDRAM/CGRAM/SEGRAM. selection from DDRAM, CGRAM, SEGRAM, previous address instruction DDRAM address set, CGRAM address set, SEGRAM address set. instruction also determines direction RAM. After write operation, address automatically increased/decreased according entry mode.
Read data from
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM. selection previous address instruction. address instruction performed before this instruction, data which been read first invalid, direction determined. data several read times without address instruction before read operation, correct data from second, first data would incorrect, there time margin transfer data. case DDRAM read operation, cursor shift instruction plays same role DDRAM address instruction also transfer data output data register. After read operation address counter automatically increased/decreased according entry mode. After CGRAM/SEGRAM read operation, display shift executed correctly. case write operation, increased/decreased read operation after this. this time, indicates next address position, previous data only read read instruction.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
INTERFACE WITH KS0073 transfer data mode (4-bit 8-bit) serial mode with MPU. Hence, both types, 8-bit used. case 4-bit mode, data transfer performed twice transfer byte data. When interfacing data length 4-bit, only ports, from DB7, used data bus. first, higher 4-bit case 8-bit mode, contents DB7) transferred, then lower 4-bit case 8-bit mode, contents DB3) transferred. transfer performed twice. Busy Flag outputs "High" after second transfer ended. When interfacing data length 8-bit, transfer performed time through ports, from DB7. port "Low", serial transfer mode set.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Interface with Mode Interface with 8-bit 8-bit used, KS0073 connect directly with that. this case, port need interface each other. Example timing sequence shown below.
Internal signal
Internal operation DATA Busy Busy
Busy
DATA
INSTRUCTION
Busy Flag Check
Busy Flag Check
Busy Flag Check
INSTRUCTION
Fig-17. Example 8-bit Mode Timing Sequence Interface with 4-bit 4-bit used, KS0073 connect directly with this. this case, port need interface each other. transfer performed twice. Example timing sequence shown below.
Internal signal
Internal operation
Busy Busy
INSTRUCTION
Busy Flag Check
Busy Flag Check
INSTRUCTION
Fig-18. Example 4-bit Mode Timing Sequence
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Interface with Serial Mode When port input "Low", serial interface mode started. this time, three ports, SCLK (synchronizing transfer clock), (serial input data), (serial output data), used. KS0073 used with other chips, chip select port (CS) used. setting "Low", KS0073 receive SCLK input. "High", KS0073 resets internal transfer counter.
Before transferring real data, start byte transferred. composed succeeding "High" bits, read write control (R/W), register selection (RS), that indicates start byte. Whenever succeeding "High" bits detected KS0073, resets serial transfer counter prepares receive next informations. next input data register selection which determines which register used, read write control that determines direction data. Then transferred, which must have "Low" value show start byte. (Refer
Write Operation (R/W After start byte transferred from KS0073, 8-bit data transferred which divided into bytes, each byte bit's real data bit's partition token data. example, real data "10110001" D7), then serially transferred data becomes "1011 0000 0001 0000" where bits must "0000" safe transfer. transfer several bytes continuously without changing bit, start byte transfer needed only first starting time. i.e., after first start byte transferred, real data succeeding transferred.
Read Operation (R/W After start byte transferred KS0073, receive 8-bit data through port time from LSB. Waiting time needed insert between start byte data reading, internal reading from requires some delay. Continuous data reading possible such serial write operation. also needs only start bytes, only some delay between reading operations each byte inserted. During reading operation, KS0073 observes succeeding "High" from MPU. detected, KS0073 restarts serial operation once prepares receive bit. continuous reading operation, port must "Low".
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Serial Write Operatio
SCLK
Starting Byte Synchronizing string Lower Data 1'st Byte
Instruction Upper Data 2'nd Byte
Serial Read Operation
SCLK
Starting Byte Synchronizing string
Busy Flag/ Read Data Lower Data Upper Data
Fig-19. Timing Diagram Serial Data Transfer
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Continuous Write Operation
Wait Wait
Start byte
byte
byte
byte
byte
byte
byte
(Instruction1)
(Instruction2) Instruction1 execution time
(Instruction3) Instruction2 execution time Instruction3 execution time
Continuous Read Operation
Wait Wait Wait
Start byte
Data Read
Instruction1 execution time
Instruction2 execution time
Instruction3 execution time
Fig-20. Timing Diagram Continuous Data Transfer
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
APPLICATION INFORMATION ACCORDING Panel: characters 1-line format (5-dot font, 1/17 duty
KS0073
Panel: character 2-line format (5-dot font, 1/33 duty)
(COM
KS0073
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Panel: character 4-line format (5-dot font, 1/33 duty)
COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32 COM33 (COM0) SEG1 SEG2
KS0073
SEG4 SEG5 SEG26 SEG27
SEG29 SEG30 SEG31 SEG32
SEG34 SEG35
SEG58 SEG59 SEG60
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Panel: characters 4-line format (6-dot font, 1/33 duty)
COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32 COM33 (COM0) SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG31 SEG32
KS0073
SEG34 SEG35 SEG36 SEG58 SEG59 SEG60
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Panel: characters 4-line format (5-dot font, 1/33 duty)
COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32
KS0073
COM33 (COM0) SEG1 SEG2
SEG4 SEG5 SEG58 SEG59 SEG60 SEG1 SEG2
Extension Driver
SEG4 SEG5 SEG36 SEG37
SEG39 SEG40
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
INITIALIZING Initializing Internal Reset Circuit When power turned KS0073 initialized automatically power reset circuit. During initialization, following instructions executed, BF(Busy Flag) kept "High"(busy state) initialization. Display Clear instruction Write "20H" DDRAM Functions instruction 8-bit mode 2-line display mode Extension register disable CGRAM/SEGRAM blink Operate normal mode (Not Power Mode) Horizontal scroll enable Normal display mode (Not reversed display) Control Display ON/OFF instructio Display Cursor Blink Entry Mode instruction Increment entire display shift Normal direction segment port Extension Function instruction 5-dot font width character display Normal cursor (8th line) 4-line display mode, 2-line mode because N("1") Enable Scroll/Shift instructio 0000 Scroll line disable 0000 Shift line disable scroll Quantity instruction 000000 scroll Initializing Hardware RESET input When RESET "Low", KS0073 initialized case power reset. During power reset operation, this ignored.
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
INITIALIZING INSTRUCTION 8-bit interface mode
Power
Condition fosc=270kHz
Wait more than after rises
Function
4-bit interface 8-bit interface 1-line 2-line
DL(1)
Wait more than
Display ON/OFF Control
display display cursor cursor blink blink
Wait more than
Clear Display
Wait more than 1.53
Entry Mode
decrement mode increment mode entire shift entire shift
Initialization
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
4-bit interface mode
Power
Wait more than after rises
Condition fosc=270kHz
Function
DL(0)
4-bit interface 8-bit interface 1-line mode 2-line mode
Wait more than
Function
Wait more than
Display ON/OFF Control
display display cursor cursor blink blink
Wait more than
Clear Display
Wait more than 1.53
Entry Mode
decrement mode increment mode entire shift entire shift
Initialization
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
EXAMPLE INSTRUCTION DISPLY CORRESPONDENCE IE='Low' Power supply Initialized internal power reset circuit
DISPLAY
Function Set: 8-bit, 1-line, RE(0)
Display ON/OFF Control: Display/Cursor
Entry Mode Set: Increment
Write Data DDRAM: Write
Write Data DDRAM: Write
Write Data DDRAM: Write
SAM_
Write Data DDRAM: Write
SAMS_
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Write Data DDRAM: Write
SAMSU_
Write Data DDRAM: Write
SAMSUN_
Write Data DDRAM: Write
SAMSUNG_
Cursor Display Shift: Cursor shift right
SAMSUNG
Entry Mode Set: Entire display shift enable
SAMSUNG
Write Data DDRAM: Write
AMSUNG
Write Data DDRAM: Write
MSUNG
Write Data DDRAM: Write
SUNG KS0_
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Write Data DDRAM: Write
KS00_
Write Data DDRAM: Write
KS007_
Write Data DDRAM: Write
KS0072_
Cursor Display Shift: Cursor shift left
KS0072
Write Data DDRAM: Write
KS0073_
Return Home
SAMSUNG KS0073
Clear Display
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
IE='High' Power supply Initialized internal power reset circuit
Function Set: 8-bit, RE(1)
Extended Function Set: 5-font, 4-lin
Function Set: RE(0)
Display ON/OFF Control: Display/Cursor
Write Data DDRAM: Write
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Write data DDRAM: Write
Write data DDRAM: Write
SAMSUNG_
DDRAM Address
SAMSUNG
Write data DDRAM: Write
SAMSUNG
Write data DDRAM: Write
SAMSUNG KS0073_
DDRAM Address
SAMSUNG KS0073
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Write data DDRAM: Write
SAMSUNG KS0073
Write data DDRAM: Write
SAMSUNG KS0073 DRIVER_
DDRAM Address
SAMSUNG KS0073 DRIVER
Write data DDRAM: Write
SAMSUNG KS0073 DRIVER CONTROLLER_
Function Set: RE(0), DH(1)
SAMSUNG KS0073 DRIVER CONTROLLER_
Function Set: RE(1)
SAMSUNG KS0073 DRIVER CONTROLLER_
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Shift/Scroll Enable: DS4(1), DS3/2/1(0)
SAMSUNG KS0073 DRIVER CONTROLLER_
Function Set; RE(0
SAMSUNG KS0073 DRIVER CONTROLLER_
Cursor Display Shift: Display shift left
SAMSUNG KS0073 DRIVER CONTROLLER_
Cursor Display Shift: Display shift left
SAMSUNG KS0073 DRIVER CONTROLLER_
Cursor Display Shift: Display shift left
SAMSUNG KS0073 DRIVER ONTROLLER_
Cursor Display Shift: Display shift left
SAMSUNG KS0073 DRIVER NTROLLER_
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Return Home
SAMSUNG KS0073 DRIVER CONTROLLER
Function Set; RE(0), REV(1)
SAMSUNG KS0073 DRIVER CONTROLLER
Cursor Display Shift: Display shift right
SAMSUNG KS0073 DRIVER CONTROLLER
Cursor Display Shift: Display shift right
SAMSUNG KS0073 DRIVER CONTROLLER
Return Home
SAMSUNG KS0073 DRIVER CONTROLLER
Function Set: RE(0), REV(0)
SAMSUNG KS0073 DRIVER CONTROLLER
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Function Set; RE(1
SAMSUNG KS0073 DRIVER CONTROLLER
Entry Mode Set: BID(1)
Write Data DDRAM: Write
Write Data DDRAM: Write
Write Data DDRAM: Write
Clear Display
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
FRAME FREQUENCY 1/17 Duty Cycle
1-Line selection perio
FRAME FRAME
COM1
Normal Display Mode (LP=0) Item 5-dot font width 1-line selection perio Frame frequency clocks 79.4 6-dot font widt clocks 66.2
Normal Display Mode (LP=1) Item 5-dot font width 1-line selection perio Frame frequency clocks 66.2 6-dot font widt clocks 55.1 OSC=270 clock=3.7
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
1/33 duty cycle
1-Line selection perio
FRAME FRAME
COM1
Normal Display Mode (LP=0) Item 5-dot font width 1-line selection perio Frame frequency clocks 81.8 6-dot font widt clocks 68.2
Normal Display Mode (LP=1) Item 5-dot font width 1-line selection perio Frame frequency clocks 68.2 6-dot font widt clocks 56.8 OSC=270 clock=3.7
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
POWER SUPPLY DRIVING PANEL When external power supply used
When internal booster used
(Boosting twice) detached using power down mode
(Boosting three times)
V5OUT2
V5OUT2 V5OUT3
V5OUT3
detached using power down mode
Boosted output voltage should exceed maximum value driving voltage. Especially, voltage over 4.3V should supplied referenc voltage (Vci) when boosting three times. voltage over 5.5V should supplied reference voltage (Vci) when boosting twice. value resistance, according number lines, duty ratio bias, shown below. (Refer Table Table Duty Ratio Power Supply Driving Item Number lines Duty ratio Bias Divided resistance 1/17 Data 1/33 1/6.7 2.7R
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
MAXIMUM ABSOLUTE RATE Characteristi Power supply voltage(1) Power supply voltage(2) Input voltage Operating temperature Storage temperatur Symbol VLCD Topr Tstg Value -0.3 +7.0 -15.0 +0.3 -0.3 +125 Unit
Voltage greater than above damage circuit (VDDV1V2V3V4V5)
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
ELECTRICAL CHARACTERISTICS Characteristics (VDD Symbol VIH1 Input Voltage (except OSC1) VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 VdCOM VdSEG fOSC External Clock duty Condition Internal oscillation external clock. (VDD=3.0V,fosc 270kHz) -0.1mA 0.1mA -40µA 40µA 0.1mA (PULL (VDD 0.7V -0.3 -0.3 0.7V 0.75VDD 0.8V 0.15 0.2VDD 0.2VDD 0.2VDD 0.2VDD -120 Unit
Item Operating Voltage Supply Current
Input Voltage (OSC1) Output Voltage (DB0 DB7) Output Voltage (except DB7)
Voltage Drop Input Leakage Current Input Current Internal Clock (external
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Characteristics: continued)
Item Voltage Converter Out2 (Vci 4.5V) Voltage Converter Out3 (Vci 2.7V) Voltage Converter Input Driving Voltage
Symbol VOUT2 VOUT3 VLCD
Condition IOUT 0.25 fosc 270kHz VDD-V5 Bias 1/6.7 Bias
-3.0 -4.3
Type -4.2 -5.1
Unit
13.0 13.0
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Characteristics
(VDD 5.5V, Item Cycle Rise Fall Time Pulse Width (High, Low) Symbol tr,tf tsu1 tsu2 tr,tf tr,tf tsu1 tsu2 Unit
Mode
Write Mode (Refer Fig-21)
Setup Time Hold Time Data Setup Time Data Hold Time Cycle Rise Fall Time Pulse Width (High, Low)
Read Mode (Refer Fig-22)
Setup Time Hold Time Data Output Delay Data Hold Time Serial Clock Cycle Time Serial Clock Rise/Fall Time Serial Clock Width (High, Low)
Serial Interface (Refer Fig-23)
Chip Select Setup Time Chip Select Hold Time Serial Input Data Setup Serial Input Data Hold Time Serial Output Data Delay Time Serial Output Data Hold Time
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Characteristics: continued)
(VDD 4.5V, Item Symbol tr,tf tsu1 tsu2 tr,tf tr,tf tsu1 tsu2 Type Unit
Mode Cycle
Rise Fall Time Pulse Width (High, Low) Write Mode (Refer Fig-21) Setup Time Hold Time Data Setup Time Data Hold Time Cycle Rise Fall Time Pulse Width (High, Low) Read Mode (Refer Fig-22) Setup Time Hold Time Data Output Delay Data Hold Time Serial Clock Cycle Time Serial Clock Rise/Fall Time Serial Clock Width (High, Low) Serial Interface (Refer Fig-23) Chip Select Setup Time Chip Select Hold Time Serial Input Data Setup Serial Input Data Hold Time Serial Output Data Delay Time Serial Output Data Hold Time
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
Characteristics: continued)
(VDD Item Symbol tr,tf tsu1 tsu2 -1000 1000 Unit
Mode
Clock Pulse Width (High, Low) Clock Rise Fall Time Interface Mode with Extension Driver (Refer Fig-24) Clock Setup Data Setup Time Data Hold Time Delay Time
VIL1 tSU1
VIL1
VIL1 VIL1 tSU2
VIL1
VIL1
DB0~DB7
VIL1
Valid Data
VIL1
Fig-21. Write Mode
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
VIL1 VIH1
VIH1
VIL1
VIL1
DB0~DB7
VIL1
Valid Data
VIL1
Fig-22. Read
SCLK
VOL1
Fig-23. Serial Interface Mode
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
VOH2
VOH2 VOL2 VOH2 tSU1 VOH2 VOL2 VOH2 VOL2 tSU1
CLK1
CLK2
VOL2
VOL2
Fig-24. Interface Mode with Extensive Driver
KS0073
34COM 60SEG DRIVER CONTROLLER MATRIX
RESET TIMIN
(VDD=2.7V 5.5V, Ta=-30°C 85°C) Item Reset level width (Refer Fig-25) Symbol tRES Unit
tRES
RESET
Fig-25. Reset TimingDiagram

34COM 60SEG DRIVER CONTROLLER MATRIX INTRODUCTION KS0073 matrix d

Top Searches for this datasheet

Other recent searches