8-Channel, 16/24-Bit Buffered Multi-Range following information b

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CS5521/22/23/24/28
8-Channel, 16/24-Bit Buffered Multi-Range
following information based technical data sheet: CS5521/23 DS317PP2 CS5522/24/28 DS265PP3 Please contact Cirrus Logic further information.
352'8&7 ,1)250$7,21
Copyright Cirrus Logic, Inc. 1999 (All Rights Reserved)
PI317PP3
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Contacting Cirrus Logic Support
complete listing Direct Sales, Distributor, Sales Representative contacts, visit Cirrus Logic site www.cirrus.com
further information Cirrus Logic products, please visit website "www.cirrus.com" call literature department (800) 888-5016 ext. 3594 (512) 912-3594 data sheets application notes.
CS5521/22/23/24/28
Features
8-Channel, 16/24-Bit Multi-Range
Features
Delta-Sigma Converter Linearity Error: 0.0007%FS Noise Free Resolution: 18-bits Bipolar/Unipolar Input Ranges
Chopper Stabilized Instrumentation Amplifier On-Chip Charge Pump Drive Circuitry Differential Multiplexer Conversion Data FIFO Programmable/Auto Channel Sequencer 2-Bit Output Latch Simple three-wire serial interface
SPIand MicrowireCompatible Schmitt Trigger Serial Clock (SCLK)
Output Settles Conversion Cycle 50/60 Simultaneous Rejection Buffered VREF with Input Capability System Self-Calibration with Registers Channel Single Analog Supply +3.0 Digital Supply Power Mode Consumption:
PI317PP3
CS5521/22/23/24/28
Description Description
16-bit CS5521/23 24-bit CS5522/24/28 highly integrated converters which include instrumentation amplifier, (programmable gain amplifier), multi-channel multiplexer, digital filters, self system calibration circuitry. chips designed provide their negative supply which enables their on-chip instrumentation amplifiers measure bipolar ground-referenced signals ±100 directly supplying with -2.5 with ±2.5 signals (with respect ground) measured. digital filters provide programmable output update rates 1.88 3.76 7.51 61.6 84.5 101.1 when operating from 32-kHz crystal. CS5521/22/23/24/28 capable producing output update rates with 100-kHz clock. filters designed settle full accuracy selected output update rate within conversion cycle. When operated word rates less, digital filters reject both line interference simultaneously. power, single conversion settling time, programmable output rates, ability handle negative input signals make these single supply products ideal solutions isolated non-isolated applications.
AGND VREF+ VREFX1 AIN1+ AIN1AIN2+ AIN2AIN3+ AIN3AIN4+ AIN4Latch XOUT Calibration Memory Calibration Clock Gen. Output Register
CS5524 Shown
DGND
Programmable Gain Differential Order Digital Filter Calibration Register Control Register SCLK
Modulator
PI317PP3
CS5521/22/23/24/28
Overview Overview
CS5521/23 CS5522/24/28 16-bit 24-bit converters which include chopper-stabilized instrumentation amplifier input, on-chip programmable gain amplifier. They optimized measuring low-level unipolar bipolar signals process control medical applications. CS5521/22/23/24/28 also include fourth order delta-sigma modulator, calibration micro-controller, eight digital filters used select between eight output update rates, 2-bit analog latch, multiplexer, serial port. CS5521/22/23/24/28 include (Charge Pump Drive) output which provides negative bias voltage on-chip instrumentation amplifier when used with combination external diodes capacitors. This makes converters ideal thermocouple temperature measurements because biasing scheme enables CS5521/22/23/24/28 measure negative voltages with respect ground without need negative supply.
FAQs
What determines input span converter? CS5521/22/23/24/28 provide default input ranges. With 2.5V reference default ranges reference voltage also used modify input range. example, reference voltage reduced percent, default input ranges scale half. example, VREF then VREF 1.25 then 1.25 VREF then calibration used modify default input ranges? Yes, calibration used modify default input ranges. converters offer system gain calibration which used full scale input. With system gain calibration, each range exceeded approximately percent. Further note ADCs also offer system offset calibration. System offset calibration used zero point ADC's transfer function. converter typically trim percent full scale input span.
PI317PP3
CS5521/22/23/24/28
FAQs
calibration required converter? calibration required converter. signal measured within ADC's nominally selected input range (25mV, 55mV, 100mV, 1.0V, 2.5V, 5V), converter perform conversions without need calibrations. Keep mind that errors system remain present when calibration performed, however, this acceptable errors insignificant measurement errors removed some other means, such software. Another side point that factory calibration performed using system calibration, contents calibration registers read system's processor stored EEPROM. These same calibration coefficients then down loaded into calibrations registers ADCs when power re-applied system. often need recalibrate? good rule thumb recalibrate converter system) with every degrees ambient temperature change. does instrumentation amplifier's chopping frequency affect converter's input impedance input current? CS5521/22/23/24/28 provide extremely input current extremely high input impedance. input impedance converter dynamic impedance depends whether instrumentation amplifier engaged. lower ranges mV), instrumentation amplifier engaged. Since input current ranges room temperature around 100pA default input range 100mV, typical input impedance range 1000 (100mV/100pA). higher ranges instrumentation amplifier bypassed coarse/fine charge buffers activated. input current these buffers tens nanoamps. input range, typical input impedance (2.5 V/10 nA).
PI317PP3
CS5521/22/23/24/28
FAQs
many conversion cycles does take converter settle full scale step input? CS5521/22/23/24/25/26/28/29 well CS5504/05/06/07/08/09 family converters designed settle conversion cycle. This makes converters ideally suited various input level multiplexer applications converters switched from channel channel with every conversion while maintaining resolution accuracy. does output word rate affect ADC's bandwidth? usable input bandwidth selected output word rate. example, with output word rate selected, available input signal bandwidth does multiplexer affect ADC's throughput? CS5521/22/23/24/28 provide two, four eight channel input multiplexors. ADCs' throughputs divided equally number channels each converter has. example, lets assume user designed system that uses CS5524 continuous conversion mode user sequentially stepping through four channels. With output word rate each channel would yield effective through 15/4, approximately 3.75 channel. What recommended need more less bandwidth than provided on-chip digital filter? CS5521/22/23/24/28 permit user external clock between kHz. using lower/higher rate clock, output word rates well filter corner frequencies scale linearly with clock rate. example, using clock, default rate scales approximately input bandwidth increases approximately
charge pump used source current external load? Yes, charge pump used source approximately Applications Note further details systems requiring such current.
PI317PP3
CS5521/22/23/24/28
FAQs
charge pump engaged, ensure that converter external components intrinsically safe? Intrinsic safety prohibits electrolytic bipolar) capacitors thus limiting certain size capacitors. Although capacitor recommended charge pump, four 0.47 ceramic capacitors parallel used. What recommended power supply start-up sequence ADCs? recommended practice that analog supply established before digital supply. separate digital analog supplies used, further recommended that diode placed between them (the cathode diode should point analog supply). What recommended software start-up sequence ADCs? Assuming user using 32.768kHz crystal ADCs interfacing them micro-controller, recommended start-up sequence delay software code allow time oscillator start, reset ADC's serial port with reset serial port initialization routine (i.e. fifteen 0xFF hexadecimal commands, followed 0xFE hexadecimal command), then reset setting (Reset System) configuration register. user needs remember return back zero will remain reset until cleared. best noise performance from ADCs? ADC's noise performance given output word rate gain range. minimize noise's effect code toggle, bipolar mode increase reference voltage, each these increase size LSB. Also, calibrate ADCs with lowest output word rate setting this minimizes noisy calibrations lowest output word rate noise performance best with slower throughputs.
PI317PP3
CS5521/22/23/24/28
FAQs
What advantages channel-sequencer data conversion FIFO offer? channel-sequencer permits user pre-sequence future conversions. conversion sequences programed converted. Once converted, data conversion FIFO used store conversions until read processor later time. What benefit does evaluation board offer? CDB5521/22/23/24/28 evaluation board saves time money over prototyping. preassembled board comes equipped with 80C51 micro-controller 9-pin cable link evaluation board PCcompatible computer. evaluation system also includes software which provides easy access internal registers converter displays converter's time domain, frequency domain noise histogram performance.
PI317PP3
CS5521/22/23/24/28
Ordering Information Ordering Information
Model Number CS5521-AP CS5521-AS CS5522-AP CS5522-AS CS5523-AP CS5523-AS CS5524-AP CS5524-AS CS5528-AP CS5528-AS Bits Channels Linearity Error (Max) ±0.003% ±0.003% ±0.0015% ±0.0015% ±0.003% ±0.003% ±0.0015% ±0.0015% ±0.0015% ±0.0015% Temperature Range Package -40°C +85°C 20-pin 0.3" Skinny Plastic -40°C +85°C 20-pin 0.2" Plastic SSOP -40°C +85°C 20-pin 0.3" Skinny Plastic -40°C +85°C 20-pin 0.2" Plastic SSOP -40°C +85°C 24-pin 0.3" Skinny Plastic -40°C +85°C 24-pin 0.2" Plastic SSOP -40°C +85°C 24-pin 0.3" Skinny Plastic -40°C +85°C 24-pin 0.2" Plastic SSOP -40°C +85°C 24-pin 0.3" Skinny Plastic -40°C +85°C 24-pin 0.2" Plastic SSOP
PI317PP3
CS5521/22/23/24/28
Ordering Information
PI317PP3
17847 4210 INDUSTRIAL DRIVE AUSTIN, TEXAS 78744 512.445.7222 800.888.5016 FAX: 512.445.7581 WORLDWIDE WEB: http://www.cirrus.com

8-Channel, 16/24-Bit Buffered Multi-Range following information b

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