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PB-MV13 20mm CMOS Active-Pixel Digital Image Sensor
©2000 Photobit Corporation. rights reserved. Photobit, wave binary symbol, Behind Every Great Digital Image registered trademarks, TrueBit, TrueColor, TrueSNAP (Shuttered-Node Active Pixel), Fully Flexible Open Architecture, Serial Host Interface Port, Leading Active Pixel Revolution trademarks, Photobit Corporation United States other countries. proprietary interface trademark Philips Semiconductors. Other trademarks referenced property their respective owners used identify specific products services. Photobit products protected under U.S. Patents 5,471,515; 5,793,322; 5,841,126; 5,880,691; 5,886,659; 5,887,049; 5,909,026; 5,949,483; 5,952,645; 5,990,506; 5,995,163; 6,005,619; 6,021,172; 6,043,690; 6,049,247. Other U.S. foreign patents pending. Photobit conveys license under patents, copyrights, mask work rights, rights others; does Photobit represent that products shown described herein free from patent infringement from third-party right. Photobit products intended medical radiography life support appliances, devices, systems. Photobit product such applications without written consent Photobit prohibited. Photobit assumes obligation correct errors contained herein advise user this text correction, such made. Photobit assumes liability accuracy correctness engineering software support assistance provided user. Written designed Photobit Corporation, North Robles Avenue, Floor, Pasadena, California 91101, U.S.A. Telephone (626) 683-2200. (626) 683-2220. www.photobit.com Printed United States America.
PB-MV13 20mm CMOS Active-Pixel Digital Image Sensor
August 2000 (Version 1.0)
Contents
Product Specification
Introduction
Introduction
Features. Top-Level Specification Electrical Signal Path Diagram Functional Block Layout External Control Sequence Electronic Shutter Descriptions Board Connections Electrical Specification Optical Optical Specification Quantum Efficiency. Lens Selection Mechanical Package Views Environmental
Photons-to-bits data stream 1280H 1024V image resolution TrueSNAP (Shuttered-Node Active Pixel) freeze-frame electronic shutter 500+ frames second 12-micron square active pixels Monochrome color parallel digital output ports <500 maximum power dissipation
On-chip TrueBit® Noise Cancellation Photobit® TrueColor Image Fidelity On-chip 10-bit analog-to-digital converters 3.3-volt operation
Features
PB-MV13 1280H 1024V (1.31 megapixel) CMOS digital image sensor capable framesper-second (fps) operation. TrueSNAP electronic shutter allows simultaneous exposure entire pixel array. Available color monochrome, sensor on-chip 10-bit analog-to-digital converters (ADCs), which self-calibrating, fully digital interface. chip's input clock rate approximately fps, providing compatibility with many off-the-shelf interface components. sensor (10) 10-bit-wide digital output ports. open architecture design provides access internal operations. timing pixel-read control integrated on-chip. fps, sensor dissipates less than less than operates 3.3V supply. Pixel size microns square digital responsivity 1000 bits lux-second.
Page
Features (continued)
PB-MV13 CMOS image sensor open architecture provide access internal operations. complete camera system built using chip conjunction with following external devices:
FPGA/CPLD/ASIC controller, manage timing signals needed sensor operation. 20mm diagonal lens. Biasing circuits bypass capacitors.
+3.3V Bias
Off-Chip
Port Port D0~D9 D10~D19 D20~D29 D30~D39 D40~D49 D50~D59 D60~D69 D70~D79 D80~D89 D90~D99
On-Chip Control
Controller
(FPGA, CPLD, ASIC, etc.)
Control Timing
(1280H 1024V)
Pixel Array
Memory
System Clock
Port Port Port Port Port Port Port Port
System Clock
System Interface
On-Chip
Camera System Using PB-MV13 CMOS Image Sensor
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Top-Level Specification
Array Format Pixel Size Type Sensor Imaging Area Frame Rate
Output Data Rate Power Consumption Digital Responsivity Internal Intra-Scene Dynamic Range Supply Voltage Operating Temperature Output Color Shutter Shutter Efficiency Shutter Exposure Time Package Programmable Controls
1280H 1024V (1,310,720 pixels) aspect ratio 12.0 12.0 TrueSNAP (Shuttered-Node Active Pixel) 15.36 12.29 Diagonal: 19.67 0-500+ (1280 1024) >10,000 with partial scan [e.g. 0-4000 (1280 128)] Mbytes/sec. (master clock MHz, ~500 fps) <500 <150 Monochrome: 1000 bits lux-second reference +3.3 -5°C +60°C 10-bit digital through parallel ports Monochrome color Photobit® TrueSNAP freeze-frame electronic shutter >99.9% µsec greater than msec On-chip 10-bit column-parallel 280-pin ceramic 208-pin CQFP Open architecture On-chip: controls
Output multiplexing calibration
Off-chip: Window size location
Frame rate data rate Shutter exposure time (integration time) reference
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Electrical
SENSE AMPS MEMORY
ADCs
DIGITAL CONTROL PIXEL ARRAY
BOTTOM ADCs
Sensor Architecture (not scale)
Signal Path Diagram
Pixel
TX_N
Column Processing Pixel Memory
Bias VLN1 Bias VREF2 Calibration VREF1 VREF4
Photo Detector
PG_N
VRST_PIX
Buffer
Offset (VREF3-VCLAMP3)/20
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Sample Hold
BIAS VLN2
registers
Functional Block Layout
TX_N PG_N PIXEL ARRAY Decoder Driver
LogicRST Timing Block
RowSTRT
#1280
RowDone
Sample
1280 SRAM Register 1280 SRAM Output Register Column Decoder
Pads
Data Shift Read
SRAM Read Control
Shift
Sense Amps Output Ports
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
External Control Sequence
PB-MV13 includes on-chip timing control circuitry control most pixel, ADC, output multiplexing operations. However, sensor still requires controller (FPGA, CPLD, ASIC, etc.) guide through full sequence operation. With TrueSNAP freeze-frame electronic shutter signal charges integrated pixels parallel. charges then sampled into pixel analog memories (one memory pixel) subsequently, row, digitized read sensor. integration photosignal controlled control signals: PG_N TX_N. clear pixels start integration, PG_N made low. transfer data into pixel memory, TX_N made low. time difference between procedures exposure time. should noted that neither PG_N TX_N pulses clear pixel analog memory. Pixel memory cleared during previous readout (i.e., readout process resets pixel analog memory), applying PG_N TX_N together (i.e., clearing both pixel pixel memory same time). With TrueSNAP freeze-frame electronic shutter sensor operate either simultaneous sequential mode which generates continuous video output. simultaneous mode, series frames being captured, PG_N TX_N signals exercised while previous frame being read sensor. simultaneous mode typically "end integration" occurs last frame (row #1023) last window interest. position "start integration" then calculated from desired integration time. sequential mode PG_N TX_N signals exercised control integration time, then digitization readout frame takes place. Alternatively, sensor single frame snapshot mode which image captured. sensor column-parallel architecture that allows array 1,280 analog-to-digital converters chip digitize simultaneously analog data from entire pixel row. following input signals utilized control conversion readout process:
Signal Name ROW_ADDR ROW_STRT_N LD_SHFT_N DATA_READ_EN_N
Description Input Width Address 10-bit Start 1-bit Load shift register 1-bit Data read enable 1-bit
10-bit ROW_ADDR (row address) input selects pixel read each readout cycle. ROW_STRT_N signal starts process reading analog data from pixel row, analog-to-digital conversion, storage digital values registers. When these actions completed, sensor sends response back system controller using ROW_DONE_N. address must valid first half processing time (the period between ROW_START_N ROW_DONE_N). PB-MV13 contains pipeline style memory array, which used store data after digitization. This memory also allows data from previous conversion cycle read while conversion taking place. digital readout controlled lowering LD_SHFT_N signal, followed DATA_READ_EN_N signal. LD_SHFT_N transfers digitized data from register output register. DATA_READ_EN_N used enable data output from output register. pixel readout conversion cycle started clock cycles after DATA_READ_EN_N pulled low. output register allows reading digital data from previous performed same time conversion (pipeline mode). This means that total time will only that between when: ROW_STRT_N signal applied ROW_DONE_N returned; LD_SHFT_N DATA_READ_EN_N applied plus clock cycles. pipelined operation means there will always latency start sensor operation. alternative pipelined operation burst data operation which pixel conversion initiated until after output register emptied (and LD_SHFT_N been taken high). ratio line active blanking times adjusted easily match variety display collection formats.
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PB-MV13 Product Specification, August 2000 (Version 1.0)
External Control Sequence (continued)
PB-MV13
Controller
ROW_ADDR
Controls
Column Parallel 10-bit
Even Columns
ROW_STRT_N
Control Logic/ Decoders
PIXEL ARRAY
Columns
SYSCLK
Controls
Column Parallel 10-bit Reads contents pixel specified ROW_ADDR Converts pixel signals digital values Stores digital values register (1280 bit)
Example PB-MV13 being digitized
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
External Control Sequence (continued)
PG_N TX_N start integration, PG_N signal simultaneously resets photodetectors entire pixel array. integration, TX_N signal simultaneously transfers charge from photodetector memory inside each pixel entire pixel array. sequential mode PG_N TX_N pulses must have minimum duration SYSCLK cycles. simultaneous mode PG_N TX_N pulses must have duration SYSCLK cycles applied window between 66th 129th SYSCLK cycles. Additionally, simultaneous mode between exposures single SYSCLK duration pulse must applied each during 130th clock cycle. ROW_ADDR address pixel read input externally this 10-bit input bus. Must valid least SYSCLK cycles, must valid when ROW_STRT_N pulled low. ROW_STRT_N This signal: i-Reads contents pixel specified ROW_ADDR above) ii-Converts pixel signal digital value iii-Stores digital value register (1280 10-bit) This process completed 128-129* SYSCLK cycles. Must valid minimum clock cycles maximum clock cycles. ROW_DONE_N 128-129* SYSCLK cycles after ROW_STRT_N been pulled above) sensor acknowledges completion read operation/digitization sending going pulse this pin. Valid clock cycles. LD_SHFT_N This signal transfers digitized data from register output register (1280 10-bit) gates power sense amplifiers. first data (columns 1-10) available output third
rising edge SYSCLK after LD_SHFT_N pulled low. enabled simultaneously with after rising edge ROW_DONE_N. Must remain entire time data being read out. DATA_READ_EN_N This signal used enable data output from output register (1280 10-bit) ten, 10-bit output ports. initiated simultaneously with after LD_SHFT_N selected. Minimum width clock cycle. pixel array PB-MV13 image sensor vertically partitioned into groups columns that correspond sensor's (10) identical output ports.The first column each 10-column always goes Port while last column each goes Port etc. operator access pixels PB-MV13 only using ports (see page CLK128 Port Col. Col. Col. 1271 Port Col. Col. Col. 1272 Port Col. Col. Col. 1273 Port Col. Col. Col. 1274 Port Col. Col. Col. 1275 Port Col. Col. Col. 1276 Port Col. Col. Col. 1277 Port Col. Col. Col. 1278 Port Col. Col. Col. 1279 Port Col. Col. Col. 1280 output register allows processing performed while digital data from previous operation being read sensor. pixel readout conversion cycle started clock cycles after DATA_READ_EN_N pulled low.
order minimize sensor power consumption, processing circuitry operates SYSCLK÷2. Therefore, depending user's implementation, there will either SYSCLK cycles between start ROW_STRT_N ROW_DONE_N.
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PB-MV13 Product Specification, August 2000 (Version 1.0)
External Control Sequence (continued)
SYSCLK ROW_ADDR ROW_STRT_N ROW_DONE_N LD_SHFT_N DAT_READ_EN_N DATA TX_N
Timing diagram
VALID
SKEW
ROW_ADDR ROW_STRT_N ROW_DONE_N LD_SHFT_N
1023
1022
1023
DAT_READ_EN_N DATA PG_N=PG1+PG2 TX_N EXPOSURE TIME 1023
ROW1023 ROW0 ROW1 ROW1021 ROW1022 ROW1023
Frame Timing
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
External Control Sequence (continued)
PB-MV13 contains special self-calibrating circuitry that enables reduce column-wise fixedpattern noise. This calibration process consists connecting calibration signal (VREF2) each inputs, estimating storing these offsets bits) subtract from subsequent samples. Typical Signal Timing (Initialization Sequence) diagram shows timing sequence calibrate sensor. Calibration occurs automatically after logic reset (LRST_N) also started user, pulling CAL_STRT_N low. When calibration finished, sensor generates active CAL_DONE_N. Significant ambient temperature drift justify recalibration.
CAL_STRT_N
CAL_DONE_N SYSCLK
LRST_N
CAL_DONE_N SYSCLK
Typical Signal Timing (Initialization Sequence)
CAL_STRT_N two-clock cycle-wide active-low pulse that initiates calibration sequence. pulse must actuated microsecond after either power-up removal sensor from powerdown state. Users find easiest calibrate means logic reset. CAL_DONE_N two-clock cycle-wide active-low output pulse that asserted when calibration complete. device will automatically initiate calibration sequence upon logic reset. Completion this sequence, cases where initiated reset, still with CAL_DONE_N signal. This process complete within SYSCLK cycles CAL_STRT_N. This process complete within SYSCLK cycles LRST_N. LRST_N two-clock cycle-wide active-low pulse that resets digital logic. puts logic into known state (all flip-flops reset). This signal also initiates calibration sequence.
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Electronic Shutter
PB-MV13 intended operated primarily with TrueSNAP freeze-frame electronic shutter, also capable operating Electronic Rolling Shutter (ERS) mode. With TrueSNAP shutter operated generate continuous video output (simultaneous mode sequential mode) caputre single images (single frame mode). 2.4.1 TrueSNAP Simultaneous Mode
PG_N
2.4.2 TrueSNAP Sequential Mode
PG_N TX_N
ROW_ADDR
1023
Exposure time
Exposure time
Readout
Readout
Time
Read row#1023
ROW_ADDR
1023
Exposure time
Typical Example TrueSNAP Simultaneous Mode: Exposure During Readout
Readout Time Read row#1023
Readout
Typical Example TrueSNAP Sequential Mode: Exposure Followed Readout
simultaneous mode, series frames being captured, PG_N TX_N signals exercised while previous frame being read sensor. simultaneous mode typically "end integration" occurs last frame (row #1023) last window interest. position "start integration" then calculated from desired integration time. Please note that pixel memory cleared during readout process.
PB-MV13 Product Specification, August 2000 (Version 1.0)
Read row#1023 Read row#
Read row#0
sequential mode PG_N TX_N signals exercised control integration time, then digitization readout frame takes place. Please note that pixel memory cleared during readout process.
Page
Read row#1023
TX_N
Read row#0
Read row#0
2.4.3 TrueSNAP Single Frame PB-MV13 single frame snap-shot mode which image captured. single frame mode integration must preceded void frame read (selecting addresses applying ROW_STRT_N) PG_N TX_N must applied together clear pixel pixel memory.
PG_N TX_N
2.4.4 Mode This mode enabled pulling PG_N high TX_N low. detailed description mode found Section PB-1024 Product Specification. 2.4.5 Partial Scan Examples PB-MV13 partially scanned sub-sampling rows. user select which rows many rows include partial scan. example, with 66-megahertz clock, time approximately microseconds, resulting following possiblities: frame: 500,000 frames second rows frame: 250,000 frames second rows frame: 50,000 frames second rows frame: 5,000 frames second rows frame: 2,000 frames second rows frame: 1,000 frames second 1,024 rows frame: frames second .etc
ROW_ADDR
1023 EXPOSURE TIME
"SLEEP" STATE
"SLEEP" STATE
READOUT
TIME
READ
Typical Example TrueSNAP Single-Frame Mode
Page
READ #1023
PB-MV13 Product Specification, August 2000 (Version 1.0)
Descriptions
Signal Name AGND CAL_DONE_N CAL_STRT_N DARK_OFF_EN_N
Function Power supply analog processing circuitry (column buffers, ADC, support). Ground analog signal processing circuitry.
Number(s) R18, P18, K18, T17, N16, L17, K17, J15,
DATA [99:0]
DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23 DATA24 DATA25 DATA26 DATA27 DATA28
two-clock cycle-wide active-low pulse that indicates completed calibration operation. Starts calibration process ADC. This two-clock cycle-wide active-low pulse. input enables common mode dark offset pixels. value offset defined VREF3 VCLAMP3. Subtracts fixed offset pre-ADC. Signal pulled on-chip. Pixel data output that pixels (100 bits) wide. (least significant bit) lowest order pixel (see page drawing page group pixels being output, (most significant bit).
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Descriptions (continued)
Signal Name DATA29 DATA30 DATA31 DATA32 DATA33 DATA34 DATA35 DATA36 DATA37 DATA38 DATA39 DATA40 DATA41 DATA42 DATA43 DATA44 DATA45 DATA46 DATA47 DATA48 DATA49 DATA50 DATA51 DATA52 DATA53 DATA54 DATA55 DATA56 DATA57 DATA58 DATA59 DATA60 DATA61 DATA62 DATA63 DATA64 DATA65 DATA66 DATA67 DATA68 DATA69 DATA70 DATA71 DATA72
Function
Number(s)
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Descriptions (continued)
Signal Name DATA73 DATA74 DATA75 DATA76 DATA77 DATA78 DATA79 DATA80 DATA81 DATA82 DATA83 DATA84 DATA85 DATA86 DATA87 DATA88 DATA89 DATA90 DATA91 DATA92 DATA93 DATA94 DATA95 DATA96 DATA97 DATA98 DATA99 DGND LD_SHFT_N
Function
Number(s)
DATA_READ_EN_N
LRST_N ROW_ADDR [9:0]
ROW_ADDR0 ROW_ADDR1 ROW_ADDR2 ROW_ADDR3
Power supply core digital circuitry. N15, Ground core digital circuitry. H18, active-low envelope signal that places recently converted data into output register output, enables sense amps resets column counter. active-low envelope signal that enables column counter causes (10) 10-bit output ports updated with data rising edge system clock. Column counter disabled output frozen when this input high. Global logic reset function (asynchronous). Active-low pulse. 10-bit 1023, bottom top) that controls which pixel being processed read out. asychronous (unclocked) digital input. MSB.
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Descriptions (continued)
Signal Name ROW_ADDR4 ROW_ADDR5 ROW_ADDR6 ROW_ADDR7 ROW_ADDR8 ROW_ADDR9 ROW_DONE_N ROW_STRT_N STANDBY_N
Function
Number(s)
SYSCLK VDD_IO
VLN1 VLN2
VREF1
two-cycle-wide pulse that indicates that processing currently addressed been completed. Starts conversion pixel (defined address) content. two-clock cycle-wide active-low pulse. input sets sensor power mode. (Allow microsecond before calibrating, after coming this mode). Signal pulled on-chip. Clock input entire chip. Maximum design frequency (50%, ±5%, duty cycle). Power supply digital ring. G16, E10, C13, B14, F15, R13, T12, U11, T16, Bias setting pixel source follower operating current. Impedance: 3kOhm, 10pF. Decoupling capacitors recommended. Bias setting voltage ADC. Leave open circuit since this current on-chip. Impedance: 3kOhm, 10pF. Bias setting voltage column source follower operating current. Impedance: 3kOhm, 10pF. Decoupling capacitors recommended. reference input voltage that sets maximum input signal level (defines level where code occurs) thus sets size least significant (LSB) analog digital conversion process. smaller VREF1produces smaller LSB, which means smaller analog signal level input required produce same digital code out. Likewise, larger VREF1 produces larger LSB, which means larger analog signal level input required produce same digital code out. Thus reference value used like global gain adjustment. This signal connections minimize internal losses during high-speed operation. User voltage source must supply transient current frequency with duty cycle. Decoupling capacitors AGND ~1µF (ceramic) (electrolytic) placed close package pins possible usually sufficient filter this required current transient. K16,
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Descriptions (continued)
Signal Name VREF2
Function reference used calibration operation. User voltage source must supply transient current frequency with duty cycle. ceramic decoupling capacitor AGND ~0.1µF usually sufficient filter this required current transient. Dark offset cancellation positive input reference, tied pedestal voltage added signal. Should connected AGND. Dark offset cancellation negative input reference. User voltage source must supply transient current frequency with duty cycle. ceramic decoupling capacitor AGND ~0.1 usually sufficient filter this required current transient. Data synchronous output. User prefer this data clock instead SYSCLK. Digital ground ring.
Number(s)
VREF3 VCLAMP3
T10, U13, B15, B17, H17, D12, D11, E17, T11, U18,
PIXEL_CLK_OUT DGND_IO
VLP_DRV TX_N PG_N VRST_PIX
Should connected AGND. This active pulse that controls transfer charge from photodietector memory inside each pixel entire pixel array. This active pulse that resets photodetectors thereby starts integration cycle. Power supply pixel array. There noticable power consumption this (<100 µA). User voltage source must supply transient current frequency amps, once frame. Decoupling capacitors AGND (ceramic) (electrolytic) usually sufficient filter this required current transient.
L18, P16,
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Descriptions (continued)
Signal Name VREF4
Function reference input. User voltage source must supply transient current frequency with duty cycle. ceramic decoupling capacitor AGND ~0.1µF usually sufficient filter this required current transient. connect.
Number(s)
E5,C3,C1, P1,R1, W10,W12, W14, W15,W17, W18, V17, R15, U17, V19, W19, U19, T19, R19, P19, N18, N19, M19, M17, L19, K19, J19, H19, G19, F19, E19, D19, C19, B19, C18, E15, C17, D16, A19, A17, A15, A14, A13, A11, A10, W16,
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Analog ground
Board Connections
Analog +3.3V
Digital 3.3V
ROWADDR0 ROWADDR1 ROWADDR2 ROWADDR3 ROWADDR4 ROWADDR5 ROWADDR6 ROWADDR7 ROWADDR8 ROWADDR9 SYSCLK DATA_READ_EN_N LD_SHFT_N CAL_DONE_N ROW_DONE_N CAL_STRT_N ROW_STRT_N DARK_OFF_EN_N STANDBY_N LRST_N PG_N PIXEL_CLK_OUT
Controller Interface
Analog +3.3V
10µF 0.1µF 0,01µF VCLAMP3
VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO
DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23 DATA24 DATA25 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31 DATA32 DATA33 DATA34 DATA35 DATA36 DATA37 DATA38 DATA39 DATA40 DATA41 DATA42 DATA43 DATA44 DATA45 DATA46 DATA47 DATA48 DATA49 DATA50 DATA51 DATA52 DATA53 DATA54 DATA55 DATA56 DATA57 DATA58 DATA59 DATA60 DATA61 DATA62 DATA63 DATA64 DATA65 DATA66 DATA67 DATA68 DATA69 DATA70 DATA71 DATA72 DATA73 DATA74 DATA75 DATA76 DATA77 DATA78 DATA79 DATA80 DATA81 DATA82 DATA83 DATA84 DATA85 DATA86 DATA87 DATA88 DATA89 DATA90 DATA91 DATA92 DATA93 DATA94 DATA95 DATA96 DATA97 DATA98 DATA99
AGND AGND AGND AGND AGND AGND
Analog +3.3V 10µF 0.1µF Analog +3.3V 10µF 0.1µF Analog +3.3V
100µF 0.01µF VREF1 VLN1
Analog +3.3V
10µF 0.1µF 0.01µF VREF2
VLN2
0.1µF
10µF
VLP_DRV
Analog +3.3V
100µF 0.01µF VRST_PIX
Analog +3.3V
10µF 0.1µF VREF4
VREF3 0.1µF 10µF 0.01µF
DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGNC_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND DGND DGND
Digital Ground
Pixel Data Output
Digital Ground
Notes: recommended that 0.01mF 0.1mF capacitors placed physically close possible PB-MV13's package. Alternatively, analog voltages depicted being generated from potentiometers could supplied from DACs. analog voltages VLN1, VLN2, VLP, VREF4 generated on-chip, user supply voltages override internal biases.
PB-MV13 Product Specification, August 2000 (Version 1.0)
Analog Ground
Page
Electrical Specification
Electrical Characteristics (Vsupply 3.3V 0.3V) Symbol Tplh Tphl Tsetup Thold PSRR_VDD PSRR_VDD_IO PSRR_VAA Characteristic Data output propagation delay high trans. Data output propogation delay high trans. Setup time input Hold time input Power supply rejection ratio digital supply Power supply rejection ratio digital supply Power supply rejection ratio analog supply Condition Min. Typ. Max. Unit
Vpwr Vgnd Vpwr=Min,VOH ripple supply ripple supply ripple supply
Electrical Characteristics (Vsupply 3.3V 0.3V) Symbol VREF1 VREF2 VREF3 VLN1 VLN2 VCLAMP3 VLP_DRV VRST_PIX VREF4 Ipwr1 Characteristic Condition Min. Typ. Max. Bias Column Buffers Reference Reference Calibration Dark offset Bias pixel source follower Bias Open Dark offset driver control Pixel Array Power Reference Open 0.25 Input High Voltage Vpwr+0.3 Input Voltage -0.3 Input Leakage Current, Pullup Resistor Vpwr Vgnd Output High Voltage Vpwr=Min, IOH=-100µA Vpwr-0.2 Output Voltage Vpwr=Min, IOL=100µA Maximum Quiescent clock, Supply Current load outputs Unit
Ipwr (VDD_IO) (VDD) (VAA)
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Electrical Specification (continued)
Absolute Maximum Ratings Symbol Vpwr Vout Parameter Supply Voltage Input Voltage Output Voltage Current Drain (Any I/O) Current Drain, Vpwr Vgnd Value -0.5 -0.5 Vpwr -0.5 Vpwr ±100 Unit
Maximum Ratings those values beyond which damage device occur. Vpwr VDD_IO (VDD supply digital circuit, analog circuit). Vgnd DGND AGND (DGND ground digital circuit, AGND analog circuit).
Recommended Operating Conditions Symbol Vpower
Parameter Supply Voltage Commercial Operating Temperature Junction Temperature
Min. 3.00
Max.
Unit
This device contains circuitry protect inputs against damage from high static voltages electric fields, user advised take precautions avoid application voltage higher than maximum rated.
Power Dissipation (Vpwr 3.3V; 25°C @500 fps) Symbol Pavg Parameter Average Power
Tplh, Tphl
Min.
Typ.
Max.
Unit
Tplh, Tphl
DOUT(99:0)
Clock Data Propagation Delay
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Optical Optical Specification
Image Sensor Characteristics 25°C)
Symbol DSNU, DSNU, Vdrk Dyn_I PRNU, PRNU, Kdrk
Parameter Responsivity (ADC VREF=1V) Dark signal non-uniformity, high spatial frequency Dark signal non-uniformity, spatial frequency Output referred dark signal Internal dynamic range Photo response non-uniformity, high spatial frequency Photo response non-uniformity, spatial frequency Dark current temperature coefficient
Typ. 1000 <0.4 <0.6
Unit LSB/lux-sec. bits/sec %/8°C
additional details regarding defect specifications please contact Photobit.
Pixel Array Symbol Resolution Pixel size Pixel pitch Pixel fill factor Parameter Number pixels active image dimensions Center-to-center pixel spacing Area drawn active area Typ. 1280 1024 Unit pixels
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Quantum Efficiency
Quantum Efficiency,
Quantum Efficiency,
Monochrome
Blue Green
1000
1100
1000
1100
Wavelength,
Wavelength,
Wavelength (nm) 389.9 399.9 409.9 419.9 430.0 440.0 450.0 460.0 469.9 479.9 489.9 499.9 509.9 520.0 530.0 540.0 550.0 560.0 570.0 579.9 589.8 599.9 609.9 619.9 629.9 639.9 649.9 659.9 669.9 679.9 689.9 699.9 709.9 719.9 729.9 739.9
Monochrome Quantum efficiency 12.12 14.12 15.46 17.97 19.03 19.82 20.81 21.41 22.50 22.75 22.73 23.44 23.23 21.88 21.01 21.77 20.88 19.55 17.21 18.49 17.49 16.39 15.93 15.01 14.92 13.98 14.16 11.55 11.85 12.51 11.11 11.17 8.80 9.82 8.82 7.67
Blue Quantum efficiency
Green Quantum efficiency
Quantum efficiency
Wavelength (nm) 749.9 759.8 769.8 779.8 789.8 799.8 809.7 819.7 829.7 839.7 849.7 859.7 869.7 879.7 889.7 899.7 909.7 919.7 929.7 939.7 949.7 959.7 969.7 979.7 989.7 999.7 1009.7 1019.7 1029.7 1039.6 1049.6 1059.6 1069.6 1079.6 1089.6 1099.6
Monochrome Quantum efficiency 8.90 8.24 7.74 7.48 5.93 5.50 5.97 5.27 4.92 5.03 4.38 3.69 3.81 3.77 2.96 2.37 2.42 2.44 1.97 1.60 1.52 1.62 1.36 1.03 0.81 0.79 0.77 0.66 0.45 0.34 0.25 0.23 0.16 0.13 0.08 0.05
Blue Quantum efficiency 5.74 6.03 6.00 6.00 6.63 8.10 9.36 9.38 9.27 8.64 7.67 7.01 6.69 5.78 4.69 4.22 4.18 3.88 3.14 2.78 2.68 2.47 1.97 1.49 1.30 1.25 1.10 0.84 0.57 0.43 0.37 0.28 0.20 0.13 0.08 0.06
Green Quantum efficiency 7.59 7.95 7.75 7.38 7.54 8.49 9.35 9.13 9.00 8.55 7.67 6.93 6.69 5.91 4.78 4.26 4.22 3.88 3.17 2.68 2.57 2.43 1.90 1.43 1.25 1.25 1.11 0.80 0.54 0.41 0.35 0.28 0.19 0.12 0.08 0.06
Quantum efficiency 10.17 9.99 9.32 8.50 8.42 9.25 9.98 9.61 9.41 8.73 7.67 7.01 6.69 5.78 4.69 4.17 4.18 3.88 3.14 2.78 2.67 2.47 1.98 1.49 1.30 1.22 1.10 0.85 0.57 0.43 0.37 0.28 0.20 0.13 0.09 0.07
6.95 9.05 10.99 13.04 14.91 16.23 17.91 18.29 18.06 17.01 15.90 14.28 12.32 10.34 8.32 6.46 5.30 4.65 4.38 4.14 3.80 3.61 3.46 3.34 3.52 3.45 3.59 3.74 4.18 4.42 4.57 4.94 5.16 5.12 5.34
2.00 2.34 2.71 3.35 4.05 5.10 6.99 8.91 10.55 12.01 14.01 16.29 18.14 19.23 19.37 18.12 16.97 15.44 13.81 11.52 9.00 7.23 5.95 5.12 4.95 4.54 4.52 4.69 5.32 5.83 6.15 6.75 6.98 6.87 7.09
1.95 1.98 2.07 2.27 2.51 2.79 3.46 4.05 4.48 4.83 5.31 5.81 6.17 6.45 6.56 6.29 6.12 6.36 7.80 10.05 11.84 13.01 13.19 12.69 12.89 11.83 11.52 10.91 11.18 10.57 10.11 10.22 10.43 9.99 10.02
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Lens Selection
Much specific information this section explained detail Technology section Photobit website. following information applies specifically Photobit PB-MV13 megapixel image sensor. Format diagonal image sensor array, 19.67 fits most closely, exactly, within optical format corresponding 1-inch specification. Some 1-inch optical format lenses have been shown work well with this sensor. Mounting Several lens mounting standards exist that specify threading lens' barrel well distance back flange lens should from image sensor lens properly form image. Typical lens mounting standards PB-MV13 are: Mount Mounting Name Threads Back-Flange-to-Image-Sensor 17.526 12.5 Field View Focal Length field view imaging system will depend both focal length imaging lens width image sensor. most image information humans attention generally falls within 45-degree horizontal field view, many camera systems attempt imitate this field view. However, some cases telephoto system (with narrow field view, less than degrees), wide angle system (with wide field view, more than degrees) desired. approximate field view that imaging system achieve shown following equation:
sensor, focal length imaging lens. example, imaging system's diagonal field view determined using diagonal image sensor (19.67 particular lens' focal length Alternatively, imaging system's horizontal field view determined using horizontal image sensor (15.36 particular lens' focal length lens with approximately focal length will provide 18-degree horizontal field view with PB-MV13 (keep mind that above equation simplified approximation). F-Number f-number, f/#, imaging lens ratio lens' focal length open aperture diameter. Every doubling f-number reduces light sensor factor four. example, lens f/1.4 lets four times more light than that same lens when f/2.8. f-number lenses capture light delivery image sensor, also require careful focus. Higher f-number lenses capture less light delivery image sensor, require much effort bring imaging system focus. f-number lenses generally cost more than high f-number lenses similar overall performance. Typical f-numbers various imaging systems are: 4.0+ Imaging application Low-light level imaging, manual focus systems Typical other small form cameras Common digital still cameras Often used machine vision applications
Typical f-numbers will range from 2.8. example, most S-mount lenses come with fixed f-number f/2.0.
where field view, tan-1 trigonometric function arc-tangent, width image
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PB-MV13 Product Specification, August 2000 (Version 1.0)
Lens Selection (continued)
Modulation Transfer Function (MTF) technical term that quantifies well particular system propagates information. cameras, "system" lens sensor, "information" picture they capturing. ranges from zero information gets through) (all information gets through), always specified terms information density. most imaging systems, limited performance imaging lens. lens must able transfer enough information image sensor able resolve details image that small pixels image sensor. pixels 12-micron pitch (the center pixel microns from center neighboring pixel). Thus, lens used should able resolve image features small microns. Typically, lens' plotted function number line pairs millimeter lens attempting resolve (more line pairs millimeter mean higher information densities). electronic imaging system, line pair will correspond image sensor pixels (each pixel resolve line). This equated
where LP/mm means line pairs millimeter image sensor's pixel pitch, millimeters. PB-MV13, 0.012 such that PB-MV13 LP/mm. Thus, lens should provide acceptable level LP/mm. most lenses, will highst center images they form, gradually drop toward edges images they form. well, MTFs values LP/mm will generally larger than MTFs high values LP/mm. many trade-offs that must decided user high needs particular imaging situation. Generally, near image sensor's LP/mm good MTFs higher than moderate MTFs from poor MTFs less than
Infrared Cut-Off Filters most visible imaging situations necessary include filter imaging path that blocks infrared (IR) light from reaching image sensor. This filter called cut-off filter. Various forms cut-off filters available, some absorptive (like Hoya's CM500 Schott's BG18) some reflective (i.e., dielectric stacks). Infrared light poses problem visible imaging because presence blurs decreases images formed lens. Since human vision only extends across narrow range electromagnetic spectrum, camera systems hoping capture images that look like images eyes capture must capture light outside vision range. Silicon-based light detectors (like ones PB-MV13's pixels) detect light from very deep blue near infrared. Thus, filter must exist light's path that keeps infrared from reaching image sensor's pixels. most cases, important that such filter begin blocking light around deep red) continue blocking until least 1100 near IR). most camera systems, cut-off filter included imaging lens.However, this point must verified lens vendor when particular lens chosen with image sensor.
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Lens Selection (continued)
C-Mount Lens Shroud PB-MV13 Socket
Note: This shroud designed accommodate PB-MV13 when inserted into socket. These dimensions based MILL #510-93-281-19-081003 socket (www.mill-max.com).
BASE
Threaded holes 4-40 screws places)
2.50"
0.015" Recess
1/8"
0.25"
1/8"
2.50" 0.25" 0.75"
2.50"
Holes 0.12" (for 4-40 screws), places thread
1-32 Thread
1.25"
2.50"
1/8" 1.25" 2.50" 0.25"
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Mechanical Package (280-Pin Ceramic PGA)
View
INDEX
1.067±.012 .840±.009 .840±.008
(1023, 1279)
.039 (4X)
.020 (4X)
Column
.020 (4X)
.782
19mils
.743
UNITS: INCHES EXCEPT WHERE NOTED Notes: Gold Plate inches minimum over 50~350m inches nickel. Sensor centered package, pixel array off-center.
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Package (280-Pin Ceramic PGA) (continued)
Side View
(.0235 .047 .005
Glass
.039±.005
Notes: thickness mils mils. D-253 glass thickness 31±2 mils. Glass epoxy thickness mils mils.
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Package (280-Pin Ceramic PGA) (continued)
Bottom View
1.800±.012
.100 typ.
.100
(281X) .067 TYP. DIA.
EXTRA
Alumina Coat
UNITS: INCHES
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page
Package (280-Pin CQFP) (continued)
Page
PB-MV13 Product Specification, August 2000 (Version 1.0)
Environmental
Absolute Maximum Ratings Symbol Tstorage Tlead Parameter Storage Temperature Range Lead Temperature second soldering) Value max. Unit
PB-MV13 Product Specification, August 2000 (Version 1.0)
Page

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