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CLOCK SYNTHESIZER FEATURES Fully integrated Differential 3.3


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ICS8431-01
CLOCK SYNTHESIZER
FEATURES
Fully integrated Differential 3.3V LVPECL output 200MHz output frequency Crystal oscillator interface Spread Spectrum Clocking (SSC) fixed 1/2% modulation environments requiring ultra LVTTL LVCMOS control inputs bypass modes supporting in-circuit testing on-chip functional block characterization lead SOIC
GENERAL DESCRIPTION
ICS8431-01 general purpose clock frequency synthesizer member HiPerClockSHiPerClockSfamily High Performance Clock Solutions from ICS. ICS8431-01 consists independent bandwidth timing channel. 16.666MHz crystal used input on-chip oscillator. dividers configured produce fixed output frequency 200MHz.
Programmable features ICS8431-01 support four operational modes. four modes spread spectrum clocking (SSC), non-spread spectrum clock test modes controlled Power Latch. After power latch disabled initial programmed values only overwritten removing power device. mode output clock modulated order achieve reduction EMI. bypass test modes disconnected source differential output allowing external source connnected TEST_I/O pin. This useful in-circuit testing allows differential output driven lower frequency throughout system clock tree. other bypass mode oscillator divider used source both dividers. this configuration frequency FOUT, nFOUT equals crystal frequency divide divided frequency TEST equals crystal frequency divide divided This useful characterizing oscillator internal dividers.
BLOCK DIAGRAM
XTAL1 XTAL2
ASSIGNMENT
PHASE DETECTOR
FOUT nFOUT
SSC_CTL0 SSC_CTL1 GNDT TEST_I/O VDDT
VDDI XTAL2 XTAL1 VDDA VDDO FOUT nFOUT
TEST_I/O
ICS8431-01
SSC_CTL0 SSC_CTL1 Power Latch Configuration Logic
28-Lead SOIC Package View
8431-01
www.icst.com
SEPTEMBER 2000
CONFIGURATION PROGRAMMING INTERFACE
Programming Spread Spectrum Clocking (SSC) feature accomplished configuring internal register. input this register encoded SSC_CTL[1:0] pins which define functional states after power applied. Figure shows timing relationship latched SSC_CTL[1:0] relationship power-on condition.
ICS8431-01
CLOCK SYNTHESIZER
3.3V
Power 100µs
SSC_CTL[1:0]
Data Valid
TPUL_SU TPUL_HD
FIGURE POWER-UP CONFIGURATION TIMING After power applied, control bits SSC_CTL0 SSC_CTL1 latched after approximately 100µs. TPUL_SU time during which data control bits required valid before being latched. TPUL_HD time after data latched that control bits required remain valid. configuration latch only overwritten removing power applying data inputs that meet setup hold time requirment during power-on, defined Figure Table Input Function Table defined valid commands SSC_CTL[1:0] lines.
8431-01
www.icst.com
SEPTEMBER 2000
TABLE DESCRIPTIONS
Number Name GNDT TEST VDDT nFOUT, FOUT VDDO VDDA VDDI Type Unused Description connection. These LVCMOS LVTTL pins sampled during power-up configure control. After power-up inputs have effect latched configuration register. Ground core test output. Programmed asdefined Table Function Table. Power supply test output. Ground output. These differential outputs main output drivers synthesizer. They compatible with terminated positive referenced LVPECL logic. Power supply output. power supply pin. Power supply core.
ICS8431-01
CLOCK SYNTHESIZER
Input Power Input Output Power Power Output Power Power Power
Pullup
TABLE CHARACTERISTICS
Symbol RPULLUP RPULLDOWN Parameter Input Pullup Resistor Input Pulldown Resistor Test Conditions Minimum Typical Maximum Units
TABLE FUNCTION TABLE
Inputs SSC_CTL1 SSC_CTL0 TEST_I/O Source Internal External Disabled Enabled Disabled Disabled Outputs FOUT, nFOUT fXTAL 200MHz Test 200MHz TEST_I/O fXTAL Hi-Z Input Hi-Z bypass; Oscillator, oscillator, dividers test mode. NOTE Default SSC; Modulation Factor Percent Bypass Mode, (1MHz Test 200MHz) Modulation Operational Modes
NOTE Used house debug characterization.
8431-01
www.icst.com
SEPTEMBER 2000
ABSOLUTE MAXIMUM RATINGS
Supply Voltage Inputs Outputs Ambient Operating Temperature Storage Temperature 4.6V -0.5V 0.5V -0.5V VDDO 0.5V 70°C -65°C 150°C
ICS8431-01
CLOCK SYNTHESIZER
Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only functional operation product these condition conditions beyond those listed Electrical Characteristics Electrical Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
TABLE LVTTL, LVCMOS ELECTRICAL CHARACTERISTICS, VDDA, VDDI=VDDO=VDDT=3.3V±5%, TA=0°C 70°C
Symbol VDDA, VDDI, VDDO, VDDT Parameter Power Supply Voltage SSC_CTL0, SSC_CTL1 Input High Voltage TEST_I/O SSC_CTL0, SSC_CTL1 Input Voltage Input High Current Input Current TEST_I/O SSC_CTL0, SSC_CTL1 TEST_I/O SSC_CTL0, SSC_CTL1 TEST_I/O VDDI 3.465V VDDI 3.465V VDDI 3.135V VDDI 3.135V VDDI 3.465V VDDI 3.465V VDDI 3.465V, VDDI 3.465V, -150 Test Conditions Minimum 3.135 -0.3 Typical Maximum 3.465 3.765 3.765 Units
TABLE LVPECL ELECTRICAL CHARACTERISTICS, VDDA, VDDI=VDDO=VDDT=3.3V±5%, TA=0°C 70°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Common Mode Voltage Range Output High Current Test Conditions VDDI VDDO 3.3V VDDI VDDO 3.3V Minimum Typical Maximum Units
Output Current NOTE These values VDDO equal 3.3V. Output levels will vary with VDDO. NOTE Output terminated with VDDO
8431-01
www.icst.com
SEPTEMBER 2000
TABLE ELECTRICAL CHARACTERISTICS, VDDI=VDDO=3.3V±5%, TA=0°C 70°C
Symbol tPERIOD tjit Fxtal tSTABLE tPUL_SU tPUL_HD Parameter Output Period; NOTE Peak Jitter (Shor Cycle); NOTE Output Duty Cycle; NOTE Output Rise Time Output Fall Time ystal Input Range Modulation Frequency Modulation Factor Power-up Stable Clock Output Configuration Latch Setup Time Configuration Latch Hold Time Test Conditions fout 200MHz fout 200MHz fout 200MHz Minimum 4995 Typical Maximum 5005 33.33 Units
ICS8431-01
CLOCK SYNTHESIZER
NOTE Spread spectrum clocking enabled
8431-01
www.icst.com
SEPTEMBER 2000
PACKAGE OUTLINE
ICS8431-01
CLOCK SYNTHESIZER
DIMENSIONS SUFFIX
8431-01
www.icst.com
SEPTEMBER 2000
ORDERING INFORMATION
Part/Order Number ICS8431AM-01 ICS8431AM-01T Marking ICS8431AM-01 ICS8431AM-01 Package Lead SOIC LeadSOIC Tape Reel Count Temperature 70°C 70°C
ICS8431-01
CLOCK SYNTHESIZER
8431-01
www.icst.com
SEPTEMBER 2000

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