CLOCK SYNTHESIZER FEATURES Fully integrated Differential 3.3

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CLOCK SYNTHESIZER FEATURES Fully integrated Differential 3.3

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ICS8431-11
CLOCK SYNTHESIZER
FEATURES
Fully integrated Differential 3.3V LVPECL output Programmable loop divider generating variety output frequencies. Crystal oscillator interface Spread Spectrum Clocking (SSC) fixed 1/2% modulation environments requiring ultra Master reset programming contents Power Latch LVTTL LVCMOS control inputs bypass modes supporting in-circuit testing on-chip functional block characterization 3.3V supply voltage lead SOIC 70°C ambient operating temperature
GENERAL DESCRIPTION
ICS8431-11 general purpose clock frequency synthesizer member HiPerClockSHiPerClockSfamily High Performance Clock Solutions from ICS. operates frequency range 280MHz 400MHz. output frequency programmed using parallel interface, thru configuration logic. Spread spectrum clocking programmed Power Latch inputs SSC_CTL0 SSC_CTL1.
BLOCK DIAGRAM
XTAL1 XTAL2
ASSIGNMENT
PHASE DETECTOR
FOUT nFOUT
SSC_CTL SSC_CTL TEST_I/O
nP_LOAD VDDI XTAL2 XTAL1 VDDA VDDO FOUT nFOUT
TEST_I/O
ICS8431-11
M0:M8 Configuration Logic Power Latch
28-Lead SOIC Package View
SSC_CTL0 SSC_CTL1
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice.
8431-11
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FUNCTIONAL DESCRIPTION
ICS8431-11 features fully integrated therefore requires external components setting loop bandwidth. 16MHz series-resonant fundamental crystal used input on-chip oscillator. output oscillator divided prior phase detector. With 16MHz crystal this provides 1MHz reference frequency. operates over range 400MHz. output loop divider also applied phase detector. phase detector loop filter force output frequency times reference frequency adjusting control voltage. Note that some values (either high low) will achieve lock. output scaled divider prior being sent LVPECL output buffer. divider provides output duty cycle. programmable features ICS8431-11 support four output operational modes programmable loop divider. four output operational modes spread spectrum clocking (SSC), non-spread spectrum clock test modes controlled Power Latch. After power latch disabled initial programmed values only overwritten removing power device asserting master reset input, HIGH-to-LOW transition latches data into Power Latch. Programming Spread Spectrum Clocking (SSC) feature accomplished configuring internal Power Latch. input this latch encoded SSC_CTL[1:0] pins which define functional states after power applied. Figure shows timing relationship latched SSC_CTL[1:0] relationship power-on condition. 3.3V
ICS8431-11
CLOCK SYNTHESIZER
Power 100µs
SSC_CTL[1:0]
Data Valid
TPUL_SU TPUL_HD
FIGURE POWER-UP CONFIGURATION TIMING Approximately 100µs after power applied HIGH-to-LOW transistion control bits SSC_CTL0 SSC_CTL1 latched. TPUL_SU time during which data control bits required valid before being latched. TPUL_HD time after data latched that control bits required remain valid. configuration latch overwritten removing power asserting applying data inputs that meet setup hold time requirment during power-on master rest input. power-on setup hold time requirements defined Figure Table Control Input Function Table defined valid commands SSC_CTL[1:0] lines. loop divider divider programmed using inputs through Normally upon system power-up nP_LOAD input held until sometime after power becomes valid. LOW-to-HIGH transistion nP_LOAD, values present M[8:0] captured. relationship between frequency, crystal frequency loop counter/ divider defined follows: fxtal fVCO count required values M0:M8 programming shown Table Programmable Frequency Function Table. frequency defined follows: fout fVCO fxtal ICS8431-11 equals Valid values which will achieve lock defined 400.
8431-11
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TABLE DESCRIPTIONS
Number Name M0-M8 TEST nFOUT, FOUT VDDO VDDA XTAL1, XTAL2 VDDI nP_LOAD Input Input Power Input Output Power Power Output Power Unused Input Power Power Input Power Input Pullup Pulldown Pullup Type Description divider inputs. Data latched LOW-to-HIGH transistion nP_LOAD input. LVCMOS LVTTL pins interface levels. These LVCMOS LVTTL pins sampled during power-up configure control. Ground core test output. Programmed input bypass mode. Power supply core test output. Ground output. These differential outputs main output drivers synthesizer. They compatible with terminated positive referenced LVPECL logic. Power supply output. connection. Reset counter. Loads latches data SSC_CTL0, SSC_CTL1 into Power-Up latch. ground pin. power supply pin. ystal oscillator input. Power supply core. divider latch enable input. LVTTL LVCMOS interface levels.
ICS8431-11
CLOCK SYNTHESIZER
TABLE CHARACTERISTICS
Symbol RPULLUP RPULLDOWN Parameter Input Capacitance Input Pullup Resistor Input Pulldown Resistor Test Conditions Minimum Typical Maximum Units
TABLE CONTROL INPUT FUNCTION TABLE
Inputs SSC_CTL1 SSC_CTL0 TEST_I/O Source Internal External Disabled Enabled Disabled Disabled Outputs FOUT, nFOUT fXTAL 200MHz Test 200MHz TEST_I/O fXTAL Hi-Z Input Hi-Z bypass; Oscillator, oscillator, dividers test mode. NOTE Default SSC; Modulation Factor Percent Bypass Mode, (1MHz Test 200MHz) Modulation Operational Modes
NOTE Used house debug characterization.
TABLE PROGRAMMABLE FREQUENCY FUNCTION TABLE
Frequency (MHz)
8431-11
Count
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ABSOLUTE MAXIMUM RATINGS
Supply Voltage Inputs Outputs Ambient Operating Temperature Storage Temperature 4.6V -0.5V 0.5V -0.5V VDDO 0.5V 70°C -65°C 150°C
ICS8431-11
CLOCK SYNTHESIZER
Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only functional operation product these condition conditions beyond those listed Electrical Characteristics Electrical Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
TABLE LVTTL, LVCMOS ELECTRICAL CHARACTERISTICS, VDDA VDDO 3.3V±5%, 70°C
Symbol VDDA, VDDO, Parameter Power Supply Voltage Input High Voltage Input Voltage Input High Current TEST_I/O Input Current TEST_I/O M0:M8, SSC_CTL0, SSC_CTL1 M0:M8, SSC_CTL0, SSC_CTL1, TEST_I/O M0:M8, SSC_CTL0, SSC_CTL1, TEST_I/O M0:M8, SSC_CTL0, SSC_CTL1 3.135V 3.465V 3.135V 3.465V 3.465V 3.465V 3.465V, 3.465V, -600 Test Conditions Minimum 3.135 -0.3 Typical Maximum 3.465 3.765 Units
TABLE LVPECL ELECTRICAL CHARACTERISTICS, VDDA VDDO 3.3V±5%, 70°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing Output High Current Test Conditions VDDx 3.3V VDDx 3.3V Minimum Typical Maximum Units
Output Current NOTE These values VDDO equal 3.3V. Output levels will with VDDO. NOTE Output terminated with VDDO
TABLE CRYSTAL CHARACTERISTICS
Parameter Crystal Frequency Tolerance Frequency Stability Drive Level Equivalent Series Resistance (ESR) Shunt Capacitiance Series Inductance Aging Test Conditions Mode Oscillation Units
8431-11
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ICS8431-11
CLOCK SYNTHESIZER
TABLE ELECTRICAL CHARACTERISTICS, VDDA VDDO 3.3V±5%, 70°C
Symbol tjit tLOCK tPUL_SU tPUL_HD Parameter Peak Jitter (Shor Cycle); NOTE Output Duty Cycle; NOTE Output Rise Time Output Fall Time Modulation Frequency Modulation Factor Lock Time Input Pulse Width Setup Time Hold Time nP_LOAD SSC_CTLx nP_LOAD SSC_CTLx nP_LOAD Test Conditions Minimum Typical Maximum 33.33 Units
Configuration Latch Setup Time Configuration Latch Hold Time
NOTE Spread spectrum clocking enabled.
8431-11
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REV. SEPTEMBER 2000
PACKAGE OUTLINE
ICS8431-11
CLOCK SYNTHESIZER
DIMENSIONS SUFFIX
8431-11
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REV. SEPTEMBER 2000
ORDERING INFORMATION
Part/Order Number ICS8431AM-11 ICS8431AM-11T Marking ICS8431AM-11 ICS8431AM-11 Package Lead SOIC Lead SOIC Tape Reel Count Temperature 70°C 70°C
ICS8431-11
CLOCK SYNTHESIZER
While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial applications. other applications such those requiring extended temperature range, high reliability, other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 8431-11
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REV. SEPTEMBER 2000

CLOCK SYNTHESIZER FEATURES Fully integrated Differential 3.3

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