CMOS 4-Bit Magnitude Comparator Pinout CD4063BMS VIEW F

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CMOS 4-Bit Magnitude Comparator Pinout CD4063BMS VIEW F

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CD4063BMS
CMOS 4-Bit Magnitude Comparator
Pinout
CD4063BMS VIEW
Features
High Voltage Type (20V Rating) Expansion Bits Cascading Units Medium Speed Operation Compares 4-Bit Words 250ns (Typ.) 100% Tested Quiescent Current Standardized Symmetrical Output Characteristics Parametric Ratings Maximum Input Current Over Full Package Temperature Range; 100nA +25oC Noise Margin (Full Package Temperature Range) 2.5V Meets Requirements JEDEC Tentative Standard 13B, "Standard Specifications Description Series CMOS Devices"
Functional Diagram
WORD
Applications
Servo Motor Controls Process Controllers
CASCADING INPUTS WORD
Description
CD4063BMS 4-bit magnitude comparator designed computer logic applications that require comparison 4-bit words. This logic circuit determines whether 4-bit word (Binary BCD) "less than", "equal to", "greater than" second 4-bit word. CD4063BMS eight comparing inputs (A3, through B0), three outputs three cascading inputs that permit systems designers expand comparator function bits. When single CD4063BMS used, cascading inputs connected follows: low, high, low. words longer than bits, CD4063BMS devices cascaded connecting outputs less significant comparator corresponding cascading inputs more significant comparator. Cascading inputs least significant comparator connected low, high, level, respectively. CD4063BMS supplied these lead outline packages: Braze Seal Frit Seal Ceramic Flatpack
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Copyright Intersil Corporation 1999
File Number
3318
7-958
Specifications CD4063BMS
Absolute Maximum Ratings
Supply Voltage Range, (VDD) -0.5V +20V (Voltage Referenced Terminals) Input Voltage Range, Inputs .-0.5V +0.5V Input Current, Input .±10mA Operating Temperature Range -55oC +125oC Package Types Storage Temperature Range (TSTG) -65oC +150oC Lead Temperature (During Soldering) +265oC Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case Maximum
Reliability Information
Thermal Resistance Ceramic Package 80oC/W 20C/W Flatpack Package 20oC/W 20oC/W Maximum Package Power Dissipation (PD) +125 -55oC +100oC (Package Type 500mW +100oC +125oC (Package Type Derate Linearity 12mW/oC 200mW Device Dissipation Output Transistor 100mW Full Package Temperature Range (All Package Types) Junction Temperature +175oC
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUPS 18V, Input Leakage Current Input Leakage Current Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) Threshold Voltage Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH 15V, Load 15V, Load (Note VOUT 0.4V 10V, VOUT 0.5V 15V, VOUT 1.5V VOUT 4.6V VOUT 2.5V 10V, VOUT 9.5V 15V, VOUT 13.5V 10V, -10µA 10µA 2.8V, 20V, 18V, Input Voltage (Note Input Voltage High (Note Input Voltage (Note Input Voltage High (Note NOTES: voltages referenced device GND. 100% testing being implemented Go/No test with limit applied inputs 4.5V, 0.5V 4.5V, 0.5V 15V, 13.5V, 1.5V 15V, 13.5V, 1.5V LIMITS TEMPERATURE
PARAMETER Supply Current
SYMBOL
CONDITIONS (NOTE 20V,
-100 -1000 -100
1000 1000 -0.53 -1.8 -1.4 -3.5 -0.7
UNITS
+125oC -55oC +25o
+125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC
+25oC, +125oC, -55oC 14.95 +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 0.53 -2.8
VDD/2 VDD/2
accuracy, voltage measured differentially VDD. Limit 0.050V max.
7-959
Specifications CD4063BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (NOTE CONDITIONS GROUP SUBGROUPS TEMPERATURE NOTES: 50pF, 200K; input 20ns. -55oC +125oC limits guaranteed, 100% testing being implemented. TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL CONDITIONS NOTES TEMPERATURE -55oC, +25oC 4.95 9.95 0.36 0.64 -0.36 -0.64 -1.15 -2.0 -0.9 -2.6 -2.4 -4.2 UNITS +25oC +125oC, -55oC LIMITS
PARAMETER Propagation Delay Comparator Input Output Propagation Delay Cascade Input Output Transition Time
SYMBOL TPHL TPLH TPHL TPLH TTHL
1250 1688 1000 1350
UNITS
+25oC +125 +25oC +125oC, -55oC
+125oC 10V, -55oC, +25oC
+125oC 15V, -55oC, +25oC
+125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) IOL5 Load 10V, Load Load 10V, Load VOUT 0.4V +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 10V, VOUT 0.5V +125oC -55oC Output Current (Sink) IOL15 15V, VOUT 1.5V +125oC -55oC Output Current (Source) IOH5A VOUT 4.6V +125oC -55oC Output Current (Source) IOH5B VOUT 2.5V +125oC -55oC Output Current (Source) IOH10 10V, VOUT 9.5V +125oC -55oC Output Current (Source) IOH15 =15V, VOUT 13.5V +125oC -55oC Input Voltage 10V, +25oC, +125oC, -55oC
7-960
Specifications CD4063BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Input Voltage High Propagation Delay Comparator Input Output Propagation Delay Cascade Input Output Transition Time SYMBOL TPHL1 TPLH1 TPHL2 TPLH2 TTHL TTLH CONDITIONS 10V, NOTES TEMPERATURE +25oC, +125oC, -55oC +25oC +25oC +25oC +25oC +25oC +25oC
UNITS
Input Capacitance NOTES:
voltages referenced device GND. parameters listed Table controlled design process directly tested. These parameters characterized initial design release upon design changes which would affect these characteristics. 50pF, 200K; input 20ns TABLE POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current Threshold Voltage Threshold Voltage Delta Threshold Voltage Threshold Voltage Delta Functional SYMBOL VNTH VNTH VPTH VPTH CONDITIONS 20V, 10V, -10µA 10V, ISS= -10µA 10µA 10µA 18V, Propagation Delay Time TPHL TPLH (Worst Case) +25oC NOTES TEMPERATURE
-2.8 VDD/2
-0.2 VDD/2 1.35 +25oC Limit
UNITS
+25oC +25oC +25oC
NOTES: voltages referenced device GND. 50pF, 200K; input 20ns Table +25oC limit. Read record TABLE BURN-IN LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IOL5 IOH5A 1.0µA Pre-Test Reading Pre-Test Reading DELTA LIMIT
TABLE APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) METHOD 100% 5004 GROUP SUBGROUPS READ RECORD IDD, IOL5, IOH5A
7-961
Specifications CD4063BMS
TABLE APPLICABLE SUBGROUPS CONFORMANCE GROUP Interim Test (Post Burn-In) Interim Test (Post Burn-In) (Note Interim Test (Post Burn-In) (Note Final Test Group Group Subgroup Subgroup Group METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP SUBGROUPS Deltas Deltas Deltas Subgroups Subgroups IDD, IOL5, IOH5A READ RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A
NOTE: parametric, functional; cumulative static TABLE TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS Group Subgroup METHOD 5005 PRE-IRRAD POST-IRRAD Table READ RECORD PRE-IRRAD Deltas POST-IRRAD Table
TABLE BURN-IN IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In Note Static Burn-In Note Dynamic BurnIn Note Irradiation Note NOTE: Each except will have series resistor 0.5V Each except will have series resistor Group Subgroup sample size dice/wafer, failures, 0.5V OPEN GROUND 8-15 9-16 9-16 -0.5V 50kHz 25kHz
CD4063
CD4063
CD4063
TOTAL (COMPARE INPUTS) (CASCADE INPUTS), STAGES) 200) 650ns (TYP.)
FIGURE TYPICAL SPEED CHARACTERISTICS 12-BIT COMPARATOR
7-962
CD4063BMS Logic Diagram
COMPARING INPUTS
CASCADING INPUTS
INPUTS PROTECTED CMOS PROTECTION NETWORK INPUT TERMINAL
FIGURE LOGIC DIAGRAM TRUTH TABLE INPUTS COMPARING Don't Care Logic High Level CASCADING OUTPUTS
Logic Level
7-963
CD4063BMS Typical Performance Characteristics
OUTPUT (SINK) CURRENT (IOL) (mA) OUTPUT (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) +25oC AMBIENT TEMPERATURE (TA) +25oC
GATE-TO-SOURCE VOLTAGE (VGS)
15.0 GATE-TO-SOURCE VOLTAGE (VGS) 12.5 10.0
DRAIN-TO-SOURCE VOLTAGE (VDS)
DRAIN-TO-SOURCE VOLTAGE (VDS)
FIGURE TYPICAL OUTPUT (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) AMBIENT TEMPERATURE (TA) +25oC GATE-TO-SOURCE VOLTAGE (VGS)
FIGURE MINIMUM OUTPUT (SINK) CURRENT DRAIN CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) +25oC GATE-TO-SOURCE VOLTAGE (VGS)
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
-10V
-10V
-15V
-15V
FIGURE TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
PROPAGATION DELAY TIME (tTHL, tTLH) (ns) AMBIENT TEMPERATURE (TA) +25oC LOAD CAPACITANCE (CL) (pF)
FIGURE MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
PROPAGATION DELAY TIME (tTHL, tTLH) (ns) 1750 1500 1250 1000 AMBIENT TEMPERATURE (TA) +25oC LOAD CAPACITANCE (CL) 50pF
SUPPLY VOLTAGE (VDD)
10.0
12.5
15.0
17.5
20.0
SUPPLY VOLTAGE (VDD)
FIGURE TYPICAL PROPAGATION DELAY TIME LOAD CAPACITANCE ("COMPARING INPUTS" OUTPUTS)
FIGURE TYPICAL PROPAGATION DELAY TIME SUPPLY VOLTAGE ("COMPARING INPUTS" OUTPUTS)
7-964
CD4063BMS Typical Performance Characteristics
AMBIENT TEMPERATURE (TA) +25oC TRANSITION TIME (tTHL, tTLH) (ns)
(Continued)
POWER DISSIPATION GATE (PD) (µW)
AMBIENT TEMPERATURE (TA) +25oC
SUPPLY VOLTAGE (VDD)
SUPPLY VOLTAGE (VDD) LOAD CAPACITANCE (CL) 50pF 10V, 50pF
10V, 15pF 50pF
LOAD CAPACITANCE (CL) (pF)
INPUT FREQUENCY (kHz)
FIGURE TYPICAL TRANSITION TIME LOAD CAPACITANCE
FIGURE TYPICAL POWER DISSIPATION FREQUENCY
Chip Dimensions Layout
Dimensions parenthesis millimeters derived from basic inch dimensions indicated. Grid graduations mils (10-3 inch).
METALLIZATION: PASSIVATION:
Thickness:
Silane
BOND PADS: 0.004 inches 0.004 inches THICKNESS: 0.0198 inches 0.0218 inches Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries. information regarding Intersil Corporation products, site http://www.intersil.com

CMOS 4-Bit Magnitude Comparator Pinout CD4063BMS VIEW F

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