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A 32 x 32 Crossbar Switch Implementation Using the Lattice ispLSI 5384VA Device

Figure 1. 8-Port Unidirectional Switch

A 32 x 32 Crossbar Switch Implementation Using the Lattice ispLSI 5384VA Device
Introduction
Crossbar switches are widely used today in a variety of applications including network switching, parallel computing and various telecommunications applications. There are off-the-shelf devices available that implement standard crossbar configurations. By using CPLDs to implement crossbar switches, design engineers have the flexibility to customize the switch to suit their specific design goals, as well as obtain switch configurations not available with off-the-shelf parts. Additionally, the use of In-System Programmable (ISPTM) devices allows the switch to be re-configured if design modifications become necessary. This document addresses the implementation of a 32 x 32 Non-blocking Crossbar switch in the Lattice ispLSI 5384VA Complex Programmable Logic Device (CPLD) architecture. The design modifications for implementing a 64 x 64 crossbar switch are also given.
Figure 1. 8-Port Unidirectional Switch
Connection
Inputs
Outputs
Crossbar Switches
Figure 2. Space Division Switch
N / n Crossbars N / n Crossbars
K Crossbars (N / n) x (N / n)
N Inputs
N Outputs
September 2000
A 32 x 32 Crossbar Switch Implementation Using the Lattice ispLSI 5384VA Device
32 x 32 Crossbar Switch Architecture
This ispLSI 5384VA 32 x 32 (32 port) crossbar switch design is based on the National Semiconductor CLC018
Figure 3. Crossbar Switch Block Diagram
32 Inputs
32 x 32 Switch Matrix
32 Outputs
CNFG LE RES 32 Configuration Registers
32 Load Registers
5 - 32 Decoder
5 Output Address
Input Address
A 32 x 32 Crossbar Switch Implementation Using the Lattice ispLSI 5384VA Device
Figure 4. 32 x 32 Crossbar Switch Implementation
Switch Inputs DI0-DI31
Lattice ispLSI 5384VA
Switch Outputs DO0-DO15
Lattice ispLSI 5384VA
DO16-DO31
Switch Control Lines
puts being set to select port 0. Broadcast is initiated by asserting RES and CS simultaneously. Tristate reset results in all outputs being disabled. Tristate reset is initiated when TRI is asserted along with RES and CS.
64 x 64 Implementation
The flexibility of the ispLSI 5384VA does not limit the maximum number of ports to 32. A 64 x 64 Crossbar Switch can be implemented using four ispLSI 5384VA devices, all in a single level of logic. This can be accomplished in the following manner. Although there are 68 inputs into each GLB, the maximum number of product terms allowed for a GLB output is 35. It would take two GLB levels to directly implement a 64 x 1 MUX. However, because the ispLSI 5384VA supports tristate control on all I / Os, a 64 x 1 MUX can be constructed in a single GLB level. This is accomplished by externally tying the outputs of two 32 x 1 MUXes together and using the tristate control on the I / Os as the MSB of the MUX select lines (Figure 5) By inverting the tristate control between the two MUX outputs, only one MUX can drive the output pin at any given time, thus avoiding the possibility of contention.
Implementation
Conclusion
Clearly, the Lattice ispLSI 5384VA is the superior choice for implementing crossbar switches due to its Big Fast Wide (BFW) GLB structure. No other CPLD can boast a one-level crossbar switch implementation with up to 64 inputs and outputs. This is achieved in the ispLSI 5384VA
A 32 x 32 Crossbar Switch Implementation Using the Lattice ispLSI 5384VA Device
Figure 5. 64-Input MUX
Input 0
Input 31 Input 32
64 x 1 MUX Output
Input 63 5 MUX Select 0-4 MUX Select 5
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