LC2MOS Complete 12-Bit Multiplying AD7845 GENERAL DESCRIPTION

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LC2MOS Complete 12-Bit Multiplying AD7845 GENERAL DESCRIPTION

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FEATURES 12-Bit CMOS MDAC with Output Amplifier 4-Quadrant Multiplication Guaranteed Monotonic (TMIN TMAX) Space-Saving 0.3" DIPs 28-Terminal Surface Mount Packages Application Resistors Chip Gain Ranging, etc. Power LC2MOS APPLICATIONS Automatic Test Equipment Digital Attenuators Programmable Power Supplies Programmable Gain Amplifiers Digital-to-4-20 Converters
LC2MOS Complete 12-Bit Multiplying AD7845
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
AD7845 industry's first 4-quadrant multiplying converter with on-chip amplifier. fabricated LC2MOS process, which allows precision linear components digital circuitry implemented same chip. data inputs drive latches which controlled standard signals, making microprocessor interfacing simple. stand-alone operation, inputs tied ground, making latches transparent. digital inputs CMOS compatible. output amplifier supply into load. internally compensated, input offset voltage laser trimming wafer level. normal operation, tied VOUT, user alternatively choose scale output voltage range.
Voltage Output Multiplying AD7845 first which full 4-quadrant multiplying capability output amplifier chip. specifications include amplifier performance. Matched Application Resistors Three application resistors provide easy facility gain ranging, voltage offsetting, etc. Space Saving AD7845 saves space ways. integration output amplifier chip means that chip count reduced. part housed skinny 24-pin 0.3" DIP, 28-terminal PLCC 24-terminal SOIC packages.
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Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Analog Devices.
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD7845-SPECIFICATIONS1 connected load specifications
Version
VREF AGND DGND
Units Bits µV/°C Test Conditions/Comments
unless otherwise noted.)
Parameter ACCURACY Resolution Relative Accuracy +25°C TMIN TMAX Differential Nonlinearity Zero Code Offset Error +25°C TMIN TMAX Offset Temperature Coefficient; (Offset/Temperature)2 Gain Error
Version
Version
Version
Version
Version
VREF
Grades Guaranteed Monotonic over Temperature Register Loaded with
RFB, VOUT Connected VOUT Connected, VREF VOUT Connected, VREF VOUT Connected, VREF +2.5
Gain Temperature Coefficient; (Gain/Temperature)2 REFERENCE INPUT Input Resistance, APPLICATION RESISTOR RATIO MATCHING DIGITAL INPUTS (Input High Voltage) (Input Voltage) (Input Current) (Input Capacitance)2 POWER SUPPLY4 Range Range Power Supply Rejection Gain/VDD Gain/VSS
FSR/°C RFB, VOUT Connected min/V min/V VREF VOUT Unloaded VOUT Unloaded Typical Input Resistance
Matching Between
Digital Inputs
14.25/15.75 14.25/15.75 14.25/15.75 14.25/15.75 -14.25/-15.75 -14.25/-15.75 -14.25/-15.75 -14.25/-15.75
14.25/15.75 14.25/15.75 -14.25/-15.75 -14.25/-15.75
PERFORMANCE CHARACTERISTICS
DYNAMIC PERFORMANCE Output Voltage Settling Time
These characteristics included Design Guidance subject test.
0.01% Full-Scale Range VOUT Load Register Alternately Loaded with Typically 25°C. VOUT Load Measured with VREF Register Alternately Loaded with VREF Sine Wave Register Loaded with VOUT, Connected. Loaded with VREF Sine Wave. VOUT, Connected. Loaded with VREF Sine Wave. VREF rms, Sine Wave. VOUT, Connected VOUT RFB, VOUT Connected, VOUT Shorted AGND Includes Noise Output Amplifier Johnson Noise
Slew Rate Digital-to-Analog Glitch Impulse Multiplying Feedthrough Error3 Unity Gain Small Signal Bandwidth
V/µs nV-s
Full Power Bandwidth
Total Harmonic Distortion
nVHz nVHz nVHz nVHz nVHz
OUTPUT CHARACTERISTICS Open Loop Gain Output Voltage Swing Output Resistance Short Circuit Current +25°C Output Noise Voltage (0.1 +25°C
NOTES Temperature ranges follows: Versions: +70°C; Versions: -25°C +85°C; Version: -55°C +125°C. Sample tested ensure compliance. metal ceramic D-24A package connected (DGND). device functional with power supply Minimum specified load resistance Specifications subject change without notice.
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AD7845 TIMING CHARACTERISTICS
Parameter Limit
VREF AGND DGND
Limit
Limit +125
Units
Test Conditions/Comments Chip Select Write Setup Time Chip Select Write Hold Time Write Pulse Width Data Setup Time Data Hold Time
Specifications subject change without notice.
ABSOLUTE MAXIMUM RATINGS
+25°C unless otherwise stated)
DGND .-0.3 DGND .+0.3 VREF AGND VRFB AGND AGND AGND AGND VOUT AGND2 AGND DGND -0.3 Digital Input Voltage DGND -0.3 Power Dissipation (Any Package) +75°C Derates above +75°C mW/°C
Operating Temperature Range Commercial Versions) +70°C Industrial Versions) -25°C +85°C Extended Versions) -55°C +125°C Storage Temperature Range -65°C +150°C Lead Temperature (Soldering, sec) +300°C
NOTES Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods time affect device reliability. Only Absolute Maximum Rating applied time. VOUT shorted AGND provided that power dissipation package exceeded.
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although AD7845 features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
WARNING!
SENSITIVE DEVICE
ORDERING GUIDE1
Model2 AD7845JN AD7845KN AD7845JP AD7845KP AD7845JR AD7845KR AD7845AQ AD7845BQ AD7845SQ/883B AD7845TQ/883B AD7845SE/883B
Temperature Range +70°C +70°C +70°C +70°C +70°C +70°C -25°C +85°C -25°C +85°C -55°C +125°C -55°C +125°C -55°C +125°C
Relative Accuracy
Package Option3 N-24 N-24 P-28A P-28A R-24 R-24 Q-24 Q-24 Q-24 Q-24 E-28A
DATA NOTES INPUT SIGNAL RISE FALL TIMES MEASURED FROM +5V. 20ns. TIMING MEASUREMENT REFERENCE LEVEL
NOTES Analog Devices reserves right ship either ceramic (D-24A) cerdip (Q-24) hermetic packages. order MIL-STD-883, Class processed parts, /883B part number. Leadless Ceramic Chip Carrier; Plastic DIP; Plastic Leaded Chip Carrier; Cerdip; SOIC.
Figure AD7845 Timing Diagram
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AD7845
CONFIGURATIONS DIP, SOIC PLCC
TERMINOLOGY
LEAST SIGNIFICANT DIGITAL-TO-ANALOG GLITCH IMPULSE
This analog weighting digital word DAC. AD7845,
RELATIVE ACCURACY
Relative accuracy endpoint nonlinearity measure maximum deviation from straight line passing through endpoints transfer function. measured after adjusting both endpoints (i.e., offset gain error adjusted out) normally expressed least significant bits percentage full-scale range.
DIFFERENTIAL NONLINEARITY
This amount charge injected from digital inputs analog output when inputs change state. This normally specified area glitch either pA-secs nV-secs depending upon whether glitch measured current voltage. measurement takes place with VREF AGND.
DIGITAL FEEDTHROUGH
When selected (i.e., high) high frequency logic activity device digital inputs capacitively coupled through device show noise VOUT pin. This noise digital feedthrough.
MULTIPLYING FEEDTHROUGH ERROR
Differential nonlinearity difference between measured change ideal change between adjacent codes. specified differential nonlinearity over operating temperature range ensures monotonicity.
GAIN ERROR
This error capacitive feedthrough from VREF terminal VOUT when loaded with
OPEN-LOOP GAIN
Gain error measure output error between ideal actual device output with loaded after offset error been adjusted out. Gain error adjustable zero with external potentiometer. Figure
ZERO CODE OFFSET ERROR
Open-loop gain defined ratio change output voltage voltage applied VREF with loaded DAC. specified
UNITY GAIN SMALL SIGNAL BANDWIDTH
This error present device output with loaded DAC. input offset voltage bias current leakage current.
TOTAL HARMONIC DISTORTION
This frequency which magnitude small signal voltage gain output amplifier below unity. device operated closed-loop unity gain inverter (i.e., loaded with 1s).
OUTPUT RESISTANCE
This effective output source resistance.
FULL POWER BANDWIDTH
This ratio root-mean-square (rms) harmonics fundamental, expressed dBs.
OUTPUT NOISE
This noise white noise input noise amplifier.
Full power bandwidth specified maximum frequency, unity closed-loop gain, which sinusoidal input signal will produce full output rated load without exceeding distortion level
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Typical Performance Curves-AD7845
Figure Frequency Response,
Figure Output Voltage Swing Resistive Load
Figure Noise Spectral Density
Figure Frequency
Figure Typical AD7845 Linearity Power Supply
Figure Multiplying Feedthrough Error Frequency
Figure Unity Gain Inverter Pulse Response (Large Signal)
Figure Unity Gain Inverter Pulse Response (Small Signal)
Figure Digital-to-Analog Glitch Impulse (All Transition)
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AD7845
FUNCTION DESCRIPTION (DIP)
2-11 13-14
Mnemonic VOUT DB11-DB2 DGND DB1-DB0 VREF AGND
Description Voltage Output Terminal Data (MSB) Data Digital Ground. metal ceramic package connected this Data Data (LSB) Write Input. Active Chip Select Input. Active Reference Input Voltage which signal Analog Ground. This reference point external analog circuitry Negative power supply output amplifier (nominal Positive power supply (nominal Application resistor. Application resistor. Application resistor. Feedback resistor DAC. normal operation this connected VOUT
Section
CIRCUIT INFORMATION Digital Section
Figure simplified circuit diagram AD7845 input control logic. When both low, latch loaded with data data inputs. digital inputs TTL, HCMOS CMOS compatible, facilitating easy microprocessor interfacing. digital inputs incorporate standard protection circuitry.
Figure shows simplified circuit diagram AD7845 section output amplifier. converter standard R-2R ladder. Binarily weighted currents switched between AGND inverting terminal on-chip output amplifier. output amplifier feedback resistor perform current-to-voltage conversion. When connected standard configuration (i.e., connected VOUT), VOUT VREF, where fractional representation digital input code. vary from 4095/4096. amplifier maintain across load. internally compensated settles 0.01% (1/2 LSB) less than input offset voltage laser trimmed wafer level. amplifier slew rate typically V/µs, unity gain small signal bandwidth kHz. There three extra on-chip resistors (RA, connected amplifier inverting terminal. These useful number applications including offset adjustment gain ranging.
Figure AD7845 Input Control Logic
Figure Simplified Circuit Diagram AD7845 Section Output Amplifier
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AD7845
UNIPOLAR BINARY OPERATION
Figure shows AD7845 connected unipolar binary operation. When signal, circuit performs 2-quadrant multiplication. code table Figure given Table
BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
recommended circuit bipolar operation shown Figure Offset binary coding used. offset specification this circuit determined matching internal resistors zero code offset error device. Gain error adjusted varying ratio this circuit without trimming keep within gain error specifications, resistors should ratio matched 0.01%. code table Figure given Table
Figure Unipolar Binary Operation
Table Unipolar Binary Code Table AD7845
Binary Number Register 1111 1111 1111
Analog Output, VOUT
4095 -VIN 4096 2048 -VIN -1/2 4096
-VIN 4096
1000
0000
0000
Figure Bipolar Offset Binary Operation
Table Bipolar Code Table Offset Binary Circuit Figure
0000 0000
0000 0000
0001 0000
Binary Number Register 1111 1111 1111
Analog Output, VOUT
OFFSET GAIN ADJUSTMENT FIGURE Zero Offset Adjustment
Load with Trim until VOUT
Gain Adjustment
2047 +VIN 2048 +VIN 2048
1000
4095 4096
0000 0000 1111
0001 0000 1111
Load with Trim that VOUT -VIN 1000 0111
fixed reference applications, full scale also adjusted omitting trimming reference voltage magnitude. high temperature applications, resistors potentiometers should have temperature coefficient.
-VIN 2048 2048 -VIN 2048 -VIN
0000
0000
0000
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AD7845
APPLICATIONS CIRCUITS PROGRAMMABLE GAIN AMPLIFIER (PGA) PROGRAMMABLE CURRENT SOURCES
AD7845 performs function when connected Figure this configuration, R-2R ladder connected amplifier feedback loop. amplifier input resistor. code decreases, R-2R ladder resistance increases gain increases. VOUT -VIN
4095 RDAC 4096
AD7845 ideal designing programmable current sources using minimum external components. Figures examples. circuit Figure drives programmable current into load referenced negative supply. Figure shows circuit sinking programmable current, same circuit equations apply both diagrams.
RDAC 4095 4096
-VIN -VIN since RDAC
since RDAC RDAC
RDAC
RDAC
Note that making much smaller than RDAC, circuit becomes insensitive both absolute value RDAC temperature variations. Now, only resistor determining load current sense resistor then programming range resolution 0.024
Figure AD7845 Connected
programmed gain increases, error noise also increase. this reason, maximum gain should limited 256. Table shows gain versus code. Note that instead using input resistor, also possible combinations other application resistors, instance, used instead RFB, gain range same codes Table goes from 128.
Table III. Gain Error Input Code Figure
Digital Inputs 1111 1000 0100 0010 0001 0000 0000 0000 0000 1111 0000 0000 0000 0000 1000 0100 0010 0001 1111 0000 0000 0000 0000 0000 0000 0000 0000
Gain 4096/4095
Error 0.04 0.07 0.13 0.26 0.51 1.02
Figure Programmable Current Source
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AD7845
Figure Programmable Current Sink
4-20 CURRENT LOOP
Figure 4-20 Current Loop
APPLICATION HINTS
AD7845 provides excellent making 4-20 current loop circuit. This basically variation circuits Figures shown Figure application resistor (Value produces effective offset. Since
General Ground Management: transient voltages between AGND DGND cause noise injection into analog output. simplest method ensuring that voltages AGND DGND equal AGND DGND together AD7845. more complex systems where AGND DGND intertie backplane, recommended that diodes connected inverse parallel between AD7845 AGND DGND pins (IN914 equivalent). Digital Glitches: When digital word written into DAC, results change voltage applied some switch gates. This voltage change coupled across switch stray capacitance appears impulse current output DAC. AD7845, impulses this converted voltage output amplifier. output voltage glitch energy specified area resulting spike nV-seconds. measured with VREF connected analog ground zero full-scale input code transition. Since microprocessor based systems generally have noisy grounds which couple into power supplies, AD7845 terminals should decoupled signal ground. Temperature Coefficients: gain temperature coefficient AD7845 maximum value ppm/°C. This corresponds worst case gain shift LSBs over 100°C temperature range. When trim resistors Figure used adjust full-scale range, temperature coefficient must taken into account. offset temperature coefficient FSR/°C maximum. This corresponds worst case offset shift LSBs over 100°C temperature range. reader referred Analog Devices Application Note "Gain Error Gain Temperature Coefficient CMOS Multiplying DACs," Publication Number E630C-5-3/86.
since RDAC=RFB=R
1000
D)]mA, where goes from with Digital Code When (Code 0s): When (Code 1s): above circuit succeeds significantly reducing circuit component count. Both on-chip output amplifier application resistor contribute this.
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AD7845
MICROPROCESSOR INTERFACING 16-BIT MICROPROCESSOR SYSTEMS 8-BIT MICROPROCESSOR SYSTEMS
Figures show AD7845 interfaces three popular 16-bit microprocessor systems. These MC68000, 8086 TM32010. AD7845 treated memory-mapped peripheral processors. each case, write instruction loads AD7845 with appropriate data. particular instructions used follows: MC68000: 8086: MOVE
Figure shows interface circuit AD7845 8085A 8-bit microprocessor. software routine load data device given Table Note that transfer bits data requires write operations. first these loads MSBs into 7475 latch. second write operation loads LSBs plus MSBs (which held latch) into DAC.
TMS32010:
Figure 8085A Interface
Table Subroutine Listing Figure
Figure AD7845 MC68000 Interface
2000 LOAD DAC:
Figure AD7845 8086 Interface
register pair loaded with latch address 3000. A,#"MS" Load MSBs data into accumulator. Transfer data from accumulator latch. Increment pair AD7845 address. A,#"LS" Load LSBs data into accumulator. Transfer data from accumulator DAC. routine.
H,#3000
Figure TMS32010
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AD7845
Figure interface circuits MC6809 microprocessors. Again, these same basic format 8085A interface.
DIGITAL FEEDTHROUGH
preceding interface configurations, most digital inputs AD7845 directly connected microprocessor bus. Even when device selected, these inputs will constantly changing. high frequency logic activity feed through package capacitance show noise analog output. minimize this digital feedthrough isolate from noise source. Figure shows interface circuit which uses this technique. data inputs latched from busy signal. also other means, such peripheral interface devices, reduce digital feedthrough.
Figure AD7845 Interface
Figure AD7845 Interface Circuit Using Latches Minimize Digital Feedthrough
Figure MC6809 Interface
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-11-
AD7845
OUTLINE DIMENSIONS
Dimensions shown inches (mm).
24-Pin Plastic (N-24)
24-Pin Ceramic (D-24A)
24-Pin Cerdip (Q-24)
28-Terminal Leadless Ceramic Chip Carrier (E-28A)
28-Terminal Plastic Leaded Chip Carrier (P-28A)
-12-
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PRINTED U.S.A.
C1189a-25-1/89

LC2MOS Complete 12-Bit Multiplying AD7845 GENERAL DESCRIPTION

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