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ICE1PD265G Power Factor Controller Cool- MOS: BoostSET High


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Infineon Technologies
ICE1PD265G
Power Factor Controller Cool-
MOS: BoostSET High Power Factor
sinusoidal line-current consumption =Controller CoolMOS within package =P-DSO-16-10 =Power factor achieves nearly Controls boost converter active harmonic filter Start with very current consumption =Zero current detector discontinuous operation mode Output overvoltage protection =Output undervoltage lockout =Internal start timer =Totem pole output with active shut down =Internal leading edge blanking =Very comparator multiplier offsets universal input applications =High sophisticated amplifier minimizes distortion inteferences caused MOSFET switching ICE1PD265G controls boost converter that sinusoidal current taken from single phase line supply stabilized voltage available output. CoolMOS controller placed together package. This active harmonic filter limits harmonic currents resulting from capacitor pulsed charge currents during rectification. power factor which descibes ratio between active apparent power almost one. Line voltage fluctuations compensated very efficiently
RF-Filter Rectifier
Output Voltage
Controller
CoolMOS 1PD265G
Type ICE1PD265G
Ordering Code
Package P-DSO-16-10
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Connections
Symbol VSENSE VAOUT MULTIN n.c. DRAIN DRAIN DRAIN DRAIN DRAIN DRAIN n.c. ISENSE DETIN Current sense input Source Positive voltage supply Zero current detector input Ground
touch DRAIN pins application board: 650V
Function Ground Voltage amplifier inverting input Voltage amplifier output Multiplier input
VAOUT VSENSE
P-DSO-16-10
DETIN ISENSE n.c. DRAIN DRAIN DRAIN
650V Drain 650V Drain 650V Drain 650V Drain 650V Drain 650V Drain
MULTIN n.c. DRAIN DRAIN DRAIN
Description
Pin1,16 (Ground) pins internally connected lead frame VSENSE (voltage amplifier inverting input) VSENSE connected resistive divider boost converter output. With capacitor connected VAOUT internal error amplifier acts integrator. VAOUT (voltage amplifier output) VAOUT connected internally first multiplier input. prevent overshoot input voltage clamped internally Input voltage less then 2.2V shuts gate driver down. current flowing into this exceeding internal threshold multiplier output voltage reduced prevent MOSFET from overvoltage damage. MULTIN (multipier input) MULTIN second multiplier input connected resistive divider rectifier output voltage. connected 6,7,8,9,10,11 DRAIN (drain connection internal CoolMOS) DRAIN pins internally connected leadframe. aware 650V input voltage!
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
ISENSE (current sense input CoolMOS source) Controller current sense input CoolMOS source internaly connected bonds. ISENSE should connected external sense resistor controlling CoolMOS source current. input internally clamped -0.3V prevent negative input voltage interaction. leading edge blanking circuitry suppresses voltage spiks when turning MOSFET (Positive voltage supply) exceeds turn-on threshold switched When falls below turn-off threshold switched power consumption very low. auxilliary winding charging capacitor which provides supply current. second 100nF ceramic capacitor should added absorbe supply current spikes required charge MOSFET gate capacitance. DETIN (Zero current detector input) DETIN connected auxiliary winding monitoring zero crossing inductor current.
Block Diagram
DETIN DRAIN
12.5V
clamp detin Reference Voltage
UVLO
Detector
Restart Timer
tres=150
Cool
0.2V
Enable
2.2V
tdVA=2us Inhibit time delay
Flip-Flop
Inhibit
Gate Drive
2.5V
Voltage
Multiplier
multout
tdsd=70n Current Comp
uvlo active shut down
tLEB=150ns
clamp
VSENSE
VAOUT
MULTIN
ISENSE
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Functional Description
Introduction
Conventional electronic ballasts switching power supplies designed with bridge rectifier bulk capacitor. Their disadvantage that circuit draws power from line when instantaneous voltage exceeds capacitors voltage. This occurs near line voltage peak causes high charge current spike with following characteristics: apparent power higher than real power that means power factor condition, current spikes sinusoidal with high content harmonics causing line noise, rectified voltage depends load condition requires large bulk capacitor, special efforts noise suppression necessary. With ICE1PD265G preconverter sinusoidal current achieved which varies direct instantaneous proportional input voltage half sine wave provides power factor near This appearence almost complex load like resistive line. harmonic distortions reduced comply with IEC555 standard requirements.
Description
ICE1PD265G contains wide bandwidth voltage amplifier used feedback loop, overvoltage regulator, quadrant multiplier with wide linear operating range, current sense comparator, zero current detector, logic circuitry, totem-pole MOSFET driver, internal trimmed voltage reference, restart timer, undervoltage lockout circuitry last least CoolMOS transistor.
Voltage Amplifier
With external capacitor between VSENSE VAOUT voltage amplifier forms integrator. integrator monitors average output voltage over several line cycles. Typically integrators bandwidth below order suppress ripple rectified line voltage. voltage amplifier internally compensated gain bandwidth phase margin degrees. non-inverting input biased internally 2.5V. output directly connected multiplier input. gate drive disabled when VSENSE voltage less than VAOUT voltage less than MOSFET placed nearby controller switching inteferences have taken into account. output voltage amplifier designed minimize these inteferences.
Overvoltage Regulator
Because integrators bandwidth fast changes output voltage can't regulated whithin adequate time. Fast output changes occure during initial start-up, sudden load removal, output arcing. While integrators differential input voltage remains zero during this fast changes peak current flowing through external capacitor into VAOUT. this current exceeds internal defined margin overvoltage regulator circuitry reduces multiplier output voltage. result time MOSFET reduced.
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Multiplier
quadrant multiplier regulates gate driver with respect output voltage half wave rectified input voltage. Both inputs designed achieve good linearity over wide dynamic range represent line free from distortion. Special efforts made assure universal line applications with respect range. multiplier output internally clamped 1.0V. MOSFET protected against critical operating during start
Current sense comparator, Flip-Flop
external sense resistor transferes source current MOSFET into sense voltage.The multiplier output voltage compared with this sense voltage. protect current comparator input from negative pulses current source inserted which sends current ISENSE every time when ISENSE falling below ground potential. switch-on current peak MOSFET blanked resistor-capacitor circuit with blanking time typically 220ns. Therefore better achieved load conditions. Flip-Flop ensures that only single switch-on switch-off pulse appears gate drive output during given cycle (double pulse suppression).
Zero Current Detector
zero current detector senses inductor current auxiliary winding ensures that next on-time MOSFET initiated immediately when inductor current reached zero. This diminishes revers recovery losses boost converter diode. MOSFET switched when voltage drop shunt resistor reaches voltage level multipler output. boost current waveform triangular shape there deadtime gaps between cycles. This leads continuous line current limiting peak current twice average current. prevent false tripping zero current detector designed Schmitt-Trigger with hysteresis 0.5V. internal clamp protects input from overvoltage breadkdown, 0.6V clamp prevents substrate injection. external resistor used series with auxiliary winding limit current through clamps.
Restart Timer
more than 150us restart impulse generated restart timer.
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Undervoltage Lockout
undervoltage lockout circuitry switches when reaches upper threshold VCCH switches when falling below lower threshold VCCL. During start supply current less then 100uA. internal voltage clamp been added protect from overvoltage condition. When using this clamp special care must taken power dissipation. Start current provided external start resistor which connected from line input supply voltage storage capacitor which connected from ground. aware that this capacitor discharged befor plugged into application board. Otherwise destroyed high capacitor voltage. Bootstrap power supply created with previous mentioned auxiliary winding diode (see application circuit).
CoolMOS
CoolMOS designed very RDSon=to reduce power dissipation.
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Signal Diagrams
IVAOUT
IOVR
DETIN
DRAIN
VISENSE
multout
Icoil
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Absolute maximum ratings Parameter
Supply Zener Current Supply Voltage Voltage 2,4,13 Current into IVAOUT Current into Voltage Continuous Drain Current Avalanche Energy Protection Storage Temperature Operating Junction Temperature Thermal Resistance Junction-Ambient Tstg RthJA IDETIN VDRAIN 2000 P-DSO-16-10
Symbol
Icc+Iz
-0.3 -0.3
Unit
Remark
Vz=Zener Voltage Icc+Iz=20mA
VAOUT=4V,VSENSE=2.8V VAOUT=0V,VSENSE=2.3V t<1ms DETIN DETIN< 0.4V
TJ=115°C TC=25°C TC=100°C repetitive 883C method 3015.6, 100pF,1500
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Characteristics
Unless otherwise stated, -40°C<Tj <150 14.5V
Parameter Start-Up circuit
Zener Voltage Start-up supply current Operating supply current Turn-ON threshold Turn-OFF threshold Hysteresis
Symbol
min.
typ.
max.
Unit
Test Condition
ICCL ICCH VCCHY
10.5
Icc+Iz=18mA Vcc=10V Output
12.5
Voltage Amplifier
Voltage feedback Input Threshold Line regulation Open Loop Voltage Gain1) Unity Gain Bandwidth1) Phase Margin1) Bias current VSENSE Enable Threshold Inhibit Threshold Voltage Inhibit Time Delay Output Current Source Output Current Sink Upper Clamp Voltage Lower Clamp Voltage VFBLR IBVSENSE VVSENSEE VVAOUTI tdVA IVAOUTH IVAOUTL VVAOUTH VVAOUTL -1.0 2.45 -0.3 2.55 Degr VISENSE= -0.1V VISENSE= -0.1V VAOUT=0V VSENSE=2.3V,t<1ms VAOUT=4V VSENSE=2.8V, t<1ms VSENSE=2.3V, -0.2mA VSENSE=2.8V, I=0.5mA Pin1 connected with Pin2 VCC=12V
Overvoltage Regulator
Threshold Current IOVR Tj=25°C
tested, guaranteed design
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Parameter Current Comparator
Input Bias Current Input Offset Voltage
Symbol
min.
typ.
max.
Unit
Test Condition
IBISENSE VISENSEO VISENSEO
0.95 0.05 1.05
IOVR=50uA VMULTIN=0V, VAOUT=2.4V VMULTIN=0V, VAOUT>2.8V
Threshold Voltage Threshold Shut Down Delay Leading Edge Blanking
VISENSEM VISENOVR tdISG tLEB
Detector
Upper threshold voltage Lower threshold voltage Hysteresis Input current Input clamp voltage High state state VDETINU VDETINL VDETINHY IBDETIN VDETINHC VDETINLC IDETIN=5mA IDETIN=-5mA
Multiplier
Input bias current Dynamic voltage range MULTIN Dynamic voltage range VAOUT Multiplier Gain IBMULTIN VMULTIN VFB+1.
VVAOUT=2.75V VMULTIN=1V VVAOUT<3V VVAOUT>3.5V
VVAOUT Klow Khigh
0.18 0.56
Restart Timer
restart time tRES
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Parameter CoolMOS
Drain source breakdown voltage Drain source on-resistance Zero gate voltage drain current Output capacitance Rise time Fall time
Symbol
min.
typ.
max.
Unit
Test Condition
VBRDSS RDSon
TJ=25°C TJ=115°C Tj=25°C Tj=150°C UGS=0V, Tj=25° UGS=0V, Tj=150° VDS=25V, f=1MHz
IDSS
COSS trise tfall
tested, guaranteed design
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Electrical Diagrams
Diagram versus
Vcc/V
Diagram VCCON/OFF versus Temperature
Diagram Iccl versus
ICCL
Diagram ICCL versus Temperature, VCC=9V
Iccl
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Diagram vers. Temperature
(pin1 connected pin2) 2,55 2,54 2,53 2,52 2,51 GV/dB
Diagram Voltage Amplifier Open loop gain Phase
Phi/deg
2,49 2,48 2,47
0,01 1000 10000
2,46 2,45
f/kHz
Diagram Overvoltage Regulator VISENSE vers. Threshold Voltage
VVAOUT 3.5V VMULTIN 3.0V VISENSE IOVR Iovp
Diagram IOVR versus Temperature
Tj/°C
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Diagram Threshold Voltage VISENSEM Temperature
1,05 1,04
Diagram Leading edge blanking (min on-time) Temp.
1,03 1,02 VISENSEM/V 1,01 0,99 0,98 0,97 0,96 0,95 Tj/°C
Diagram Current Sense Threshold VISENSE versus VMULTIN
3.5V 4.5V 4.0V
Diagram Current sense threshold VISENSE versus VVAOUT
Vmultin=4.0
VISENSE
3.25V VVAOUT=2.75V 3.0V
VISENSE
0.25
VMULTIN
VVAOUT
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Diagram Restart time versus temperature
Diagram VBRDSS Temperature
VBRDSS
trst
Tj/°C
Diagram RDSon Temperature
RDSon
Tj/°C
Infineon Tech
Group
10.09.01
Infineon Technologies
ICE1PD265G
Application circuit: RDSON=1.1 Pout=80W, Vin= 270V Pout=34W, Vin=
filter 90-270V rectifier 1N4937 Vout
100k MUR115
47uF
100n
47uF
ICE1PD265
5.1k
Infineon Tech
Group
10.09.01

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