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High-Voltage Durable 240-Channel Common Driver Dot-Matrix JUL. 20


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SPLC564A
High-Voltage Durable 240-Channel Common Driver Dot-Matrix
JUL. 2001 Version
SUNPLUS TECHNOLOGY reserves right change this documentation without prior notice. Information provided SUNPLUS TECHNOLOGY believed accurate reliable. However, SUNPLUS TECHNOLOGY makes warranty errors which appear this document. responsibility assumed Contact SUNPLUS TECHNOLOGY obtain latest version device specifications before placing your order.
SUNPLUS TECHNOLOGY infringement patent other rights third parties which result from use. addition, SUNPLUS products authorized critical components life support devices/ systems aviation devices/systems, where malfunction failure product reasonably expected result significant injury user, without express written approval Sunplus.
SPLC564A
Table Contents
PAGE
GENERAL DESCRIPTION. FEATURES. BLOCK DIAGRAM 3.1. INTERNAL BLOCK DIAGRAM SIGNAL DESCRIPTIONS 4.1. FUNCTIONS (CONT) ELECTRICAL SPECIFICATIONS 5.1. ABSOLUTE MAXIMUM RATINGS 5.2. CHARACTERISTICS 5.3. CHARACTERISTICS 5.4. CHARACTERISTICS 5.5. CHARACTERISTICS 5.6. TERMINAL CONFIGURATION APPLICATION CIRCUIT 6.1. APPLICATION EXAMPLE 6.2. POWER SUPPLY CIRCUIT EXAMPLE. PACKAGE/PAD LOCATIONS 7.1. ASSIGNMENT 7.2. ORDERING INFORMATION 7.3. LOCATIONS 7.4. PACKAGE DISCLAIMER. REVISION HISTORY
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
HIGH-VOLTAGE DURABLE 240-CHANNEL COMMON DRIVER DOT-MATRIX
GENERAL DESCRIPTION
SPLC564A 24-channel common driver which drives matrix panel. changing mode, this Through applied 240- 200- 160-channel output.
FEATURES
Display duty: 1/240 drive voltage: Built-in switching circuit generate -21.5V) Number drive circuit: Operating voltage: 2.5V 5.5V Intermediate voltage Built-in alternating signal generation circuit programmable Output mode change: 240-output mode 200-output mode 160-output mode Built-in display-off function Flex
high-voltage CMOS process technology, high-voltage drive +21.5V -21.5V, centering possible. used. -21.5V generated from +21.5V with built-in switching logic-drive voltage (3.0V) circuit external capacity. SPLC563.
This device used together with segment driver
BLOCK DIAGRAM
X240
Drive Circuit
VLCDL, VEEL,
Level shifter
Level Shifter
Shift register
Shift register
Shift register
Shift register
SR201
Shift register
SR221
Logic
DISPOFF
SR20 Logic
SR220
SR240
SR21 SR40
SR41 SR200
Logic
Logic
Logic
Logic
Switch circuit
Logic
Alternating signal generating circuit
MODE1 DIO1 DIO2 MODE0
RESET
Logic
VLCDL VLCDR, VEEL VEER internally connected. VHR, VLR, internally connected.
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
3.1. Internal Block Diagram 3.1.1. drive circuit
This circuit selects outputs three level signals drive. circuit. combination data shift register either selected transmitted output
3.1.4. Alternating signal generating circuit
This circuit generates alternating signal signal) display. suppress cross-talk, signal alternated unit connecting MWS0 from several lines several tens lines. alternated.
MWS4 pins GND, desired number signals When alternating signals externally input, pins (MWS0 MWS4) connected GND.
3.1.2. Level shifter
This boosts 2.5V 5.5V signal high-voltage signal drive.
3.1.3. Shift register
This 240-bit bidirectional shift register circuit. sequentially shifted shift clock determined pin. first line marker signal output from DIO1, DIO2 shift direction
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
SIGNAL DESCRIPTIONS
Classification Power supply Symbol VLCDL, VEEL, VCC, VHL, VLL, VML, 273, 269, 257, 272, 270, 271, VEEL, Output Power supply Input Connected Power supply Functions VLCDL, R-VEEL, Power supply drive VLCDL, Power supply switch circuit -GND: Power supply logic circuit Power supply drive level VHL, Selected level (Set same voltage VLCDL, VLL, Selected level (Set same voltage VEEL, VML, Non-selected level When built-in switching circuit generate VEE, connect VEEL, pins. VLCD 267, Capacitance voltage point reference reversed output voltage input voltage between built-in switching circuit used, don't connect lines this pin. External capacitance should connected here when using switch circuit generate VEE. built-in switching circuit used, don't connect lines this pin. Control signal MWS0 MWS1 MWS2 MWS3 MWS4 Extension driver Input This specifies cycle alternating signal signal) unit number lines. number lines, which integer from specified follows. Usually, specify number lines within range from When SPLC131 driven external alternating signal, specify number lines zero.
Number lines MWS4 MWS3 MWS2 MWS1 MWS0 Line alternating waveform Prohibited lines alternated lines alternated lines alternated Output M-pin status Input
Input
Shift clock input.
Data shifted falling edge shift
clock shift register. Inputs outputs alternating current drive output.
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
4.1. Functions (cont)
Class Symbol MODE0 MODE1 Connected Type Input Functions
Switch terminals number drive output pins
MODE0 MODE1 Shift direction 240-output (X1, X3.X238, X239, X240) 200-output (X21, X22, X23.X218, X219, X220) 160-output (X41, X42, X43.X198, X199, X200) Prohibited
Control signal
DIO1 DIO2
Extension driver
Serial data input output
level level DIO1 Serial output Serial iutput DIO2 Serial iutput Serial output
Input
Built-in switching circuit clock input.
When built-in
switching circuit generate VEE, this connect pin. built-in switching circuit used, must fixed GND. Input Built-in switching circuit on-off control. When built-in switching circuit, this must fixed VCC. built-in switching circuit used, this must fixex GND.
RESET
Input
Setting this sets initializes alternating signal signal) circuit. level RESET normally used.
DISPOFF
Input Input
Setting this sets drive output X240 level. Controls display-off function, display-off signal output from pin.
Output
level
When DISPOFF level, output level When DISPOFF high level, output high level
level
DISPOFF
Until serial data input times output level from
DIO1,
When using level, should connect Dispoff control pin.
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
Class Symbol Connected Type Functions
Input
This switches shift directions.
MODE0 MODE1 Shift direction Right shift level DIO2->SR1->.->SR240->DIO1 DIO2->SR21->.->SR220->DIO1 DIO2->SR41->.->SR200->DIO1 Left shift level DIO1->SR240->.->SR1->DIO2 DIO1->SR220->.->SR21->DIO2 DIO1->SR200->.->SR41->DIO2
SR1, correspond
Note: pins invalidated 200-output 160-output
mode output non- selected level synchronized every time; release these pins.
drive output
X240
Output
drive output combination display data signal, when DISPOFF VCC, either selected transmitted output circuit.
Output level
Note: Configuring panel using SPLC564A when using selected SEGMENT driver.
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
ELECTRICAL SPECIFICATIONS
5.1. Absolute Maximum Ratings
Item Symbol Rating -0.3 -0.3 -0.3 -0.3 VLCD Unit Notes
Power supply voltage logic circuits Power supply voltage drive circuits Input voltage Input voltage Input voltage Input voltage Operating temperature Storage temperature
VLCD TOPR TSTG
-0.3 +110
Notes: used beyond above maximum ratings, permanently damaged.
should always used within specified operating range normal operation prevent malfunction degraded reliability.
Note: Voltage from
Applicable DIO1, DISPOFF SHL, NWS0, NWS1, NWS2, NWS3, NWS4, RESET MODE0, MODE1, AMP, CCL, DIO2 Applicable VLCDL, pins. Applicable VEEL pins. Applicable VHL, pins. Applicable VLL, pins. Applicable VML, pins. (Caution) Operating excess absolute maximum rating will result permanent damage. observing electrical characteristic conditions normal operation. Exceeding conditions will cause malfunctions will affect reliability. Observe sequence activation inactivation following power supplies signals. this sequence apply built-in switching circuit. sequence observed, cause malfunction, permanent damage, adverse effects.
2.5V
2.5V
VLCD,
VEE,
DISPOFF
Input signal, clock, data Undefined Initialization (Longer than frame)
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
5.1.1. Power
Turn power supply order VCC, -VLCD (VH), input DISPOFF pin. level forcibly outputs level DISPOFF function. DISPOFF function priority even input signal distortion occurs immediately after input. Then input predetermined signals initialize driver registers. Preparation normal display thus completed. this case, assure period more than frame. this point, Cancel DISPOFF function setting DISPOFF VCC. VM-VEE generated automatically. this case,
levels (VL), VLCD (VH) must reached predetermined respective voltage.
5.1.2. Shut down
rule, shut down order opposite that used power DISPOFF GND. first shut power supply GND-VLCD (VH), same time GND-VEE (VL) input signal GND. this point, (VL), VLCD (VH) input must completely drop Since DISPOFF function inactivated when level drops GND, output output level other than Therefore, incorrect display appear shut down power Next shut
5.2. Characteristics
(VCC 2.5V 5.5V, VLCD 43V, +75)
Item Symbol PINs Min. Typ. Max. Unit Test Condition Notes
Input high voltage
DIO1, DISPOFF SHL, MWS0-4, RESET
Input voltage
MODE0, MODE1, AMP, CCL, DIO2
Output high-level voltage Output low-level voltage resistance between Input leakage current
IIL1
DIO1, DIO2 DIO1, DIO2 X240, DIO1, DISPOFF SHL, MWS0-4, RESET MODE0, MODE1, AMP, CCL, DIO2
-5.0
-0.4mA 0.4mA 150µA
Input leakage current Input leakage consumption
IIL2 ICC1
3.3V, VLCD 40V, 19.2KHz, 1.5KHz
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
Item Symbol PINs Min. Typ. Max. Unit Test Condition Notes
Current consumption
ICC2
5.0V, VLCD 40V, 19.2KHz, 1.5KHz
Current consumption
ILCD
VLCD
3.3V, VLCD 40V, 19.2KHz, 1.5KHz
Note1: This resistance value between pins (either when load current applied X240 pins. These values
regulated under conditions VLCD 21.75V, -18.5V, 1.75V, range VLCD VMVH-VM 21.5 7.5V, VMVL -21.5 -7.5V, with relation
Note2: current applied between input output excluded. When input CMOS gate intermediate level, through current flows
between power supplies power supply current increases. Therefore, GND.
Note3: voltage relationship each signal follows:
Segment Voltage
Segment wavform
Common wavform
Common Voltage (23.0V)
(5.0V)
(3.3V) (3.0V)
(3.3V) (3.0V)
(1.0V) (0.0V) (0.0V)
(-17.0V) Normal display period Display-off period Normal display period Display-off period
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
5.3. Characteristics
(VCC 2.5V 5.5V, VLCD 43V, -30°C +75°C)
Item Symbol PINs Min. Max. Unit Note
Clock cycle time Clock high-level width Clock low-level width rising time falling time Data setup time Data hold time Data output delay time output delay time setup time hold time delay time delay time
tCYC tCWH tCWL tDOC1 tDOC2
DIO1, DIO2, DIO1, DIO2, DIO1, DIO2, DISPOFF DIO1, DIO2,
5.4. Characteristics
(VCC 2.5V 4.5V, VLCD 43V, -30°C +75°C)
Item Symbol PINs Min. Max. Unit Note
Output delay time
tpd1
(n),
5.5. Characteristics
(VCC 4.5V 5.5V, VLCD 43V, -30°C +75°C)
Item Symbol PINs Min. Max. Unit Note
Output delay time
tpd1
(n),
Notes: following timing regulated with circuit right connected.
Test Point 30pF 100pF
Figure Load circuit
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
tCWL
tCWH
tCYC
DIO1 DIO2
DIO1 DIO2
(During output)
tpd1
X(n)
(During input)
DISPOFF
DIO1 DIO2 (During input) tDOC1
tDOC2
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
5.6. Terminal Configuration 5.6.1. Terminal configuration
VLCD
Input Data
Level
Input Terminal Applicable terminals: CCL, SHL, MODE0, DISPOFF, RESET, MWS0-4, VLCD Input Terminal Applicable terminals: VHR, *VHR terminal connect with terminal LSI. VLCD
Level Level
Input Terminal Applicable terminals: VMR, *VMR terminal connect with terminal LSI.
Input Terminal Applicable terminals: VMR, *VMR terminal connect with terminal LSI.
Output Terminal Applicable terminals:
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
5.6.2. Terminal Configuration
Input Data Data
Output enable
Terminal Applicable terminals: DIO1, DIO2,
VLCD VLCD VLCD
VLCD
VLCD
VLCD
Terminal Applicable terminals:
Terminal Applicable terminals:
VLCD
VLCD
drive Output Terminal Applicable terminals: X240
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
APPLICATION CIRCUIT
6.1. Application Example
Figure shows application example (collar) Half Size color panel. This panel configured SPLC564A piece SPLC563 pieces. SPLC564A generates signal signal. signal connected signal SPLC563. SPLC564A able generates voltage external capacitor. connected pin.
DIO1 VLCDL.R VEEL,R RESET DISPOFF NWS4-0 VHL, VML, VLL, SPLC564A
COM1 COM2 COM3
panel (collar) 1/240 duty
X240
VLCD
Y320
EIO2 MODE V0L, SPLC563A (No. EIO1 EIO2 MODE V0L,
Y320
SPLC563A (No. EIO1 EIO2 MODE V0L,
Y320
SPLC563A (No.
EIO1
Controller
Figure Application Example
Note1: When designing board, connect capacitor near stabilize power supply. capacitors about 0.1µF each (between
GND, GND, VLCD GND, GND)
Note2: addition, power supply circuit, connect capacitor several several tens between liquid-crystal power supply GND.
evaluation, confirm that there inversion liquid-crystal drive power supply level power supply turned when turned off.
Note3: When using external capacitor generate VEE, must connect capacitor several several tens between GND.
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SEG958 SEG959 SEG960 D11-0 DISPOFF VML, D11-0 DISPOFF VML, V1L, V1L,
SEG1 SEG2 SEG3 D11-0 DISPOFF VML, V1L,
DIO2 Power supply circuit
COM238 COM239 COM240
MWS4
DISP
D11-0
SPLC564A
6.2. Power Supply Circuit Example
+21V
VLCD
DC-DC CONVERTER
+3.0V 5.0V
+2.7V 5.5V
Driver Driver SPLC564A
External Capacitor (2.2~4.7µF)
External Capacitor (2.2~4.7µF)
Figure Power Supply Circuit Example
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
PACKAGE/PAD LOCATIONS
7.1. Assignment
DISPOFF DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY MODE0 MODE1 RESET MWS0 MWS1 MWS2 MWS3 MWS4 DIO1 DIO2 X235 X236 X237 X238 X239 X240
DUMMY X234 X233 X232 X231 X230 X229 X228 X227 X226 X225 X224 X223 X222 X221 DUMMY
SPLC564A (240 Segment, HIFAS)
X220
X219
X218
X217
X216
X215
X214
X213
Chip Size: 10750µm 1120µm This substrate should connected
Note1: Chip size included scribe line. Note2: 0.1µF capacitor between should placed close possible.
Item
Size
Unit
Chip Size
10750
1120
pitch
Bumped size
Bumped height
7.2. Ordering Information
Product Number Package Type
SPLC564A-P Sunplus Technology Co., Ltd. Proprietary Confidential
Package form JUL. 2001 Preliminary Version:
SPLC564A
7.3. Locations
Name Name
X234 X233 X232 X231 X230 X229 X228 X227 X226 X225 X224 X223 X222 X221 DUMMY X220 X219 X218 X217 X216 X215 X214 X213 X212 X211 X210 X209 X208 X207 X206 X205 X204 X203 X202 X201 X200 X199 X198 X197 X196 X195 X194 X193 X192
-5245 -5245 -5245 -5245 -5245 -5245 -5245 -5245 -5245 -5245 -5245 -5245 -5245 -5245 -5245 -5191 -5141 -5091 -5041 -4991 -4941 -4891 -4841 -4791 -4741 -4691 -4641 -4591 -4541 -4491 -4441 -4391 -4341 -4291 -4241 -4191 -4141 -4091 -4041 -3991 -3941 -3891 -3841 -3791
-120 -170 -220 -270 -320 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430
X191 X190 X189 X188 X187 X186 X185 X184 X183 X182 X181 X180 X179 X178 X177 X176 X175 X174 X173 X172 X171 X170 X169 X168 X167 X166 X165 X164 X163 X162 X161 X160 X159 X158 X157 X156 X155 X154 X153 X152 X151 X150 X149 X148
-3741 -3691 -3641 -3591 -3541 -3491 -3441 -3391 -3341 -3291 -3241 -3191 -3141 -3091 -3041 -2991 -2941 -2891 -2841 -2791 -2741 -2691 -2641 -2591 -2541 -2491 -2441 -2391 -2341 -2291 -2241 -2191 -2141 -2091 -2041 -1991 -1941 -1891 -1841 -1791 -1741 -1691 -1641 -1591
-430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 JUL. 2001 Preliminary Version:
Sunplus Technology Co., Ltd. Proprietary Confidential
SPLC564A
Name Name
X147 X146 X145 X144 X143 X142 X141 X140 X139 X138 X137 X136 X135 X134 X133 X132 X131 X130 X129 X128 X127 X126 X125 X124 X123 X122 X121 X120 X119 X118 X117 X116 X115 X114 X113 X112 X111 X110 X109 X108 X107 X106 X105 X104 X103
-1541 -1491 -1441 -1391 -1341 -1291 -1241 -1191 -1141 -1091 -1041 -991 -941 -891 -841 -791 -741 -691 -641 -591 -541 -491 -441 -391 -341 -291 -241 -191 -141
-430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430
X102 X101 X100
1009 1059 1109 1159 1209 1259 1309 1359 1409 1459 1509 1559 1609 1659 1709 1759 1809 1859 1909 1959 2009 2059 2109 2159 2209 2259 2309 2359 2409 2459 2509 2559 2609 2659 2709 2759 2809 2859 2909
-430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 JUL. 2001 Preliminary Version:
Sunplus Technology Co., Ltd. Proprietary Confidential
SPLC564A
Name Name
2959 3009 3059 3109 3159 3209 3259 3309 3359 3409 3459 3509 3559 3609 3659 3709 3759 3809 3859 3909 3959 4009 4059 4109 4159 4209 4259 4309 4359 4409 4459 4509 4559 4609 4659 4709 4759 4809 4859 4909 4959 5009 5059 5109 5159
-430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430 -430
DUMMY DUMMY DIO2 DUMMY DUMMY RESET DUMMY MWS4 DUMMY MWS3 DUMMY MWS2 DUMMY MWS1 DUMMY MWS0 MODE1 MODE0 DUMMY
5257 5245 5245 5245 5245 5245 5245 5245 5245 5245 5245 5245 5245 5245 5185 5125 4967 4907 4847 4787 4727 4667 4607 4547 4487 4427 3328 3154 2893 2719 2458 2284 2023 1849 1588 1414 1153 -153 -588 -762
-430 -311 -261 -211 -161 -111 JUL. 2001 Preliminary Version:
Sunplus Technology Co., Ltd. Proprietary Confidential
SPLC564A
Name Name
DUMMY DISPOFF DUMMY DUMMY DIO1
-1023 -1197 -1458 -1632 -1893 -2068 -2328 -2503 -2764 -3022 -3454 -3712 -4144
X240 X239 X238 X237 X236 X235 DUMMY
-4204 -4363 -4423 -4581 -4641 -4797 -4847 -4897 -4947 -4997 -5079 -5245
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
7.4. Package
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
DISCLAIMER
information appearing this publication believed accurate. Integrated circuits sold Sunplus Technology covered warranty patent indemnification provisions stipulated terms sale only. SUNPLUS makes warranty, express, statutory implied description regarding information this publication FURTHERMORE, SUNPLUS MAKES WARRANTY SUNPLUS reserves right halt production alter specifications regarding freedom described chip(s) from patent infringement. MERCHANTABILITY FITNESS PURPOSE. prices time without notice. publication current before placing orders.
Accordingly, reader cautioned verify that data sheets other information this Products described herein intended normal commercial applications.
Applications involving unusual environmental reliability requirements, e.g. military equipment medical life support equipment, specifically recommended without additional processing SUNPLUS such applications. Please note that application circuits illustrated this document reference purposes only.
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:
SPLC564A
REVISION HISTORY
Date Revision Description Page
JUL. 2001
Original
Sunplus Technology Co., Ltd. Proprietary Confidential
JUL. 2001 Preliminary Version:

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