Quad Flip-Flop with Common Clock Reset MC54/74HC175 identical pin
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Quad Flip-Flop with Common Clock Reset
MC54/74HC175 identical pinout LS175. device inputs compatible with standard CMOS outputs; with pullup resistors, they compatible with LSTTL outputs. This device consists four flip-flops with common Reset Clock inputs, separate inputs. Reset (active-low) asynchronous occurs when level applied Reset input. Information input transferred corresponding output next positive going edge Clock input. Output Drive Capability: LSTTL Loads Outputs Directly Interface CMOS, NMOS, Operating Voltage Range: Input Current: High Noise Immunity Characteristic CMOS Devices Compliance with Requirements Defined JEDEC Standard Chip Complexity FETs 41.5 Equivalent Gates
MC54/74HC175
SUFFIX CERAMIC PACKAGE CASE 620-10
SUFFIX PLASTIC PACKAGE CASE 648-08
SUFFIX SOIC PACKAGE CASE 751B-05
ORDERING INFORMATION MC54HCXXXJ MC74HCXXXN MC74HCXXXD Ceramic Plastic SOIC
LOGIC DIAGRAM
CLOCK
ASSIGNMENT
INVERTING NONINVERTING OUTPUTS RESET CLOCK
DATA INPUTS
RESET
FUNCTION TABLE
Inputs Reset Clock Outputs Change
10/95
Motorola, Inc. 1995
Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions. Derating Plastic DIP: mW/_C from 125_C Ceramic DIP: mW/_C from 100_ 125_C SOIC Package: mW/_C from 125_C high frequency heavy load considerations, Chapter Motorola High-Speed CMOS Data Book (DL129/D). NOTE: Information typical parametric values found Chapter Motorola High-Speed CMOS Data Book (DL129/D).
MAXIMUM RATINGS*
ELECTRICAL CHARACTERISTICS (Voltages Referenced GND)
RECOMMENDED OPERATING CONDITIONS
MC54/74HC175
Symbol
Vin, Vout
Symbol
Symbol
Vout
Tstg
Iout
Lead Temperature, from Case Seconds (Plastic SOIC Package) (Ceramic DIP)
Storage Temperature
Power Dissipation Still Air, Plastic Ceramic SOIC Package
Supply Current, Pins
Output Current,
Input Current,
Output Voltage (Referenced GND)
Input Voltage (Referenced GND)
Supply Voltage (Referenced GND)
Input Rise Fall Time (Figure
Operating Temperature, Package Types
Input Voltage, Output Voltage (Referenced GND)
Supply Voltage (Referenced GND)
Maximum Quiescent Supply Current (per Package)
Maximum Input Leakage Current
Maximum Low-Level Output Voltage
Minimum High-Level Output Voltage
Maximum Low-Level Input Voltage
Minimum High-Level Input Voltage
Parameter
Parameter
Parameter
|Iout|
|Iout|
Iout
|Iout| |Iout|
|Iout| |Iout|
Vout |Iout|
Vout |Iout|
Test Conditions
Value
1000
Unit
Unit
25_C
3.15
0.26 0.26
3.98 5.48
This device contains protection circuitry guard against damage high static voltages electric fields. However, precautions must taken avoid applications voltage higher than maximum rated voltages this high-impedance circuit. proper operation, Vout should constrained range (Vin Vout) VCC. Unused inputs must always tied appropriate logic voltage level (e.g., either VCC). Unused outputs must left open.
Guaranteed Limit
85_C 125_C
High-Speed CMOS Logic Data DL129 3.15 0.33 0.33 3.84 5.34
3.15 0.40 0.40 3.70 5.20
Unit
NOTE: Information typical parametric values found Chapter Motorola High-Speed CMOS Data Book (DL129/D). Used determine no-load dynamic power consumption: load considerations, Chapter Motorola High-Speed CMOS Data Book (DL129/D). NOTES: propagation delays with loads other than Chapter Motorola High-Speed CMOS Data Book (DL129/D). Information typical parametric values found Chapter Motorola High-Speed CMOS Data Book (DL129/D).
ELECTRICAL CHARACTERISTICS Input
Symbol tPLH, tPHL tTLH, tTHL tPHL fmax Maximum Input Capacitance Maximum Output Transition Time, Output (Figures Maximum Propagation Delay, Reset (Figures Maximum Propagation Delay, Clock (Figures Maximum Clock Frequency (50% Duty Cycle) (Figures Parameter 25_C Guaranteed Limit
High-Speed CMOS Logic Data DL129
TIMING REQUIREMENTS (Input
Symbol
trec
Power Dissipation Capacitance (Per Flip-Flop)*
Maximum Input Rise Fall Times (Figure
Minimum Pulse Width, Reset (Figure
Minimum Pulse Width, Clock (Figure
Minimum Recovery Time, Reset Inactive Clock (Figure
Minimum Hold Time, Clock Data (Figure
Minimum Setup Time, Data Clock (Figure
Parameter
25_C Typical 25°C, 1000 Guaranteed Limit 1000 1000
85_C 125_C
85_C 125_C
MC54/74HC175
MOTOROLA Unit Unit
MC54/74HC175
SWITCHING WAVEFORMS
1/fmax tPLH tPHL tTLH tTHL CLOCK RESET tPHL tPLH trec
CLOCK
Figure
Figure
VALID DATA CLOCK
Figure
TEST CIRCUIT
TEST POINT OUTPUT DEVICE UNDER TEST
Includes probe capacitance
Figure
High-Speed CMOS Logic Data DL129
MC54/74HC175
EXPANDED LOGIC DIAGRAM
CLOCK
RESET
High-Speed CMOS Logic Data DL129
MC54/74HC175
OUTLINE DIMENSIONS
SUFFIX CERAMIC PACKAGE CASE 620-10 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEAD WHEN FORMED PARALLEL. NARROW 0.76 (0.030) WHERE LEAD ENTERS CERAMIC BODY. INCHES 0.750 0.785 0.240 0.295 0.200 0.015 0.020 0.050 0.055 0.065 0.100 0.008 0.015 0.125 0.170 0.300 0.020 0.040 MILLIMETERS 19.05 19.93 6.10 7.49 5.08 0.39 0.50 1.27 1.40 1.65 2.54 0.21 0.38 3.18 4.31 7.62 1.01 0.51
SEATING PLANE
0.25 (0.010)
0.25 (0.010)
SUFFIX PLASTIC PACKAGE CASE 648-08 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS 0.740 0.770 18.80 19.55 6.35 0.250 0.270 6.85 3.69 0.145 0.175 4.44 0.39 0.015 0.021 0.53 1.02 0.040 0.070 1.77 0.100 2.54 0.050 1.27 0.21 0.008 0.015 0.38 2.80 0.110 0.130 3.30 7.50 0.295 0.305 7.74 0.020 0.040 0.51 1.01
0.25 (0.010)
SEATING PLANE
SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE
0.25 (0.010)
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. MILLIMETERS 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 0.19 0.25 0.10 0.25 5.80 6.20 0.25 0.50 INCHES 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.229 0.244 0.010 0.019
SEATING
PLANE
0.25 (0.010)
High-Speed CMOS Logic Data DL129
MC54/74HC175
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters vary different applications. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
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JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; Ping Industrial Park, Ting Road, N.T., Hong Kong. 852-26629298
High-Speed CMOS Logic Data DL129
CODELINE
*MC54/74HC175/D*
MC54/74HC175/D
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