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MC74AC574/74ACT574 high-speed, power octal flip-flop with buffered com
Top Searches for this datasheetMC74AC574, MC74ACT574 Octal Flip-Flop with 3-State Outputs MC74AC574/74ACT574 high-speed, power octal flip-flop with buffered common Clock (CP) buffered common Output Enable (OE). information presented inputs stored flip-flops LOW-to-HIGH Clock (CP) transition. MC74AC574/74ACT574 functionally identical MC74AC374/74ACT374 except pinouts. PDIP-20 SUFFIX CASE Inputs Outputs Opposite Sides Package Allowing Easy Interface with Microprocessors Useful Input Output Port Microprocessors Functionally Identical MC74AC374/74ACT374 3-State Outputs Bus-Oriented Applications Outputs Source/Sink ACT574 Compatible Inputs SO-20 SUFFIX CASE TSSOP-20 SUFFIX CASE 948E EIAJ-20 SUFFIX CASE ORDERING INFORMATION Device MC74AC574N MC74ACT574N MC74AC574DW MC74AC574DWR2 Package PDIP-20 PDIP-20 SOIC-20 SOIC-20 SOIC-20 SOIC-20 TSSOP-20 Shipping Units/Rail Units/Rail Units/Rail 1000 Tape Reel Units/Rail 1000 Tape Reel Units/Rail Figure Pinout: 20-Lead Packages Conductors (Top View) ASSIGNMENT D0-D7 O0-O7 FUNCTION Data Inputs Clock Pulse Input 3-State Output Enable Input 3-State Outputs MC74ACT574DW MC74ACT574DWR2 MC74AC574DT MC74AC574DTR2 MC74ACT574DT MC74ACT574DTR2 MC74AC574M MC74AC574MEL MC74ACT574M MC74ACT574MEL TSSOP-20 2500 Tape Reel TSSOP-20 Units/Rail TSSOP-20 2500 Tape Reel EIAJ-20 EIAJ-20 EIAJ-20 EIAJ-20 Units/Rail 2000 Tape Reel Units/Rail 2000 Tape Reel DEVICE MARKING INFORMATION general marking information device marking section page this data sheet. Semiconductor Components Industries, LLC, 2001 May, 2001 Rev. Publication Order Number: MC74AC574/D MC74AC574, MC74ACT574 FUNCTION TABLE Inputs Internal Outputs Function nction Hold Hold Load Load Data Available Data Available Change Data Change Data Figure Logic Symbol FUNCTIONAL DESCRIPTION MC74AC574/74ACT574 consists eight edgetriggered flip-flops with individual D-type inputs 3-state true outputs. buffered clock buffered Output Enable common flip-flops. eight flip-flops will store state their individual inputs that meet setup hold time requirements LOW-to-HIGH Clock (CP) transition. With Output Enable (OE) LOW, contents eight flip-flops available outputs. When HIGH, outputs high impedance state. Operation input does affect state flip-flops. HIGH Voltage Level Voltage Level Immaterial High Impedance LOW-to-HIGH Clock Transition Change NOTE: This diagram provided only understanding logic operations should used estimate propagation delays. Figure Logic Diagram MAXIMUM RATINGS* Symbol VOUT IOUT Tstg Parameter Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Output Voltage (Referenced GND) Input Current, Output Sink/Source Current, Current Output Storage Temperature Value -0.5 +7.0 -0.5 +0.5 -0.5 +0.5 +150 Unit Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions. MC74AC574, MC74ACT574 RECOMMENDED OPERATING CONDITIONS Symbol VIN, VOUT Supply Voltage Input Voltage, Output Voltage (Ref. GND) Input Rise Fall Time (Note Devices except Schmitt Inputs Input Rise Fall Time (Note Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current High Output Current Parameter ns/V ns/V Unit from VCC; individual Data Sheets devices that differ from typical input rise fall times. from individual Data Sheets devices that differ from typical input rise fall times. MC74AC574, MC74ACT574 CHARACTERISTICS 74AC Symbol Parameter +25°C Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage IOLD IOHD Maximum Input Leakage Current Minimum Dynamic Output Current Maximum Quiescent esce Supply Current 2.25 2.75 2.25 2.75 2.99 4.49 5.49 0.002 0.001 0.001 74AC -40°C +85°C 3.15 3.85 1.35 1.65 2.46 3.76 4.76 0.44 0.44 0.44 ±1.0 *VIN VCC, VOLD 1.65 VOHD 3.85 *VIN IOUT IOUT VOUT Unit Conditions Guaranteed Limits 3.15 3.85 1.35 1.65 2.56 3.86 4.86 0.36 0.36 0.36 ±0.1 VOUT outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time. NOTE: Note: guaranteed less than equal respective limit VCC. MC74AC574, MC74ACT574 CHARACTERISTICS (For Figures Waveforms Section 74AC Symbol Parameter VCC* fmax tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Propagation Delay Propagation Delay Output Enable Time Output Enable Time Output Disable Time Output Disable Time +25°C 13.5 10.5 74AC -40°C +85°C 13.5 11.5 10.5 Unit Fig. Voltage Range ±0.3 Voltage Range ±0.5 OPERATING REQUIREMENTS 74AC Symbol Parameter VCC* Setup Time, HIGH Hold Time, HIGH Pulse Width HIGH +25°C 74AC -40°C +85°C Unit Fig. Guaranteed Minimum *Voltage Range ±0.3 Voltage Range ±0.5 MC74AC574, MC74ACT574 CHARACTERISTICS 74ACT Symbol Parameter +25°C Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage ICCT Maximum Input Leakage Current Additional Max. ICC/Input Maximum 3-State Current Minimum Dynamic Output Current Maximum Quiescent esce Supply Current 4.49 5.49 0.001 0.001 ±0.5 74ACT -40°C +85°C Unit Conditions Guaranteed Limits 3.86 4.86 0.36 0.36 ±0.1 3.76 4.76 0.44 0.44 ±1.0 ±5.0 VOUT VOUT IOUT *VIN IOUT *VIN VCC, (OE) VIL, VCC, VCC, VOLD 1.65 VOHD 3.85 IOLD IOHD *All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time. CHARACTERISTICS (For Figures Waveforms Section 74ACT Symbol Parameter VCC* fmax tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock Frequency agation Propagation Delay agation Propagation Delay Output Enable Time Output Enable Time Output Disable Time Output Disable Time +25°C 10.5 74ACT -40°C +85°C 11.5 Unit Fig. *Voltage Range ±0.5 MC74AC574, MC74ACT574 OPERATING REQUIREMENTS 74ACT Symbol Parameter VCC* Setu Setup Time, HIGH Hold Time, HIGH Pulse Width HIGH +25°C 74ACT -40°C +85°C Unit Fig. Guaranteed Minimum *Voltage Range ±0.3 Voltage Range ±0.5 CAPACITANCE Symbol Input Capacitance Power Dissipation Capacitance Parameter Value Unit Test Conditions MC74AC574, MC74ACT574 MARKING DIAGRAMS PDIP-20 MC74AC574N AWLYYWW SO-20 AC574 AWLYYWW TSSOP-20 EIAJ-20 ALYW 74AC574 AWLYWW MC74ACT574N AWLYYWW ACT574 AWLYYWW ALYW 74ACT574 AWLYWW Assembly Location Wafer Year Work Week MC74AC574, MC74ACT574 PACKAGE DIMENSIONS PDIP-20 SUFFIX PLASTIC PACKAGE CASE 738-03 ISSUE NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEAD WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. INCHES 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 0.050 0.070 0.100 0.008 0.015 0.110 0.140 0.300 0.020 0.040 MILLIMETERS 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 1.27 1.77 2.54 0.21 0.38 2.80 3.55 7.62 0.51 1.01 SEATING PLANE 0.25 (0.010) 0.25 (0.010) SO-20 SUFFIX PLASTIC SOIC PACKAGE CASE 751D-05 ISSUE NOTES: DIMENSIONS MILLIMETERS. INTERPRET DIMENSIONS TOLERANCES ASME Y14.5M, 1994. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL 0.13 TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. MILLIMETERS 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 10.05 10.55 0.25 0.75 0.50 0.90 0.25 0.25 SEATING PLANE MC74AC574, MC74ACT574 PACKAGE DIMENSIONS TSSOP-20 SUFFIX PLASTIC TSSOP PACKAGE CASE 948E-02 ISSUE 0.15 (0.006) 0.10 (0.004) IDENT SECTION 0.25 (0.010) 0.15 (0.006) 0.100 (0.004) SEATING PLANE DETAIL EIAJ-20 SUFFIX PLASTIC EIAJ PACKAGE CASE 967-01 ISSUE NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD FLASH PROTRUSIONS MEASURED PARTING LINE. MOLD FLASH PROTRUSIONS SHALL EXCEED 0.15 (0.006) SIDE. TERMINAL NUMBERS SHOWN REFERENCE ONLY. LEAD WIDTH DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS LEAD WIDTH DIMENSION MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT LOCATED LOWER RADIUS FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS ADJACENT LEAD 0.46 0.018). MILLIMETERS -2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 7.40 8.20 0.50 0.85 1.10 1.50 0.70 0.90 -0.81 INCHES -0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 0.291 0.323 0.020 0.033 0.043 0.059 0.028 0.035 -0.032 DETAIL VIEW 0.13 (0.005) 0.10 (0.004) DETAIL NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS 6.40 6.60 4.30 4.50 -1.20 0.05 0.15 0.50 0.75 0.65 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 INCHES 0.252 0.260 0.169 0.177 -0.047 0.002 0.006 0.020 0.030 0.026 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 MC74AC574, MC74ACT574 Notes MC74AC574, MC74ACT574 Semiconductor trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. 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