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SCBS183A FEBRUARY 1991 REVISED JULY 1994 State-of-the-Art EPIC-B


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SN54ABT126, SN74ABT126 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
SCBS183A FEBRUARY 1991 REVISED JULY 1994
State-of-the-Art EPIC-B BiCMOS Design Significantly Reduces Power Dissipation Protection Exceeds 2000 MIL-STD-883C, Method 3015; Exceeds Using Machine Model Latch-Up Performance Exceeds JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) 25°C High-Drive Outputs 32-mA IOH, 64-mA Package Options Include Plastic Small-Outline Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK), Plastic Ceramic DIPs
SN54ABT126 PACKAGE SN74ABT126 PACKAGE (TOP VIEW)
SN54ABT126 PACKAGE (TOP VIEW)
description
ABT126 buffer gates feature independent line drivers with 3-state outputs. Each output disabled when associated output-enable (OE) input low. ensure high-impedance state during power power down, should tied through pulldown resistor; minimum value resistor determined current-sourcing capability driver.
internal connection OUTPUT
SN74ABT126 available TI's shrink small-outline package (DB), which provides same count functionality standard small-outline packages less than half printed-circuit-board area. SN54ABT126 characterized operation over full military temperature range 55°C 125°C. SN74ABT126 characterized operation from 40°C 85°C.
FUNCTION TABLE (each buffer) INPUTS
EPIC-B trademark Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303
DALLAS, TEXAS 75265
Copyright 1994, Texas Instruments Incorporated
SN54ABT126, SN74ABT126 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
SCBS183A FEBRUARY 1991 REVISED JULY 1994
logic symbol
logic diagram (positive logic)
This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12.
numbers shown packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, Input voltage range, (see Note Voltage range applied output high state power-off state, Current into output state, SN54ABT126 SN74ABT126 Input clamp current, Output clamp current, Maximum power dissipation 55°C still air) (see Note package 1.25 package package Storage temperature range 65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output negative-voltage ratings exceeded input output clamp-current ratings observed. maximum package power dissipation calculated using junction temperature 150°C board trace length mils, except package, which trace length zero. more information, refer Package Thermal Considerations application note 1994 Advanced BiCMOS Technology Data Book, literature number SCBD002B.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT126, SN74ABT126 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
SCBS183A FEBRUARY 1991 REVISED JULY 1994
recommended operating conditions (see Note
SN54ABT126 /VCC Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise fall rate Power-up ramp rate SN74ABT126 UNIT
Operating free-air temperature NOTE Unused floating inputs must held high low.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER IOZPU IOZPD IOZH IOZL Ioff ICEX TEST CONDITIONS Outputs high Outputs high Outputs Outputs disabled Outputs enabled Outputs disabled 25°C 0.55 0.55* 0.55 0.55 SN54ABT126 SN74ABT126 UNIT
input Other inputs
products compliant MIL-STD-883, Class this parameter does apply. typical values between should less than equal ensure state. more than output should tested time, duration test should exceed second. This increase supply current each input that specified voltage level rather than GND.
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT126, SN74ABT126 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
SCBS183A FEBRUARY 1991 REVISED JULY 1994
switching characteristics over recommended ranges supply voltage operating free-air temperature (unless otherwise noted) (see Figure
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) (OUTPUT) 25°C SN54ABT126 SN74ABT126 UNIT
This data sheet limit vary among suppliers.
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT126, SN74ABT126 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
SCBS183A FEBRUARY 1991 REVISED JULY 1994
PARAMETER MEASUREMENT INFORMATION
From Output Under Test (see Note Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open
LOAD CIRCUIT OUTPUTS Timing Input Input VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP HOLD TIMES Data Input
Input (see Note tPLH Output
tPHL tPHL tPLH
Output Control tPZL Output Waveform (see Note Output Waveform Open (see Note tPZH
tPLZ tPHZ
Output
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING
NOTES: includes probe capacitance. input pulses supplied generators having following characteristics: MHz, Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. outputs measured time with transition measurement.
Figure Load Circuit Voltage Waveforms
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT126, SN74ABT126 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
SCBS183A FEBRUARY 1991 REVISED JULY 1994
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used.
Copyright 1995, Texas Instruments Incorporated

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