SCLS033B MARCH 1984 REVISED JULY 1996 Operation From Very Slow In

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SCLS033B MARCH 1984 REVISED JULY 1996 Operation From Very Slow In

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SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS
SCLS033B MARCH 1984 REVISED JULY 1996
Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Package Options Include Plastic Small-Outline Ceramic Flat Packages, Ceramic Chip Carriers (FK), Standard Plastic Ceramic 300-mil DIPs
SN54HC7002 PACKAGE SN74HC7002 PACKAGE (TOP VIEW)
description
these devices, each circuit functions quadruple gate. They perform Boolean function positive logic. However, because Schmitt action, inputs have different input threshold levels positive- negative-going signals. These circuits temperature compensated triggered from slowest input ramps still give clean jitter-free output signals. SN54HC7002 characterized operation over full military temperature range -55°C 125°C. SN74HC7002 characterized operation from -40°C 85°C.
FUNCTION TABLE (each gate) INPUTS OUTPUT SN54HC7002 PACKAGE (TOP VIEW)
internal connection
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
Copyright 1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303
DALLAS, TEXAS 75265
SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS
SCLS033B MARCH 1984 REVISED JULY 1996
logic symbol
This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12. numbers shown packages.
logic diagram (positive logic)
absolute maximum ratings over operating free-air temperature range
Supply voltage range, -0.5 Input clamp current, VCC) (see Note Output clamp current, VCC) (see Note Continuous output current, VCC) Continuous current through Maximum power dissipation 55°C still air) (see Note package 1.25 package Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. maximum package power dissipation calculated using junction temperature 150°C board trace length mils, except package, which trace length zero.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS
SCLS033B MARCH 1984 REVISED JULY 1996
recommended operating conditions
SN54HC7002 Supply voltage High-level input voltage High Low-level input voltage Input voltage Output voltage Operating free-air temperature 3.15 1.35 SN74HC7002 3.15 1.35 UNIT
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS -5.2 1.55 3.98 5.48 25°C 1.998 4.499 5.999 0.002 0.001 0.001 0.17 0.15 ±0.1 0.26 0.26 3.15 2.45 ±100 1.55 SN54HC7002 3.15 2.45 ±1000 1.55 SN74HC7002 3.84 5.34 0.33 0.33 3.15 2.45 ±1000 UNIT
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS
SCLS033B MARCH 1984 REVISED JULY 1996
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER FROM (INPUT) (OUTPUT) 25°C SN54HC7002 SN74HC7002 UNIT
operating characteristics, 25°C
PARAMETER Power dissipation capacitance gate TEST CONDITIONS load UNIT
PARAMETER MEASUREMENT INFORMATION
From Output Under Test Test Point (see Note In-Phase Output Input tPLH tPHL Out-of-Phase Output Input tPLH tPHL
LOAD CIRCUIT
VOLTAGE WAVEFORM INPUT RISE FALL TIMES
VOLTAGE WAVEFORMS PROPAGATION DELAY OUTPUT TRANSITION TIMES
NOTES: includes probe test-fixture capacitance. Phase relationships between waveforms were chosen arbitrarily. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement. tPLH tPHL same tpd.
Figure Load Circuit Voltage Waveforms
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used.
Copyright 1996, Texas Instruments Incorporated

SCLS033B MARCH 1984 REVISED JULY 1996 Operation From Very Slow In

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