| The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers. |
Ordering Part MachXO Starter Complete working solution desig
Top Searches for this datasheetOrdering Part MachXO Starter Complete working solution designing with unique Lattice MachXO non-volatile programmable logic technology MachXO Crossover MachXO family non-volatile infinitely reconfigurable Programmable Logic Devices (PLDs) designed applications traditionally implemented using CPLDs low-capacity FPGAs MachXO family combines optimized Look-Up Table (LUT) fabric with Lattice's ispXP technology provide high pin-to-pin performance instant-on associated with CPLDs, with flexibility FPGAs, single low-cost device. MachXO Starter simple, versatile solution allowing detailed analysis MachXO performance technology. board also convenient platform help started with your MachXO design Lattice's ispLEVER development tools included MachXO Starter offer comprehensive design environment MachXO architecture. Features MachXO device LCMXO640C-3TN144C Built download capability with controller MachXO256 device Power supply JTAG oscillator Power status LEDs 4-DIP switch push button reset connector 1.8M cable Lattice Starter Software Data Tutorials MachXO Configuration Ordering Information Product Description Ordering Part HWD-XO-USB MachXO MachXO Starter evaluation board www.hardware-design.de LATTICE MORE BEST MachXO Family Features Benefits Non-Volatile, Infinitely Reconfigurable Instant-on, powers less than Single-chip, external configuration memory Excellent design security, stream intercept Performance 3.5ns Pin-to-Pin TransFR Technology Allows Simple Field Upgrades Flexible Architecture 2280 LUT4s I/Os with extensive package options Density migration supported Embedded Distributed Memory 27.6 Kbits sysMEM Embedded Block Includes dedicated FIFO control logic Kbits distributed Flexible Buffer Programmable sysIObuffer supports wide range interfaces: LVCMOS 3.3/2.5/1.8/1.5/1.2 LVTTL PCI* LVDS*, Bus-LVDS*, LVPECL*, sysCLOCK PLLs analog PLLs device Clock multiply, divide phase shifting Sleep Mode Reduces Standby Power <100µA System Level Support IEEE Standard 1149.1 Boundary Scan chip 20MHz oscillator configuration user logic Devices operate with 3.3V, 2.5V, 1.8V 1.2V power supply Commercial: (TJCOM) Industrial: 100C (TJIND) AEC-Q100 qualified: 125C (TJAUTO) MachXO1200 2280 devices only. LATTICE MORE BEST Other recent searchesTC74VCX164245FT - TC74VCX164245FT TC74VCX164245FT Datasheet PI74FCT151T - PI74FCT151T PI74FCT151T Datasheet PI74FCT251T - PI74FCT251T PI74FCT251T Datasheet PI74FCT2151T - PI74FCT2151T PI74FCT2151T Datasheet PI74FCT151 - PI74FCT151 PI74FCT151 Datasheet 2151T - 2151T 2151T Datasheet BTA312-600CT - BTA312-600CT BTA312-600CT Datasheet 2SK3880 - 2SK3880 2SK3880 Datasheet
Privacy Policy | Disclaimer |