Frequency Generator AV9108 offers tiny footprint solution generat

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Frequency Generator AV9108 offers tiny footprint solution generat

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ICS9108
Frequency Generator
AV9108 offers tiny footprint solution generating simultaneous clocks. clock, REFCLK, fixed output frequency which same input reference crystal clock). other clock, CLK1, vary between MHz, with selectable preprogrammed frequencies stored internal ROM. ICS9108 ideal 3.3V system. generate 66.66 clock 3.3V. addition, ICS9108 provides symmetrical wave form with worst case duty cycle 45/55. ICS9108 very tight edge control between clock 2XCPU clock outputs, with worst case skew 250ps. device advanced features which include on-chip loop filters, tristate outputs, power-down capability. minimum external components decoupling capacitors optional ferrite bead that required jitter-free operation. Standard versions computer motherboard applications AV9108-03, AV9108-05 ICS9108-10. Custom masked versions, with customized frequencies features, available weeks small fee.
Features
Runs 3.3V 50/50 typical duty cycle ±250ps absolute jitter Generates frequencies from input reference frequency frequencies stored internally Patented on-chip Phase Locked Loop with clock generation Provides reference clock synthesized clock On-chip loop filter power 0.8µ CMOS technology 8-pin 14-pin SOIC package
Block Diagram
AV9108RevB032195
ICS9108
Configuration
X1/ICLK REFCLK CLK1 AGND X1/ICLK REFCLK CLK1 (CLK1) (REFCLK)
AV9108-05/-10 8-Pin DIP, SOIC
AV9108-03/-11 14-Pin DIP, SOIC
Descriptions AV9108-03, AV9108-05 AV9108-10
NUMBER -05/-10/-13 AGND X1/ICLK OE(REFCLK) OE(CLK1) CLK1 REFCLK NAME TYPE Input Input Input Input Input Input Output Input Input Output Output DESCRIPTION Frequency Select CLK1 (-03 pull-up). Frequency Select CLK1 (-03 pull-up). Frequency Select CLK1 (-03 pull-up). Frequency Select CLK1 (-03 pull-up). Analog GROUND. Digital GROUND. POWER-DOWN. Shuts chip when low. Internal pull-up. CRYSTAL OUTPUT INPUT CLOCK frequency. Typically 14.318 system clock. CRYSTAL OUTPUT Connect when clock used.). OUTPUT ENABLE. Tristates REFCLK when low. Pull-up. OUTPUT ENABLE. Tristates CLK1 when low. Pull-up. CLOCK1 Output (see decoding tables). Digital power supply (+3V DC). REFERENCE CLOCK output. Produces buffered version input clock crystal frequency (typically 14.318 MHz).
ICS9108
Actual Frequencies
Decoding Table AV9108-05, 14.318 input
CLK1 40.01 50.11 66.61 80.01
Decoding Table AV9108-11 MHz)
CLK1 16.00 33.39 50.11 80.01 66.58 100.23 60.00 4.01 8.02 20.05 25.06 39.99 33.25 50.11 30.00 4.01
Decoding Table AV9108-03, 14.318 input
CLK1 16.00 39.99 50.11 80.01 66.58 100.23 8.02 4.01 8.02 20.00 25.06 40.01 33.29 50.11 4.01 2.05
Decoding Table AV9108-10, 14.318 input
CLK1 25.057 33.289 40.006 50.113
Note: dash number following ICS9108 must included when ordering product since specifies frequency decoding table being ordered. Decoding options created simple metal mask change.
ICS9108
Frequency Accuracy Calculation
accuracy frequencies produced ICS9108 depends input frequency desired actual output frequency. formula calculating exact frequency follows: Output Frequency Input Frequency where A=2, 128, B=2, example, calculate actual output frequency video monitor expecting 44.900 clock using 14.318 input clock, closest ratio 69/22, which gives output 44.906 (within 0.02% target frequency). Generally, ICS9108 produce frequencies within 0.1% desired output.
Allowable Input Output Frequencies
input frequency should between ratio should exceed output should fall range 2-120 MHz.
Output Enable
Output Enable feature tristates specified output clock pins. This places selected output pins high impedance state allow system level diagnostic testing.
Power-Down
equipped, power-down shuts specified entire chip save current. milliseconds required reach full functioning speed from power-down state.
Frequency Transitions
ICS9108 feature ability provide glitch-free frequency transitions across output frequency range. ICS9108 provides smooth transitions between groups eight frequencies (when FS3=0 FS3=1), that device will switch glitch-free between 4-100 2-50 MHz.
ICS9108
Absolute Maximum Ratings
AVDD, referenced Operating temperature under bias. +70°C Storage temperature -65°C +150°C Voltage pins referenced GND. -0.5V +0.5V Power dissipation Watts Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
Electrical Characteristics
(Operating +4.5V +5.5V; =0°C 70°C unless otherwise stated)
Characteristics PARAMETER Input Voltage Input High Voltage Input Current Input High Current Output Voltage Output High Voltage, Note Output Current, Note Output High Current, Note Supply Current Supply Current Supply Current Pull-up Resistor, Note Rise Time 2.0V, Note Fall Time 0.8V, Note Rise Time 80%, Note Fall Time 20%, Note Duty Cycle, Note Jitter, Sigma, Note Jitter, Sigma, Note Jitter, Sigma, Note Jitter, Absolute, Note Jitter, Absolute, Note Jitter, Absolute, Note Input Frequency, Note Output Frequency Power-up Time, Note Transition Time, Note SYMBOL low) low) Tjis Tjis Tjis Tjab Tjab Tjab TEST CONDITIONS -2.0 22.0 Characteristics 15pf load 15pf load 15pf load 15pf load 15pf load 1.4V From From From Below From From From Below 45.0 0.60 0.40 50.0 50.0 100.0 1.40 1.00 55.0 150.0 200.0 250.0 500.0 19.0 120.0 18.0 13.0 0.15 3.25 35.0 -50.0 18.0 38.0 14.0 380.0 0.40 -35.0 42.0 100.0 40.0 700.0 UNITS ohms
VIN=0V VIN=VDD IOL=10mA IOH=-30mA VOL=0.8V VOH=2.0V Unload, Unload, Logic Inputs Unload, Logic Inputs
-250.0 -500.0 11.0 14.3 7.58
66.6
Note Parameter guaranteed design characterization. 100% tested production.
ICS9108
Electrical Characteristics 3.3V
(Operating +3.0V +3.7V; =0°C 70°C unless otherwise stated)
Characteristics PARAMETER Input Voltage Input High Voltage Input Current Input High Current Output Voltage Output High Voltage Output Current Output High Current Supply Current Supply Current Supply Current Pull-up Resistor Rise Time 80%, Note Fall Time Duty Cycle Jitter, Sigma Jitter, Sigma Jitter, Sigma Jitter, Absolute Jitter, Absolute Jitter, Absolute Input Frequency Output Frequency Power-up Time, Note Transition Time, Note SYMBOL low) low) Tjis Tjis Tjis Tjab Tjab Tjab TEST CONDITIONS 0.7VDD -2.0 0.85 15.0 Characteristics 15pf load 15pf load 15pf load From From From Below From From From Below 40.0 46.0 50.0 100.0 60.0 150.0 200.0 250.0 500.0 15.3 90.0 18.0 13.0 0.15 0.92 22.0 -17.0 22.0 13.0 550.0 0.20VDD -10.0 40.0 40.0 12.0 900.0 UNITS ohms
VIN=0V VIN=VDD IOL=6mA IOH=-5mA VOL=0.2VDD VOL=0.7VDD Unloaded, Unload, Logic Inputs Unload, Logic Inputs
-250.0 -500.0 13.3 14.3 7.58
66.6
Parameter guaranteed design characterization.
ICS9108
8-Pin Package
14-Pin Package Ordering Information
AV9108-XXCN8, ICS9108-XXCN14
Example:
XXXX-
Lead Count Package Width
Lead Count=1, digits W=.3" SOIC DIP; None=Standard Width
Package Type
N=DIP (Plastic)
Pattern Number digit number parts with code patterns) Device Type (consists digit numbers) Prefix
ICS, AV=Standard Device; GSP=Genlock Device
ICS9108
8-Pin Plastic SOIC
14-Pin SOIC Package
Ordering Information
ICS9108-XXCS8, IS9108-XXCS14
Example:
XXXX-
Lead Count Package Width
Lead Count=1, digits W=.3" SOIC DIP; None=Standard Width
Package Type
S=SOIC
Pattern Number digit number parts with code patterns) Device Type (consists digit numbers) Prefix
ICS, AV=Standard Device; GSP=Genlock Device

Frequency Generator AV9108 offers tiny footprint solution generat

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