SCBS156D FEBRUARY 1991 REVISED JULY 1996 CLKEN description

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SCBS156D FEBRUARY 1991 REVISED JULY 1996 CLKEN description

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SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
SCBS156D FEBRUARY 1991 REVISED JULY 1996
CLKEN
description
These 8-bit positive-edge-triggered D-type flipflops with clock (CLK) input particularly suitable implementing buffer storage registers, shift registers, pattern generators.
State-of-the-Art EPIC-B BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) 25°C High-Drive Outputs 32-mA IOH, 64-mA Protection Exceeds 2000 MIL-STD-883, Method 3015; Exceeds Using Machine Model Package Options Include Plastic Small-Outline (DW) Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK), Plastic Ceramic DIPs, Ceramic Flat Packages
SN54ABT377 PACKAGE SN74ABT377A PACKAGE (TOP VIEW)
CLKEN
SN54ABT377 PACKAGE (TOP VIEW)
Data input information that meets setup time requirements transferred outputs positive-going edge clock pulse common clock-enable (CLKEN) input low. Clock triggering occurs particular voltage level directly related transition time positive-going pulse. When buffered clock (CLK) input either high level, input signal effect output. circuits designed prevent false clocking transitions CLKEN.
SN74ABT377A available TI's shrink small-outline package, which provides same count functionality standard small-outline packages less than half printed-circuit-board area. SN54ABT377 characterized operation over full military temperature range 55°C 125°C. SN74ABT377A characterized operation from 40°C 85°C.
FUNCTION TABLE (each flip-flop) INPUTS CLKEN OUTPUT
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. EPIC-B trademark Texas Instruments Incorporated.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
Copyright 1996, Texas Instruments Incorporated
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
SCBS156D FEBRUARY 1991 REVISED JULY 1996
logic symbol
CLKEN
This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12.
logic diagram (positive logic)
CLKEN
Seven Other Channels
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
SCBS156D FEBRUARY 1991 REVISED JULY 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, Input voltage range, (see Note Voltage range applied output high state power-off state, Current into output state, SN54ABT377 SN74ABT377A Input clamp current, Output clamp current, Maximum power dissipation 55°C still air) (see Note package package package Storage temperature range, Tstg 65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. maximum package power dissipation calculated using junction temperature 150°C board trace length mils, except package, which trace length zero. more information, refer Package Thermal Considerations application note Advanced BiCMOS Technology Data Book.
recommended operating conditions (see Note
SN54ABT377 Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise fall rate SN74ABT377A UNIT
Operating free-air temperature NOTE Unused inputs must held high prevent them from floating.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
SCBS156D FEBRUARY 1991 REVISED JULY 1996
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER Ioff ICEX TEST CONDITIONS Outputs high Outputs Outputs high -100 0.55 0.55* ±100 -180 -180 0.55 0.55 ±100 -180 25°C -1.2 SN54ABT377 -1.2 SN74ABT377A -1.2 UNIT
input Other inputs
products compliant MIL-PRF-38535, this parameter does apply. typical values more than output should tested time, duration test should exceed second. This increase supply current each input that specified voltage level rather than GND.
timing requirements over recommended ranges supply voltage operating free-air temperature (unless otherwise noted) (see Figure
25°C fclock Clock frequency Pulse duration Setup time before Hold time after high Data high CLKEN high Data high CLKEN high SN54ABT377 UNIT
This data sheet limit vary among suppliers.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
SCBS156D FEBRUARY 1991 REVISED JULY 1996
timing requirements over recommended ranges supply voltage operating free-air temperature (unless otherwise noted) (see Figure
25°C fclock Clock frequency Pulse duration Setup time before Hold time after high Data high CLKEN high Data high CLKEN high SN74ABT377A UNIT
This data sheet limit vary among suppliers.
switching characteristics over recommended ranges supply voltage operating free-air temperature, (unless otherwise noted) (see Figure
PARAMETER fmax tPLH tPHL FROM (INPUT) (OUTPUT) 25°C SN54ABT377 UNIT
switching characteristics over recommended ranges supply voltage operating free-air temperature, (unless otherwise noted) (see Figure
PARAMETER fmax tPLH FROM (INPUT) (OUTPUT) 25°C SN74ABT377A UNIT
tPHL This data sheet limit vary among suppliers.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
SCBS156D FEBRUARY 1991 REVISED JULY 1996
PARAMETER MEASUREMENT INFORMATION
From Output Under Test (see Note TEST Open tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open
LOAD CIRCUIT Input VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP HOLD TIMES Data Input Timing Input
Input
tPLH tPHL tPHL tPLH
Output Control tPZL Output Waveform (see Note Output Waveform Open (see Note tPZH
tPLZ tPHZ
Output
Output
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with transition measurement.
Figure Load Circuit Voltage Waveforms
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used.
Copyright 1996, Texas Instruments Incorporated

SCBS156D FEBRUARY 1991 REVISED JULY 1996 CLKEN description

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