µPD780812, µPD780814 8-BIT SINGLE-CHIP MICROCONTROLLER Descr

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

µPD780812, µPD780814 8-BIT SINGLE-CHIP MICROCONTROLLER Descr

Datasheet Thumbnail

Top Searches for this datasheet

INTEGRATED CIRCUIT
µPD780812, µPD780814
8-BIT SINGLE-CHIP MICROCONTROLLER
Description
µPD780814 member 78K/0 series microcontrollers. Besides high speed, high performance CPU, these microcontrollers have on-chip ROM, RAM, ports, 8-bit resolution converter, timer, CANinterface, serial interface, interrupt control various other peripheral hardware. details functions described following user manuals. sure read before starting design. µPD780814, Subseries User's Manual U13413E 78K/0 Series User's Manual Instructions U12326E
Features
Internal high capacity
Item Part umber 780812 780814 Program Memory (Flash EEPR bytes bytes Internal ighSpeed bytes 1024 bytes Memory Internal Expansion bytes bytes
EEPR bytes bytes
Package 64-pin plastic (fine pitch) 64-pin plastic (fine pitch)
Instruction execution time changed from high speed (0.25 ultra speed ports: 8-bit resolution converter channels Main clock fail monitor
CAN-Interface Serial interface 3-wire mode UART mode Timer voltage
channels channel channel channels
Application
Body electronics, industrial electronics, security units etc.
information this document subject change without notice.
Document U13414EE1V0PM00 Date April 1998
Corporation 1998
µPD780812, µPD780814
Ordering Information
Part Number µPD780812GK-8A8 µPD780814GK-8A8 Package 64-pin plastic resin thickness 64-pin plastic resin thickness
78K0 Series Development
These products further development 78K0 Series. designations appearing inside boxes subseries names.
Products mass production Products under development subseries products compatible with bus. control 100-pin 100-pin 80-pin 64-pin 64-pin 64-pin 64-pin 42/44-pin
PD78078 PD78070A PD78054 PD78018F PD78014 PD780001 PD78002 PD78083
driving
µPD78078Y PD78070AY PD78054Y PD78018FY PD78014Y PD78002Y
Timer added µPD78054, external interface functions enhanced ROM-less product µPD78078 UART added µPD78014, enhanced Low-voltage (1.8 operation version µPD78014, variations enhanced 16-bit timer added µPD78002 added µPD78002 Basic subseries control Internal UART, low-voltage (1.8 operation possible
78K/0 Series
100-pin 80-pin 64-pin
PD780208 PD78044A PD78024
driving
I/O, µPD78044A enhanecd, display output total: 6-bit counter added PD78024, display output total: Basic subseries driving, display output total:
100-pin
PD78064
IEBus
PD78064Y
Subseries driving, internal UART
80-pin
PD78098
CANBus
IEBus controller added µPD78054
100-pin 80-pin 64-pin
PD780948 PD780824 PD780814
CANBus controller
µPD780812, µPD780814
Major functional differences among subseries
Function Subseries Name Control Capacity Timer 8-bit (UART: 1ch) 16-bit Watch 8-bit 8-bit Serial Interface External MIN. Expansion Value
driving
driving IEBus µPD78098 K-60 CANBus µPD780948 µPD780824 µPD780814
µPD78078 µPD78070A µPD78054 µPD78018F µPD78014 µPD780001 µPD78002 µPD78083 µPD780208 µPD78044A µPD78024 µPD78064
K-60 K-60 K-60 K-32 K-16 K-60 K-40 K-32 K-32
(UART: 1ch)
12ch
(UART: 1ch) (UART: 1ch) (UART: 1ch) (UART: 1ch) (UART: 1ch)
µPD780812, µPD780814
Overview Functions
Part Number Item Flash EEPROM Internal high-speed Internal memory Internal expansion
µPD780812 bytes
bytes bytes bytes bytes bits registers bits registers banks) On-chip instruction execution time selective function 0.25 µs/0.5 µs/1 µs/2 µs/4 MHz) 32.768 kHz) 16-bit operation Multiplcation/division bits bits,16 bits bits) manipulation (set, reset, test, boolean operation) adjustment, etc.
µPD780814 bytes
1024 bytes bytes
EEPROM Memory space General registers Instruction cycle When main system clock selected When subsystem clock selected Instruction
ports
Total CMOS input CMOS
converter Serial interface
Timer
8-bit resolution channels 3-wire mode: channel UART mode: channel 16-bit timer/event counter 8-bit timer/event counter Watch timer Watchdog timer
channels channels channel channel
Timer output Clock output interface Vectored interrupts Maskable interrupts Non-maskable interrupts Software interrupts
(16-bit output 8-bit output 62.5 kHz, kHz, kHz, kHz, MHz, MHz, MHz, main system clock MHz) channel Internal external Internal Internal
Supply voltage Package
64-pin plastic
Major Changes
Page Description internal high-speed 1024 bits
Note:
mark shows major revised points.
µPD780812, µPD780814
Contents
5.10 5.11 Configuration (Top View) Block Diagram Functions Normal Operating Mode Pins Non-port Pins Circuits Recommended Connection Unused Pins Memory Space Peripheral Hardware Functions Ports Clock Generator Main System Clock Oscillator Subsystem Clock Oscillator Timer/Event Counter Clock Output Control Circuit Clock Monitor Converter Power Fail Detector Serial Interfaces CAN-Bus Interface
Interrupt Functions Test Functions Interrupt Functions Interrupts EEPROM Function Standby Function Reset Function
Instruction Electrical Specifications Package Drawing Recommended Soldering Conditions Appendix Development Tools Appendix Related Documents
µPD780812, µPD780814
Configuration (Top View)
plastic µPD780812GK-xxx-8A8 µPD780814GK-xxx-8A8
Figure 1-1: Configuration
P03/INTP3 P02/INTP2 P01/INTP1 P00/INTP0 P47/KR7
P44/KR4
P62/TI22 P61/TI21 P60/TI20 VDD1 Vss1
P70/TI00TO0 P71/TI01 CRxD CTxD
P46/KR6
P45/KR5
P43/KR3
P42/KR2
P41/KR1 P40/KR0 RESET CL1/CCLK IC/Vpp VDD0 VSS0 ANI11 ANI10 ANI9 ANI8 AVDD P17/ANI7
Cautions:
Connect (internally connected) directly VSS. AVDD should connected VDD. AVSS should connected VSS.
P27/TI51/TO51
P26/TI50/TO50
P10/ANI0
P22/SCK
P11/ANI1
P12/ANI2
P24/RxD
P13/ANI3 P14/ANI4
P25/TxD
P15/ANI5
P16/ANI6
P23/PCL
P21/SO
P20/SI
AVss
µPD780812, µPD780814
Identifications P64, P65, P70, INTP0 INTP3 TI00, TI01, TI50, TI51 TI20 TI22 TO0, TO51, TO52 CRxD CTxD CCLK Port0 Port1 Port2 Port4 Port5 Port6 Port7 Interrupt from Peripherals Timer Input Timer Input Timer Output Receive Data Transmit Data Clock Serial Input CL1, RESET ANI0 ANI11 AVSS AVDD Serial Output Receive Data Transmit Data Serial Clock Programmable Clock Output Crystal (Main System Clock) (Subystem Clock) Reset Analog Input Analog Ground Analog Reference Voltage Power Supply Programming Power supply Ground Internally Connected
µPD780812, µPD780814
Block Diagram
Figure 2-1: Block Diagram
IC/VPP
TI00/TO0 TI01 TI20 TI21 TI22 TI50/TO50 TI51/TO51
Timer
VDD1 VDD0 VSS1 VSS0
Port
Timer Timer Timer Watch Timer Watchdog Timer
Interface 78K/0 Core
Bytes 1024 Bytes K/32
Port Port Port
(Key Interrupt Port)
Port Port
Serial Interface Channel
EEPROM Bytes
UART
CCLK CRxD CTxD
DCAN Interface
Bytes
Port
Main Clock Monitor
ANI0ANI11 AVss AVDD
Converter Power Fail Detector
System Control Oscillator
RESET
STANDBY CONTROL INTERRUPT CONTROL
INTP0-
Clock Output Control
INTP3
Remark:
internal flash capacity depends product.
µPD780812, µPD780814
Functions
Normal Operating Mode Pins Input/Output Types
Table 3-1: Input/Output Types
Input Output Input Output
Name
Function Port input output port input output mode specified bit-wise used input port, pull-up resistor connected software bit-wise Port input port
Alternate Function INTP0 INTP1 INTP2 INTP3 AN0-AN7 TI50/TO50 TI51/TO51
After Reset Input Input Input Input Input Input Input Input Input Input Input Input Input
Input
P10-P17
Input Output
Port input/output port input output mode specified bit-wise used input port, pull-up resistor specified bit-wise
Input/ Output
P40-P47
Input Output
P50-P57
Port input output port input output mode specified bit-wise used input port, pull-up resistor connected software Port input output port input output mode specified bit-wise used input port, pull-up resistor specified bit-wise
KR0-KR7
Input
Input
Input Output Input Output Port input output port input output mode specified bit-wise used input port, pull-up resistor specified bit-wise Port input output port input output mode specified bit-wise used input port, pull-up resistor connected software
TI20 TI21 TI22 TI00/TO0 Input TI01 Input
µPD780812, µPD780814
Non-Port Pins
Table 3-2: Non-Port Pins
Name INTP0 INTP1 INTP2 INTP3 CRxD CTxD CCLK TI00 TI01 TI20 TI21 TI22 TI50 TI51 TO50 TO51 KR0-KR7 ANI0 ANI7 ANI8 ANI11 AVDD AVSS RESET VDD0, VDD1 VSS0, VSS1
Function
After Reset
Alternate Function P70/TO0
Input
External interrupts with specifiable valid edges (rising edge, falling edge, both rising falling edges) Serial interface serial data input Serial interface serial data output Serial interface serial clock input output Asynchronous serial interface serial data input Asynchronous serial interface serial data output serial data input serial data output serial clock input External signal input 16-bit timer (TM0) Capture trigger input
Input
Input Output Input/ Output Input Output Input Output Input
Input Input Input Input Input Input Output
Input
Capture trigger input Capture trigger input External count clock input 8-bit timer (TM50) External count clock input 8-bit timer (TM51) 16-bit timer output
Input
P26/TO50 P27/TO51 P70/TI00
Output Output Input Input Input Input Input
8-bit timer output (also used output) 8-bit timer output (also used output) Clock output (for main system clock trimming) return input Converter analog input Converter analog input Converter reference voltage input. Power supply AD-converter Converter ground potential. Connect System reset input Crystal connection main system clock Crystal connection main system clock connection subsystem clock connection subsystem clock Positive power supply Ground potential High voltage supply flash programming (only flash version) Internal connection. Connect directly (only MaskROM version)
Input Input Input Input Input
P26/TI50 P27/TI51 P40-P47 P10-P17 CCLK
µPD780812, µPD780814
Circuits Recommended Connection Unused Pins input/output circuit type each recommended connection unused pins shown following table. input/output circuit configuration each type, table.
Table 3-3: Types Input/Output Circuits
Name P00/INTP0 P01/INTP1 P02/INTP2 P03/INTP3 P10/ANI0 P11/ANI1 P12/ANI2 P13/ANI3 P14/ANI4 P15/ANI5 P16/ANI6 P17/ANI7 P20/SI P21/SO P22/SCK P23/PCL P24/RxD P25/TxD P26/TI50/TO50 P27/TI51/TO51 P40/KR0 P41/KR1 P42/KR2 P43/KR3 P44/KR4 P45/KR5 P46/KR6 P47/KR7 P60/TI20 P61/TI21 P62/TI22 P70/TI00/TO0 P71/TI01 CRxD CTxD CL1/CCLK RESET AVDD AVSS Input/Output Circuit Type Recommended Connection Unused Pins
Connect resistor individually
11-B
Connect resistor individually
10-A Connect resistor individually
Connect resistor individually
Connect resistor individually
Connect resistor individually
Connect resistor individually Connect resistor individually Leave open Connect Connect Connect directly
µPD780812, µPD780814
Figure 3-1: Input/Output Circuits
Type
Type
P-ch Data N-ch
Type Pullup enable Data
Type
P-ch
Pullup enable Data IN/OUT P-ch
P-ch
P-ch
IN/OUT Output disable N-ch
Output disable
N-ch
Input enable Type 10-A Pullup enable Data P-ch IN/OUT Open drain output disable N-ch Input enable Type 11-B
P-ch Comparator
P-ch
N-ch (Threshold Voltage)
µPD780812, µPD780814
Memory Space
memory µPD780812 shown Figure 4-1.
Figure 4-1: Memory
FFFFH FF20H FF1FH FF00H FEFFH FEE0H FEDFH FE20H FD00H FCFFH
Special Function Registers (SFRs) bits
General Registers bits Internal High-speed bits
usable 3FFFH Program Area FA00H F9FFH F900H F8FFH F800H F7FFH (F71FH) F600H F5FFH 4000H 3FFFH 0000H usable Internal Flash Bytes EEPROM bits usable Expansion Bytes 0800H 07FFH 1000H 0FFFH CALLF Entry Area
Program Area
0080H 007FH CALLT Table Area 0040H 003FH Vector Table Area 0000H
µPD780812, µPD780814
memory µPD780814 shown Figure 4-2.
Figure 4-2: Memory
FFFFH FF20H FF1FH FF00H FEFFH FEE0H FEDFH FE20H FB00H FAFFH
Special Function Registers (SFRs) bits
General Registers bits Internal High-speed 1024 bits
usable 7FFFH Program Area FA00H F9FFH F900H F8FFH F800H F7FFH (F71FH) F600H F5FFH 8000H 7FFFH 0000H usable Internal Flash Bytes EEPROM bits usable Expansion Bytes 0800H 07FFH 1000H 0FFFH CALLF Entry Area
Program Area
0080H 007FH CALLT Table Area 0040H 003FH Vector Table Area 0000H
µPD780812, µPD780814
Peripheral Hardware Function
Ports Input/output ports classified into three types. CMOS input/output (P00 P03, Port Port Port Port Input (P10 P17) Total
Table 5-1: Functions Ports
Port Name Port Name Function Input/output port. Input/output specified bit-wise. When used input port, on-chip pull-up resistor used bit-wise software. Input port.
Port
Port
Input/output port. Input/output specified bit-wise. When used output port, on-chip output buffer used software.
Port
Input/output port. Input/output specified 8-bit units.
When used input port, on-chip pull-up resistor used bit-wise software.
Port
Input/output port. Input/output specified bit-wise.
When used output port, port function specified software.
Port
Input/output port. Input/output specified bit-wise. When used output port, port function specified software.
Port
P70,
Input/output port. Input/output specified bit-wise. When used input port, on-chip pull-up resistor used bit-wise software.
µPD780812, µPD780814
Clock Generator
There kinds clock generators: main system subsystem clock generators. possible change instruction execution time. 0.25 µs/0.5 µs/1 µs/2 µs/4 main system clock frequency MHz) subsystem clock frequency 32.768 kHz)
Figure 5-1: Clock Generator Block Diagram
Subsystem Clock Oscillator
Watch Timer
Prescaler Main System Clock Oscillator Clock peripheral hardware
Prescaler
STOP Selector
Standby Control Circuit
Clock (fCPU)
Main system clock oscillator
main system clock oscillator oscillates with crystal ceramic resonator connected pins.
Figure 5-2: Oscillator Circuit
Crystal ceramic oscillation External clock
Crystal resonator ceramic resonator
External Clock
µPD780812, µPD780814
Subsystem Clock Oscillator
Subsystem clock oscillator oscillation with very frequency.
Figure 5-3: Oscillator Circuit
CL1/CCLK
Timer/Event Counter
There following seven timer/event counter channels: 16-bit timer/event counter channel 8-bit timer/event counter channels Watch timer channel Watchdog timer channel
Table 5-2: Types Functions Timer/Event Counters
16-bit Timer/Event 8-bit Timer/Event Counter Counter Type Interval timer External event counter Timer output output Pulse with measurement Function Square wave output One-shot pulse output Interrupt request Test input channels channel output output inputs output output outputs channels channels outputs outputs inputs Watch Timer channel Watchdog Timer 16-bit Timer
channel channel
µPD780812, µPD780814
Figure 5-4: Timer
Internal
TI01/P71
Selector
16-bit Capture/ Compare Control Register (CR00)
Selector
Noise Rejection Circuit
INTTM00
Match
Selector
16-bit Timer Register (TM0)
Clear Circuit
Output Control
TO0/P70/ TI00
Match Noise Rejection Circuit Noise Rejection Circuit 16-bit Capture/ Compare Control Register (CR01)
Selector
TI00/P70/
INTTM01
Internal
Figure 5-5: Timer
Selector
16-Bit Timer Register (TM2)
Overflow
TI22
Schmitt Trigger Input Buffer
Digital Filter
Prescaler 1/2, 1/4,
Edge Detection Circuit
16-Bit Capture Register (CR22)
INTTM22 Schmitt Trigger Input Buffer Digital Filter Edge Detection Circuit
TI21
16-Bit Capture Register (CR21)
INTTM21
µPD780812, µPD780814
TI20
Schmitt Trigger Input Buffer
Digital Filter
Edge Detection Circuit
16-Bit Capture Register (CR20)
INTTM20 DCAN
Internal
Valid edge (rising edge, falling edge both edges) selectable software
µPD780812, µPD780814
Figure 5-6: Digital Capture Input Filter
TI22
Counter
Selector Internal
Edge Detection
TI20, TI21
Edge Detection
Internal
µPD780812, µPD780814
Figure 5-7: 8-Bit Timer/Event Counter Block Diagram
Internal
8-bit Compare Register (CR51) Selector Match INT51
8-bit Timer Register (TM51) Clear
Output Control Circuit
TO51 TI51
TI51 TO51
Internal
Figure 5-8: 8-Bit Timer/Event Counter Block Diagram
Internal
8-bit Compare Register (CR50) Selector Match INT50
8-bit Timer Register (TM50) Clear
Output Control Circuit
TO50 TI50
TI50 TO50
Internal
µPD780812, µPD780814
Figure 5-9: Watch Timer Block Diagram
Selector 5-bit Counter INTWT
Selector
fx/2
Prescaler
Selector
Selector
INTWTI
Figure 5-10: Watchdog Timer Block Diagram
fx/2
Prescaler fx/213 fx/214 fx/215 fx/216 fx/217 fx/218 fx/220
INTWDT Maskable interrupt request
Selector Control Circuit
RESET INTWDT Non-maskable interrupt request
µPD780812, µPD780814
Clock Output Control Circuit
This circuit output clocks following frequencies: 62.5 kHz/125 kHz/250 kHz/500 kHz/1 MHz/2 MHz/4 MHz/8 main system clock frequency MHz)
Figure 5-11: Clock Output Control Circuit Block Diagram
fX/2 fX/23 fX/24 fX/25 fX/26 fX/27 fX/22
Selector
Synchronization Circuit
Output Control Circuit
SGOA
Clock Monitor
clock monitor check main system clock using subsystem clock.
Figure 5-12: Clock Monitor Block Diagram
Edge Detection
STOP
Clock mode
Main_CLK
Periodical Latch Reset Edge Detection
Sub_CLK
Enable
µPD780812, µPD780814
Converter
converter consists eight 8-bit resolution channels. conversion started software.
Figure 5-13: Converter Block Diagram
Series Resistor String ANI0/P10 ANI1/P11 ANI2/P12 ANI3/P13 ANI4/P14 ANI5/P15 ANI6/P16 ANI7/P17 ANI8 ANI9 ANI10 ANI11 Control Circuit INTAD Sample Hold Circuit Voltage Comparator
Selector
Selector
Successive Approximation Register (SAR)
Conversion Result Register (ADCR1)
Internal
µPD780812, µPD780814
Power Fail Detector
block diagram power fail detector shown figure 5-14.
Figure 5-14: Block Diagram Power Fail Detector
ANI7/P17 ANI6/P16 ANI5/P15 ANI4/P14 ANI3/P13
Selector Conversion Result Register (ADCR1)
Comparator
Compare Register (PFT)
ANI2/P12 ANI1/P11 ANI0/P10 ANI8 ANI9 ANI10 ANI11
Selector
Internal
INTAD (A/D Conversion termination interrupt) (Power fail Power detection interrupt)
µPD780812, µPD780814
5.10 Serial Interfaces
There following three on-chip serial interface channels synchronous with clock: Serial interface channel Serial interface channel
Table 5-3: Types Functions Serial Interfaces
Function 3-wire serial mode Asynchronous serial interface (UART) mode
Serial Interface Channel (MSB first)
Serial Interface Channel (On-chip dedicated baud rate generator
Figure 5-15: Serial Interface Channel Block Diagram
Internal Receive Data Register Serial Shift Register (SIO13O)
SI0/P20
SO0/P21
SCK0/P22
Serial Clock Counter
INTCSI0
Serial Clock Control Circuit
Selector
fX/23 fX/27 TO50
µPD780812, µPD780814
Figure 5-16: Serial Interface UART Block Diagram
Internal
Receive Buffer Register (RXB)
Direction Control Circuit
Direction Control Circuit
Transmit Shift Register (TXS)
RXD/P24 TXD/P25
Receive Shift Register (RXS)
Transmit Control Circuit
INTST
Receive Control Circuit
INTSER INTSR
Baud Rate Generator
fSCK
Selector
fX/21 fX/28
µPD780812, µPD780814
5.11 CAN-Bus Interface
CAN-Bus Interface following functions: protocol with active extended frame. maximum Baud rate clock). Receice messages will stored area depending message identifier, which unused bytes used CPU. Unique identifier messages usable. transmit channels with masks.
Figure 5-17: CAN-Bus Interface
Control Extended
CTxD DCAN-Interface CRxD
High Speed
µPD780812, µPD780814
Interrupt Functions Test Functions
Interrupt Functions total interrupt functions provided, divided into following three types. Non-maskable interrupt Maskable interrupt Software interrupt
Table 6-1: Interrupt Vector Table
Note
Interrupt Source Internal/ Name Trigger Overflow watchdog timer (When watchdog timer selected) Overflow watchdog timer (When interval timer mode selected) converter conversion Overflow 16-bit timer Generation 16-bit timer capture register (CR20) match signal Generation 16-bit timer capture register (CR21) match signal Generation 16-bit timer capture register (CR22) match signal input edge detection External Internal External Vector Address
Note
Maskability
Interrupt Priority
Basic Structure Type
Nonmaskable
INTWDT INTWDT INTAD INTOVF INTTM20 INTTM21 INTTM22 INTP0 INTP1 INTP2 INTP3 INTCE INTCR INTCT0 INTCT1 INTCSI0 INTSER INTSR INTST INTTM00 INTTM01 INTTM50 INTTM51 INTWE INTWTI INTWT INTKR
0004H 0006H 0008H 000AH 000CH 000EH 0010H 0012H 0014H 0016H
Maskable
Error Receive Transmitbuffer Transmitbuffer serial interface channel transfer Serial interface channel UART reception error generation serial interface channel UART reception serial interface channel UART transfer Generation 8-bit timer capture/compare register (CR00) match signal Generation 8-bit timer0 capture/compare register (CR01) match signal Generation 8-bit timer/event counter match signal Generation 8-bit timer/event counter match signal EEPROM write completion interrupt Reference time interval signal from watch timer Reference time interval signal from watch timer return signal Port instruction execution External Internal
0018H 001AH 001CH 001EH 0020H 0022H Internal 0024H 0026H 0028H 002AH 002CH 002EH 0030H 0032H 0034H 0036H 003EH
Software
µPD780812, µPD780814
Notes: Default priority priority order when several maskable interruptions generated same time. highest order lowest order. Basic structure types correspond Figure 7-1.
Interrupts
Figure 6-1: Interrupt Function Basic Configuration (1/2)
Internal non-maskable interrupt
Internal
Interrupt request
Priority Control Circuit
Vector Table Address Generator
Standby release signal
Internal maskable interrupt
Internal
Interrupt request
Priority Control Circuit
Vector Table Address Generator
Standby release signal
External maskable interrupt
Internal
External Interrupt Mode Register (EGP, EGN)
Interrupt request
Edge Detector
Priority Control Circuit
Vector Table Address Generator Standby release signal
µPD780812, µPD780814
Figure 6-1: Interrupt Function Basic Configuration (2/2)
External maskable interruption (INTKR)
Internal
Interrupt request
Falling Edge Detector
Priority Control Circuit
Vector Table Address Generator Standby release signal
Software interrupt
Internal
Interrupt request
Priority Control Circuit
Vector Table Address Generator
µPD780812, µPD780814
EEPROM Function
µPD78F0812 µPD78F0814 incorporate only 2016 byte 8-bit also byte 8-bit EEPROM (Electrically Erasable PROM) data memory. EEPROM, unlike static RAM, retain contents when power turned off. Unlike EPROM, it`s contents electrically erased without using ultraviolet rays. EEPROM manipulated 8-bit memory manipulation instructions.
Standby Function
standby function intends reduce current consumption. following modes: this mode, operation clock stopped. average current HALT mode: tion reduced intermittent operation combining this mode with normal operation mode. this mode, oscillation main system clock stopped. operations STOP mode: performed main system clock suspended, only subsystem clock used extremely small power consumption.
Figure 8-1: Standby Function
Main System Clock Operation STOP instruction Interrupt request HALT Mode (Supply clock stopped although clock generated.) HALT instruction Interrupt request HALT Mode (Supply clock stopped although clock generated.)
Note
Subsystem Clock OperationNote HALT instruction
Interrupt request
STOP Mode (Oscillation main system clock stopped.)
Note:
Current consumption reduced shutting main system clock. operating subsystemclock, shut main system clock setting MCC. When switching main system clock again after subsystem clock been used with main system clock stopped, sure provide enough time generation stable with program first.
Caution:
Reset Function
There following reset methods. External reset input RESET Internal reset watchdog timer runaway time detection Internal reset main clock failure detection.
µPD780812, µPD780814
Instruction
8-Bit Instructions MOV, XCH, ADD, ADDC, SUB, SUBC, AND, XOR, CMP, MULU, DIVUW, INC, DEC, ROR, ROL, RORC, ROLC, ROR4, ROL4, PUSH, POP, DBNZ.
Table 10-1: 8-Bit Instructions
Operand #byte Operand ADDC SUBC ADDC SUBC ADDC SUBC DBNZ ADDC SUBC ROR4 ROL4 PUSH DBNZ ADDC SUBC ADDC SUBC ADDC SUBC
Note
[HL+byte] saddr !addr16 [DE] [HL] ADDC SUBC MOVU RORC ROLC $addr16 None
saddrMOV
!addr16 [DE] [HL] [HL+byte]
MULU DIVUW
Note:
Except
µPD780812, µPD780814
16-Bit Instructions MOVW, XCHW, ADDW, SUBW, CMPW, PUSH, POP, INCW, DECW.
Table 10-2: 16-Bit Instructions
Operand #word Operand ADDW SUBW CMPW MOVW MOVW MOVW MOVW MOVW MOVW MOVW MOVW MOVW
Note
sfrp
saddrp
!addr16
None
MOVW XCHW
MOVW
MOVW
MOVW
MOVW
sfrp saddrp !addr16
INCW, DECW PUSH,
Note:
Only when
Manipulation Instructions MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BTCLR.
Table 10-3: Manipulation Instructions
Operand A.bit Operand MOV1 A.bit MOV1 sfr.bit MOV1 saddr.bit MOV1 PSW.bit MOV1 [HL].bit MOV1 AND1 XOR1 MOV1 AND1 XOR1 MOV1 AND1 XOR1 MOV1 AND1 XOR1 MOV1 AND1 XOR1 BTCLR BTCLR BTCLR BTCLR BTCLR SET1 CLR1 SET1 CLR1 SET1 CLR1 SET1 CLR1 SET1 CLR1 SET1 CLR1 NOT1 sfr.bit saddr.bit PSW.bit [HL].bit $addr16 None
µPD780812, µPD780814
Call instructions/Branch instructions CALL, CALLF, CALLT, BNC, BNZ, BTCLR, DBNZ.
Table 10-4: Call Instructions/Branch Instructions
Operand Operand Basic instruction CALL CALLF CALLT BTCLR DBNZ !addr16 !addr11 [addr5] $addr16
Compound instruction
Other instructions ADJBA, ADJBS, BRK, RET, RETI, RETB, SEL, NOP, HALT, STOP.
µPD780812, µPD780814
Electrical Specifications
Absolute Maximum Ratings
Table 11-1: Absolute Maximum Ratings
Rating -0.3 +6.0 -0.3 +11.0 -0.3 +0.3 -0.3 +0.3 P03, P27, P47, P57, P67, P70, P71, CL1, RESET P17, ANI8 ANI11 (except P34) P07, P27, P47, P57, P67, P70, P71, CTxD total (except P34) High level output current
Note
Parameter Supply voltage
Symbol AVDD AVSS
Conditions
Unit
Input voltage Output voltage Analog input voltage High level output current
-0.3 +0.3 -0.3 +0.3
Analog input
AVSS -0.3 AVDD +0.3 +150
Peak value Effective value Peak value Effective value Peak value Effective value
P07, P27, P47, P67, CTxD total P57, P70,
Operating ambient temperature Storage temperature
TSTG
Note:
Effective value should calculated follows: [Effective value] [Peak value]
Caution:
Product quality suffer absolute maximum ratings exceeded even single parameter even momentarily. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions which ensure that absolute maximum ratings exceeded. characteristics dual-function pins same those port pins unless otherwise specified.
Remark:
µPD780812, µPD780814
Capacitance
Table 11-2: Capacitance
Parameter Input capacitance Input/output capacitance
Symbol
Function Other than measured pins: P03, P17, P27, P47, Other than measured pins: P57, P67, P70,
Min.
Max.
Unit
Remark:
characteristics dual-function pins same those port pins unless otherwise specified.
µPD780812, µPD780814
Main System Clock Oscillation Circuit Characteristics +85°
Table 11-3: Main System Clock Oscillation Circuit Characteristics
Resonator Ceramic resonator Recommended Circuit Parameter Oscillator Note frequency (fx) Conditions After reaches oscillator voltage range MIN. After reaches oscillator voltage range MIN. MIN. TYP. MAX. Unit
Oscillation Note2 stabilization time
Crystal resonator
Oscillator Note frequency (fx)
Oscillation Note2 stabilization time
External clock
input frequency (fx)
Note
PD74HCU04
input high/low-level width (tXH, tXL)
Notes:
Indicates only oscillation circuit characteristics. Refer Characteristics" instruction execution time. Time required stabilize oscillation after reset STOP mode release.
Cautions: When using main system clock oscillation circuit, wiring area enclosed with broken line should carried follows avoid adverse effect from wiring capacitance. Wiring should short possible. Wiring should cross other signal lines. Wiring should placed close varying high current. potential oscillation circuit capacitor ground should always same that VSS. ground wiring ground pattern which high current flows. fetch signal from oscillation circuit. When main system clock stopped system operated subsystem clock, subsystem clock should switched again main system clock after oscillation stabilization time secured program.
µPD780812, µPD780814
Subystem Clock Oscillation Circuit Characteristics +85°
Table 11-4: Subsystem Clock Oscillation Circuit Characteristics
circu
itio
TYP.
scilla (fxt)
(fxt)
Note:
Only oscillator circuit characteristics shown. Regarding instruction execute time, please refer characteristics.
Cautions: When using subsystem clock oscillation circuit, wiring area enclosed with broken line should carried follows avoid adverse effect from wiring capacitance. Wiring should short possible. Wiring should cross other signal lines. Wiring should placed close varying high current. potential oscillation circuit capacitor ground should always same that VSS. ground wiring ground pattern which high current flows. fetch signal from oscillation circuit. subsystem clock oscillation circuit designed circuit with amplification level, power consumption more prone misoperation noise than that main system clock. Therefore, when using subsystem clock, take special cautions wiring methods.
µPD780812, µPD780814
Characteristics +85°
Table 11-5: Characteristics
Parameter
Symbol
Conditions P07, P27, P57, P70, RESET CL1, P07, P27, P57, P70, RESET CL1, P07, P27, P57, P70, P17, P47, P67,
MIN.
TYP.
MAX.
Unit
High-level input voltage
VIH1 VIH2 VIH4 VIL1 VIL2 VIL4
Low-level input voltage
P17, P47, P67,
High-level output voltage
VOH1
P17, P47, P67,
Low-level output voltage
VOL1
P07, P17, P27, P47, P57, P67, P70, P07, P27, P57, P70, CL1, P07, P27, P57, P70, CL1, P17, P47, P67,
0.07
High-level input leakage current
ILIH1
Low-level input leakage current High-level output leakage current Low-level output leakage current Software pull-up resistor
ILIL1 ILIL2 ILOH ILOL
P17, P47, P67,
VOUT VOUT
Remark:
characteristics dual-function pins same those port pins unless otherwise specified.
µPD780812, µPD780814
Characteristics +85° Mask Version
Table 11-6: Characteristics Flash EEPROM Version
Parameter Symbol IDD1 IDD2 Power supply current
Note
Conditions crystal oscillation operating mode (PCC 00h) crystal oscillation HALT mode oscillation operating mode (fxT kHz) oscillation HALT mode (fxT kHz) STOP mode
TYP.
Unit
IDD3 IDD4 IDD5
Note: Remarks:
AVDD current, port current (including current flowing on-chip pull-up resistor) EEPROM access included. Main system clock oscillator frequency. fXT: Subsystem clock oscillator frequency.
µPD780812, µPD780814
Characteristics Basic Operation +85° 4.0.
Table 11-7: Characteristics Basic Operation
Parameter Cycle time (min. instruction execution time) TI50, TI51 input frequency TI50, TI51 input high/low level width TI20, TI21, TI22 input high/low level width TI00, TI01 input high/low level width Interrupt input high/low level width RESET level width
Symbol fTI5 tTIH5, tTIL5 tTIH2, tTIL2 TCAPH, TCAPL TINTH, TINTL tRSL
Test Conditions
MIN. 0.25 fSMP2
Note1
TYP.
MAX.
Unit
fSMP0
Note2
INTP0-3
Notes:
fSMP2 (sampling clock) fx/4, fx/6, fx/32, fx/128 fSMP0 (sampling clock) fx/2, fx/16, fx/128
Figure 11-1:
Cycle time
Operation guaranteed range
Supply voltage
µPD780812, µPD780814
Serial Interface +85° 4.0. Serial Interface Channel
Table 11-8: 3-wire serial mode (SCK. Internal clock output)
Parameter cycle time high/low-level width setup time SCK) hold time (from SCK) output delay time (from SCK)
Symbol TKCY1 tKH1, tKL1 tSIK1 tKSI1 tKSO1
Conditions
MIN.
MAX.
Unit
1000
tKCY1/2
Note
Note:
load capacitance output line
Table 11-9: 3-wire serial mode (SCK. External clock output)
Parameter cycle time high/low-level width setup time SCK) hold time from SCK) output delay time (from SCK) Symbol tKSO1 tKH1, tKL1 tSIK1 tKSI1 tKSO1
Note
Conditions
MIN.
MAX.
Unit
Note:
load capacitance output line.
Table 11-10: UART Mode (Dedicated baud rate generator output)
Parameter Transfer rate
Symbol
Conditions
MIN.
MAX.
Unit kbps
µPD780812, µPD780814
Figure 11-2: Timing Test Points (excluding inputs)
Test points
Figure 11-3: Clock Timing
1/fX
Input
1/fXT
tXTL Input
tXTH
Figure 11-4: Timing
CAPL TI00, TI01
CAPH
tTIL2 TI20, TI21, TI22
tTIH2
µPD780812, µPD780814
Serial Transfer Timing
Figure 11-5: 3-wire serial mode
tKCYm tKLm tKHm
tSIKm tKSIm
tKSO
Input data
Output data
Remark:
µPD780812, µPD780814
Converter Characteristics +85° AVSS MHz)
Table 11-11: Converter Characteristics
Parameter Resolution Overall error Conversion time Analog input voltage Reference voltage Resistor string tCONV VIAN AVDD RAIREF CS-bit AVSS AVDD Symbol Conditions MIN. TYP. MAX. Unit
Note: Remark:
Overall error excluding quantization error LSB). indicated ratio full-scale value. Main system clock oscillation frequency
EEPROM Characteristics +85° MHz)
Table 11-12: EEPROM Characteristics
Parameter Voltage range Write time Erase/Write cycles Additional current when EEPROM erased/written Symbol VEERW tEEW NEEWT IEE-W Test Conditions MIN. 100000 TYP. MAX. Unit cycle
µPD780812, µPD780814
Data Memory Stop Mode Supply Voltage Data Retention Characteristics +85°
Table 11-13: Data Memory Stop Mode Supply Voltage Data Retention Characteristics
Parameter Data retention power supply voltage Data retention power supply current Release signal time Oscillation stabilization wait time Symbol VDDDR IDDDR tSREL tWAIT Release RESET Release interrupt VDDDR Note
Test Conditions
MIN.
TYP.
MAX.
Unit
Note: Remark:
combination with bits (OSTS0 OSTS2) oscillation stabilization time select register, selection 212/fx 214/fx 217/fx possible Main system clock oscillation frequency
Figure 11-7: Data Retention Timing (STOP mode release RESET)
Internal reset operation HALT mode STOP mode Operating mode
Data retension mode
STOP instruction execution RESET
VDDDR tSREL
tWAIT
Figure 11-8: Data Retention Timing (Standby release signal: STOP mode release interrupt signal)
HALT mode STOP mode Operating mode
Data retension mode
STOP instruction execution Standby release signal (interrupt request)
VDDDR tSREL
tWAIT
µPD780812, µPD780814
Figure 11-9: Interrupt Input Timing
tINTL INTP0 INTP3 tINTH
Figure 11-10: RESET Input Timing
tRSL
RESET
µPD780812, µPD780814
Package Drawing
Figure 12-1: Package Drawing
64-PIN PLASTIC LQFP
detail lead
NOTE
ITEM
P64GK-65-8A8-1
MILLIMETERS 14.8±0.4 12.0±0.2 12.0±0.2 14.8±0.4 1.125 1.125 0.30±0.10 0.13 0.65 (T.P.) 1.4±0.2 0.6±0.2 0.15 +0.10 -0.05 0.10 0.125±0.075 5°±5° MAX. INCHES 0.583±0.016 0.472 +0.009 -0.008 0.472 +0.009 -0.008 0.583±0.016 0.044 0.044 0.012 +0.004 -0.005 0.005 0.026 (T.P.) 0.055±0.008 0.024 +0.008 -0.009 0.006 +0.004 -0.003 0.004 0.055 0.005±0.003 5°±5° 0.067 MAX. P64GK-65-8A8-1
Each lead centerline located within 0.13 (0.005 inch) true position (T.P.) maximum material condition.
Remark:
shape material product same mass produced product.
µPD780812, µPD780814
Recommended Soldering Conditions
µPD780814 series should soldered mounted under conditions table below. detail recommended soldering conditions, refer information document Semiconductor Device Mounting Technology Manual (IEI-1207). soldering methods conditions other than those recommended below, consult sales personnel. µPD780812GK-XXX-8A8 64-pin plastic µPD780814GK-XXX-8A8 64-pin plastic
Table 13-1: Surface Mounting Type Soldering Conditions
Soldering Method Infrared reflow Soldering Conditions Package peak temperature: 235° Duration: sec. max. 210° above), Number times: twice max. <Precautions> second reflow should started after first reflow device temperature returned ordinary state. Flux washing must performed water after first reflow. Package peak temperature: 215° Duration: sec. max. 210° above), Number times: twice max. <Precautions> second reflow should started after first reflow device temperature returned ordinary state. Flux washing must performed water after first reflow. Soldering bath temperature: 260° max., Duration: sec. max., Number times: once, Preheating temperature: 120° max. (package surface temperature) temperature: 300° max., Duration: sec. max. (per device side) Recommended Condition Symbol IR35-00-2
VP15-00-2
Wave soldering part heating
WS60-00-1
Caution:
more than soldering method should avoided (exept case part heating).
µPD780812, µPD780814
Appendix Development Tools
following tools available system development using µPD780812/µPD780814.
Language Processing Software
RA78K/0 Notes CC78K/0 DF780818 Notes CC78K/0-L
Notes
Assembler package used common 78K/0 series compiler package used common 78K/0 series Device file used µPD780818 subseries compiler library source file used common 78K/0 series
PROM Writing Tools
Flashpro FA-64GK Dedicated flash writer micro controllers with on-chip flash memory Programmer adapter connected Flash-Pro
Debugging Tools
In-circuit Emulator (when IE-78001-R-A used) Note In-circuit emulator common 78K/0 series (Compatible with ID78K0) IE-78001-R-A IE-70000-98-IF-B Interface adapter when PC9800 Series (except notebooks) used host Note machine (for IE-78001-R-A) IE-70000-98-IF-C IE-70000-PC-IF-B Interface adapter when PC/AT compatibles used host machine Note (for IE-78001-R-A) IE-70000-PC-IF-C Interface adapter cable when used host machine IE-78000-R-SV3 (for IE-78001-R-A) Note board emulate µPD780818 Subseries IE-78K0-NS-P04 IE-780818-NS-P04 Probe board emulate µPD780818 Subseries Emulation probe conversion board that necessary when using Note IE-78K0-R-EX1 IE-78K0-NS-P04 IE-78001-R-A EP-78012-GK-R Emulation probe 64-pin plastic (GC-AB8 type) Socket mounting target system board created 64-pin plastic TGK-064 (GC-8A8 type) Notes Integrated debugger IE-78001-R-A ID78K0 SM78K0
Notes Notes Notes
System simulator common 78K/0 Series Device file µPD780814 Subseries
DF780812 DF780814
µPD780812, µPD780814
Real-Time
RX78K/0 Notes MX78K0
Notes
Real-time used 78K/0 series used 78K/0 series
Fuzzy Interference Development Support System
FE9000 Note /FE9200 Note FT9080 FI78K0
Note
Fuzzy knowledge data creating tool Translator Fuzzy interference module Fuzzy interference debugger
/FT9085
Note
Note
FD78K0 Note
Notes:
Based PC-9800 series (MS-DOSTM) Based PC/AT(PC DOSTM) Based HP9000 series 300TM, HP9000 series 700(HP-UXTM), SPARCstation(SunOSTM), EWS-4800 series (EWS-UX/V) Based PC-9800 series (MS-DOS WindowsTM) Under development
Remarks:
development tools supplied third-party manufacturers, refer 78K/0 series Selection Guide (IF-1185). RA78K/0, CC78K/0, SM78K0 D78K/0 combination with DF78F0818.
µPD780812, µPD780814
Appendix Related Documents
Documents Related Devices
Document 78K0 Series User's Manual-Instruction 78K0 Series Instruction Table 78K0 Series Instruction 78K0 Series Application Note-Fundamental (III)
Document Japanese IEU-849 IEM-5522 IEM-5521 IEA-767 English IEU-1372 prepared
Documents Development Tools (User's Manuals)
Document RA78K Series Assembler Package RA78K Series Structured Assembler Reprocessor CC78K Series Compiler CC78K0 Compiler Application Note CC78K Series Library Source File IE78001-R-A IE-78K0-NS-P04 IE-780818-NS-EM4 IE-78K0-R-EX1 IE-78012GK-R SM78K0 System Simulator PC/AT DOS) Base ID78K0 Integrated Debugger PC/AT DOS) Base Reference External Port Specification Reference Guide Operation Language Programming Know-how Operation Language
Document Japanese EEU-809 EEU-815 EEU-817 EEU-656 EEU-655 EEU-618 EEU-777 EEU-810 prepared prepared prepared prepared English EEU-1399 EEU-1404 EEU-1402 EEU-1280 EEU-1284 prepared U10057 prepared prepared prepared prepared U10181 U10092 U11539 U11649
Caution:
above documents subject change without notice. sure latest documents design other similar purpose.
µPD780812, µPD780814
Documents Embeded Software (User's Manuals)
Document 78K0 Series Real-time Basic Installation Technical 78K0 Series MX78K0 Fuzzy Knowledge Data Creation Tool 78K0, 78K/II, 87AD Series Fuzzy Inference Development Support System Translator 78K0 Fuzzy Inference Development Support System Fuzzy Inference Module 78K0 Fuzzy Inference Development Support System Fuzzy Inference Debugger Fundamental
Document Japanese EEU-912 EEU-911 EEU-913 EEU-5010 EEU-829 EEA-862 EEU-858 EEU-921 English EEU-1438 EEU-1444 EEU-1441 EEU-1458
Other Documents
Document Package Manual Semiconductor Device Mounting Technology Manual Quality Grade Semiconductor Devices Semiconductor Device Reliability/Quality Control System Electrostatic Discharge (ESD) Test Semiconductor Device Quality Assurance Guide Microcontroller-Related Product Guide Third Party Products
Document Japanese IEI-635 IEI-616 IEI-620 IEM-5068 MEM-539 MEI-603 MEI-604 English IEI-1213 IEI-1207 IEI-1209 MEI-1202
Caution:
above documents subject change without notice. sure latest documents design other similar purpose.
µPD780812, µPD780814
Notes CMOS Devices
Precaution against Semiconductors
Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices
Handling unused input pins CMOS
Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS device behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices.
Status before initialization devices
Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
µPD780812, µPD780814
Regional Information
Some information contained this document vary from country country. Before using product your application, please contact office your country obtain list authorized representatives distributors. They will verify: Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 800-366-9782 Fax: 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-30-67 Fax: 01-30-67
Electronics Hong Kong Ltd.
Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290
Electronics (France) S.A.
Spain Office Madrid, Spain Tel: 01-504-2787 Fax: 01-504-2860
Electronics Singapore Pte. Ltd.
United Square, Singapore 1130 Tel: 253-8311 Fax: 250-3583
Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63
Electronics Taiwan Ltd.
Taipei, Taiwan Tel: 02-719-2377 Fax: 02-719-5951
Brasil S.A.
Paulo-SP, Brasil Tel: 011-889-1680 Fax: 011-889-1689
µPD780812, µPD780814
registered trademark Corporation. IEBus trademark Corporation. MS-DOS MS-Windows either registered trademarks trademarks Microsoft Corporation United States and/or other countries. PC/AT trademarks Corp. HP9000 series 300, HP9000 series 700, HP-UX trademarks Hewlett Packard SPARCstation trademark SPARC International, Inc. SunOS trademark Microsystems, Inc. related documents this publication include preliminary versions. However, preliminary versions marked such. export this product from Japan regulated Japanese government. export this product prohibited without governmental license, need which must judged customer. export re-export this product from country other than Japan also prohibited without license from that country. Please call sales representative.
part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customer must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard:Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact Sales Representative advance. Anti-radioactive design implemented this product.
94.11

µPD780812, µPD780814 8-BIT SINGLE-CHIP MICROCONTROLLER Descr

Top Searches for this datasheet

Other recent searches