BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS 5890 5891 B

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BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS 5890 5891 B

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5890 5891
BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
5890 5891
BIMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
Frequently applied non-impact printer systems, UCN5890A UCN5891A BiMOS serial-input, latched source (high-side) drivers. octal, high-current smart-power merge 8-bit CMOS shift register, associated CMOS latches, CMOS control logic (strobe output enable) with sourcing power Darlington outputs. Typical applications include multiplexed incandescent displays, relays, solenoids, similar peripheral loads maximum -500 output. Except output voltage ratings, these smart high-side driver equivalent. UCN5890A rated operation with load supply voltages minimum output sustaining voltage UCN5891A optimized operation with supply voltages sustaining). BiMOS devices have higher data-input rates than original BiMOS circuits. With logic supply, they will typically operate better than MHz. With supply, significantly higher speeds obtained. CMOS inputs compatible with standard CMOS NMOS logic levels. circuits require appropriate pull-up resistors ensure proper input-logic high. CMOS serial data output, allows cascading these devices multiple drive-line applications required many matrix, alphanumeric, graph displays. devices supplied standard dual in-line plastic package with copper lead frame enhanced package power dissipation characteristics. similar driver, featuring reduced output saturation voltage, UCN5895A. Complementary, 8-bit serial-input, latched sink drivers Series UCN5820A.
Data Sheet 26182.12A*
GROUND CLOCK SERIAL DATA STROBE
LATCHES SHIFT
SERIAL DATA LOGIC SUPPLY OUTPUT ENABLE LOAD SUPPLY
REGISTER
Dwg. A-12,639
ABSOLUTE MAXIMUM RATINGS +25°C
Output Voltage, VOUT (UCN5890A) (UCN5891A) Logic Supply Voltage Range, Driver Supply Voltage Range, (UCN5890A) (UCN5891A) Input Voltage Range, -0.3 Continuous Output Current, IOUT -500 Allowable Package Power Dissipation, Graph Operating Temperature Range, -20°C +85°C Storage Temperature Range, -55°C +150°C
Caution: CMOS devices have input static protection, susceptible damage when exposed extremely high static electrical charges.
FEATURES
Source Outputs Output Current -500 Output Transient-Suppression Diodes Data-lnput Rate Low-Power CMOS Logic Latches
Always order complete part number: Part Number UCN5890A UCN5891A Max. VOUT
5890 5891
BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
FUNCTIONAL BLOCK DIAGRAM
ALLOWABLE PACKAGE POWER DISSIPATION WATTS
CLOCK SERIAL DATA 8-BIT SERIAL-PARALLEL SHIFT REGISTER SERIAL DATA
STROBE
LATCHES
GROUND BIPOLAR
OUTPUT ENABLE
OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8
Dwg. A-12,654
AMBIENT TEMPERATURE
Dwg. GP-016
Number Outputs IOUT -200 50°C 100% 100% 100% 100%
Max. Allowable Duty Cycle 60°C 100% 100% 100%
70°C 100% 100% 100%
TYPICAL INPUT CIRCUIT
TYPICAL OUTPUT DRIVER
Dwg. EP-010-4A
Dwg. A-12,648
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright 1985, 1995, Allegro MicroSystems, Inc.
5890 5891
BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
ELECTRICAL CHARACTERISTICS +25°C, (UCN5890A) (UCN5891A), (unless otherwise noted).
Characteristic Output Leakage Current Symbol ICEX Max. +25°C +70°C Output Saturation Voltage VCE(SAT) IOUT -100 IOUT -225 IOUT -350 Output Sustaining Voltage VCE(sus) Max. IOUT -350 UCN5891A IOUT -350 UCN5890A Input Voltage VIN(1) VIN(0) Input Current IIN(1) Input lmpedance Max. Clock Frequency Serial Data Output Resistance Turn-ON Delay Turn-OFF Delay Supply Current ROUT tPLH tPHL Output Enable Output, IOUT -350 Output Enable Output, IOUT -350 outputs outputs open outputs outputs OFF, Inputs outputs OFF, Inputs output Inputs output Inputs Diode Leakage Current Max. +25°C +70°C Diode Forward Voltage Open Test Conditions Min. 10.5 -0.3 Limits Max. -100 12.3 +0.8 Units
NOTES: Turn-off delay influenced load conditions. Systems applications well below specified output loading require timing considerations some designs, i.e., multiplexed displays when used combination with sink drivers totem pole configuration. Positive (negative) current defined going into (coming specified device pin.
5890 5891
BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
CLOCK DATA STROBE BLANKING OUTN
Dwg. A-12,649A
Serial Data present input transferred shift register logic logic transition CLOCK input pulse. succeeding CLOCK pulses, registers shift data information towards SERIAL DATA OUTPUT. SERIAL DATA must appear input prior rising edge CLOCK input waveform. Information present register transferred respective latch when STROBE high (serial-to-parallel conversion). latches will continue accept data long STROBE held high. Applications where latches bypassed (STROBE tied high) will require that OUTPUT ENABLE input high during serial data entry. When OUTPUT ENABLE input high, output buffers disabled (OFF) without affecting information stored latches shift register. With OUTPUT ENABLE input low, outputs controlled state their respective latches.
TIMING CONDITIONS
(VDD Logic Levels Ground)
Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) Minimum Data Active Time After Clock Pulse (Data Hold Time) Minimum Data Pulse Width Minimum Clock Pulse Width Minimum Time Between Clock Activation Strobe Minimum Strobe Pulse Width Typical Time Between Strobe Activation Output Transition
TRUTH TABLE
Serial Shift Register Contents Data Clock Input Input IN-1 RN-2 RN-1 RN-2 RN-1 RN-1 Serial Data Strobe Output Input RN-1 RN-1 RN-1 PN-1 PN-1 Latch Contents IN-1 Output Enable Output Contents IN-1
PN-1
Logic Level
High Logic Level
Irrelevant
Present State
Previous State
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
5890 5891
BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
TYPICAL APPLICATION
SOLENOID RELAY DRIVER
UCN5890A
SHIFT REGISTER
+48V
DATA
CLOCK DATA STROBE
OUTPUT ENABLE (ACTIVE LOW)
LATCHES
Dwg. A-12,548
5890 5891
BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
Dimensions Inches
0.014 0.008
0.430 0.280 0.240
0.300
0.070 0.045
0.100 0.775 0.735
0.005
0.210
0.015
0.150 0.115 0.022 0.014
Dwg. MA-001-16A
Dimensions Millimeters (Based 25.4
0.355 0.204
10.92 7.11 6.10
7.62
1.77 1.15
2.54 19.68 18.67
0.13
5.33
0.39
3.81 2.93 0.558 0.356
Dwg. MA-001-16A
NOTES: Lead thickness measured seating plane below. Lead spacing tolerance non-cumulative. Exact body lead configuration vendor's option within limits shown.
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
5890 5891
BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
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5890 5891
BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
BiMOS (Series 5800) DABiC (Series 6800) INTELLIGENT POWER INTERFACE DRIVERS SELECTION GUIDE
Function
SERIAL-INPUT LATCHED DRIVERS 8-Bit (saturated drivers) 8-Bit 8-Bit 8-Bit 9-Bit 10-Bit (active pull-downs) 12-Bit (active pull-downs) 20-Bit (active pull-downs) 32-Bit (active pull-downs) 32-Bit 32-Bit (saturated drivers) PARALLEL-INPUT LATCHED DRIVERS 4-Bit 8-Bit 8-Bit SPECIAL-PURPOSE FUNCTIONS Unipolar Stepper Motor Translator/Driver Addressable 28-Line Decoder/Driver
Output Ratings
-120
Part Number
5895 5821 5841 5842 5829 5810-F 5811 5812-F 5818-F 5833 5832
5800 5815 5801
1.25
5804 6817
Current maximum specified test condition, voltage maximum rating. specification sustaining voltage limits. Negative current defined coming (sourcing) output.
Complete part number includes additional characters indicate operating temperature range package style. Internal transient-suppression diodes included inductive-load protection.
Allegro MicroSystems, Inc. reserves right make, from time time, such departures from detail specifications required permit improvements design products. Components made under military approvals will accordance with approval requirements. information included herein believed accurate reliable. However, Allegro MicroSystems, Inc. assumes responsibility use; infringements patents other rights third parties which result from use.
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000

BiMOS 8-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS 5890 5891 B

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